Reclocked to 3.6834 MHz, exactly twice a standard PC uart.
authortravisutk <travisutk@12e2690d-a6be-4b82-a7b7-67c4a43b65c8>
Sun, 21 Jun 2009 20:58:31 +0000 (20:58 +0000)
committertravisutk <travisutk@12e2690d-a6be-4b82-a7b7-67c4a43b65c8>
Sun, 21 Jun 2009 20:58:31 +0000 (20:58 +0000)
commit1aee2758590886e1d1018c840806195a71e12204
tree7f2b21182d58b1b5c7b51e90c604b333df1c0345
parent7487b2cd89324081ccfc195d49f4158f10ec534f
Reclocked to 3.6834 MHz, exactly twice a standard PC uart.
Changed default baud rate to 115200.
Properly calculated the flash-memory TCLK pulses.
The LED will light while the clock is calibrating, then dim once calibrated.

git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@47 12e2690d-a6be-4b82-a7b7-67c4a43b65c8
firmware/apps/jtag/jtag430.c
firmware/apps/jtag/jtag430asm.S
firmware/lib/msp430f1612.c
firmware/tests/blink/Makefile