16-bit MSP430 now more reliable.

MSP430X2 code was intermingling by mistake.

git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@157 12e2690d-a6be-4b82-a7b7-67c4a43b65c8

diff --git a/client/GoodFETMSP430.py b/client/GoodFETMSP430.py
index 9186046..0e1f18f 100644 (file)
--- a/client/GoodFETMSP430.py
+++ b/client/GoodFETMSP430.py
@@ -88,6 +88,7 @@ class GoodFETMSP430(GoodFET):
         return self.data[0];
     def MSP430ident(self):
         """Grab self-identification word from 0x0FF0 as big endian."""
+        ident=0x00;
         if(self.JTAGID==0x89):
             i=self.MSP430peek(0x0ff0);
             ident=((i&0xFF00)>>8)+((i&0xFF)<<8)
@@ -96,7 +97,7 @@ class GoodFETMSP430(GoodFET):
             i=self.MSP430peek(0x1A04);
             ident=((i&0xFF00)>>8)+((i&0xFF)<<8)
             #ident=0x0091;
-            
+        
         return ident;
     def MSP430test(self):
         """Test MSP430 JTAG.  Requires that a chip be attached."""

diff --git a/firmware/apps/jtag/jtag430x2.c b/firmware/apps/jtag/jtag430x2.c
index fb22cee..1a19019 100644 (file)
--- a/firmware/apps/jtag/jtag430x2.c
+++ b/firmware/apps/jtag/jtag430x2.c
@@ -27,12 +27,12 @@ unsigned char jtag430x2_start(){
   
   //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG
   CLRRST;
-  delay(10);
+  delay(10);//10
   CLRTST;
 
-  delay(5);
+  delay(5);//5
   SETTST;
-  msdelay(5);
+  msdelay(5);//5
   SETRST;
   P5DIR&=~RST;
   
@@ -210,6 +210,9 @@ void jtag430x2handle(unsigned char app,
     if(jtagid==MSP430JTAGID){ 
       jtag430mode=MSP430MODE;
       drwidth=16;
+      jtag430_resettap();
+      txdata(app,verb,1);
+      return;
     }else if(jtagid==MSP430X2JTAGID){
       jtag430mode=MSP430X2MODE;
       drwidth=20;