//! Set up the pins for SPI mode.
void spisetup(){
//! Set up the pins for SPI mode.
void spisetup(){
- P5OUT|=SS;
- P5DIR|=MOSI+SCK+SS;
+ SETSS;
+ P5DIR|=MOSI+SCK+BIT0; //BIT0 might be SS
P5DIR&=~MISO;
//Begin a new transaction.
P5DIR&=~MISO;
//Begin a new transaction.
- P5OUT&=~SS;
- P5OUT|=SS;
void spiflash_wrten(){
SETSS;
/*
void spiflash_wrten(){
SETSS;
/*
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0x04);//Write Disable
spitrans8(0x04);//Write Disable
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0x06);//Write Enable
spitrans8(0x06);//Write Enable
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
}
//! Grab the SPI flash status byte.
unsigned char spiflash_status(){
unsigned char c;
}
//! Grab the SPI flash status byte.
unsigned char spiflash_status(){
unsigned char c;
- P5OUT|=SS; //Raise !SS to end transaction.
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ SETSS; //Raise !SS to end transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0x05);//GET STATUS
c=spitrans8(0xFF);
spitrans8(0x05);//GET STATUS
c=spitrans8(0xFF);
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
unsigned char verb,
unsigned long len){
unsigned int i;
unsigned char verb,
unsigned long len){
unsigned int i;
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0x03);//Flash Read Command
len=3;//write 3 byte pointer
for(i=0;i<len;i++)
spitrans8(0x03);//Flash Read Command
len=3;//write 3 byte pointer
for(i=0;i<len;i++)
while(len--)
serial_tx(spitrans8(0));
while(len--)
serial_tx(spitrans8(0));
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
unsigned long i;
//Raise !SS to end transaction, just in case we forgot.
unsigned long i;
//Raise !SS to end transaction, just in case we forgot.
spisetup();
switch(verb){
//PEEK and POKE might come later.
case READ:
case WRITE:
spisetup();
switch(verb){
//PEEK and POKE might come later.
case READ:
case WRITE:
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
for(i=0;i<len;i++)
cmddata[i]=spitrans8(cmddata[i]);
for(i=0;i<len;i++)
cmddata[i]=spitrans8(cmddata[i]);
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
txdata(app,verb,len);
break;
case SPI_JEDEC://Grab 3-byte JEDEC ID.
txdata(app,verb,len);
break;
case SPI_JEDEC://Grab 3-byte JEDEC ID.
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0x9f);
len=3; //Length is variable in some chips, 3 minimum.
for(i=0;i<len;i++)
cmddata[i]=spitrans8(cmddata[i]);
txdata(app,verb,len);
spitrans8(0x9f);
len=3; //Length is variable in some chips, 3 minimum.
for(i=0;i<len;i++)
cmddata[i]=spitrans8(cmddata[i]);
txdata(app,verb,len);
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
case SPI_ERASE://Erase the SPI Flash ROM.
spiflash_wrten();
case SPI_ERASE://Erase the SPI Flash ROM.
spiflash_wrten();
- P5OUT&=~SS; //Drop !SS to begin transaction.
+ CLRSS; //Drop !SS to begin transaction.
spitrans8(0xC7);//Chip Erase
spitrans8(0xC7);//Chip Erase
- P5OUT|=SS; //Raise !SS to end transaction.
+ SETSS; //Raise !SS to end transaction.
while(spiflash_status()&0x01)//while busy
while(spiflash_status()&0x01)//while busy
// N.B., only asm-clean CPP definitions allowed.
// N.B., only asm-clean CPP definitions allowed.
-
-//Use P3 instead of P5 for target I/O on chips without P5.
-#ifndef __MSP430_HAS_PORT5__
-#ifndef __MSP430_HAS_PORT5_R__
-//#warning "No P5, using P3 instead. Will break 2618 and 1612 support."
-#define P5OUT P3OUT
-#define P5DIR P3DIR
-#define P5REN P3REN
-#define P5IN P3IN
-#endif
-#endif
-
-
//Use false P5REN for 1612.
#ifdef __MSP430_HAS_PORT5__
#ifndef __MSP430_HAS_PORT5_R__
//Use false P5REN for 1612.
#ifdef __MSP430_HAS_PORT5__
#ifndef __MSP430_HAS_PORT5_R__
#define MOSI BIT1
#define MISO BIT2
#define SCK BIT3
#define MOSI BIT1
#define MISO BIT2
#define SCK BIT3
-#define SETSS P5OUT|=SS
-#define CLRSS P5OUT&=~SS
-
#define SETMOSI P5OUT|=MOSI
#define CLRMOSI P5OUT&=~MOSI
#define SETCLK P5OUT|=SCK
#define SETMOSI P5OUT|=MOSI
#define CLRMOSI P5OUT&=~MOSI
#define SETCLK P5OUT|=SCK
#define PLEDDIR P1DIR
#define PLEDPIN BIT0
#define PLEDDIR P1DIR
#define PLEDPIN BIT0
+
+//Use P3 instead of P5 for target I/O on chips without P5.
+#ifndef __MSP430_HAS_PORT5__
+#ifndef __MSP430_HAS_PORT5_R__
+//#warning "No P5, using P3 instead. Will break 2618 and 1612 support."
+#define P5OUT P3OUT
+#define P5DIR P3DIR
+#define P5REN P3REN
+#define P5IN P3IN
+#endif
+#endif
+
+//No longer works for Hope badge.
+#define SETSS P5OUT|=BIT0
+#define CLRSS P5OUT&=~BIT0
+
+
#define PLEDDIR P5DIR
#define PLEDPIN BIT4
#define PLEDDIR P5DIR
#define PLEDPIN BIT4
+
+//Radio CS is P4.2
+#define SETSS P4OUT|=BIT2
+#define CLRSS P4OUT&=~BIT2
+