shuffle structure elements to cope with atr[0]
[librfid] / rfid_asic_rc632_14443b.c
1
2 #include "rc632.h"
3
4 int rc632_iso14443b_init(struct rc632_handle *handle)
5 {
6         // FIXME: some FIFO work
7         //
8         ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
9                               (RC632_TXCTRL_TX1_RF_EN |
10                                RC632_TXCTRL_TX2_RF_EN |
11                                RC632_TXCTRL_TX2_INV |
12                                RC632_TXCTRL_MOD_SRC_INT));
13
14         ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
15
16         ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
17
18         ret = rc632_reg_write(handle, RC632_REG_CODE_CONTROL,
19                               (RC632_CDRCTRL_TXCD_NRZ |
20                                RC632_CDRCTRL_RATE_14443B));
21
22         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
23
24         ret = rc632_reg_write(handle, RC632_REG_SOF_WIDTH, 0x3f);
25
26         ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
27                               (RC632_TBFRAMING_SOF_11L_3H |
28                                (6 << RC632_TBFRAMING_SPACE_SHIFT) |
29                                RC632_TBFRAMING_EOF_11));
30
31         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
32                               (RC632_RXCTRL1_GAIN_35DB |
33                                RC632_RXCTRL1_ISO14443 |
34                                RC632_RXCTRL1_SUBCP_8));
35
36         ret = rc632_reg_write(handle, RC632_REG_DECODE_CONTROL,
37                               (RC632_DECCTRL_BPSK |
38                                RC632_DECCTRL_RXFR_14443B));
39
40         ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
41                                 CM5121_14443B_BITPHASE);
42
43         ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
44                                 CM5121_14443B_THRESHOLD);
45
46         ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
47                               ((0x10 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
48                                (0x11 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
49                                RC632_BPSKD_FILTER_AMP_DETECT |
50                                RC632_BPSKD_NO_RX_EOF |
51                                RC632_BPSKD_NO_RX_EGT));
52
53         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
54                               (RC632_RXCTRL2_AUTO_PD |
55                                RC632_RXCTRL2_DECSRC_INT));
56
57         ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
58
59         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_RDUNDANCY,
60                               (RC632_CR_TX_CRC_ENABLE |
61                                RC632_CR_RX_CRC_ENABLE |
62                                RC632_CR_CR3309));
63
64         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
65
66         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
67
68 }
69