git.rot13.org Git - librfid/blob - src/rfid_asic_rc632.c

   1 /* Generic Philips CL RC632 Routines
   2  *
   3  * (C) 2005-2008 Harald Welte <laforge@gnumonks.org>
   4  *
   5  */
   6
   7 /*
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License version 2
  10  *  as published by the Free Software Foundation
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
  20  */
  21
  22 #include <unistd.h>
  23 #include <stdlib.h>
  24 #include <string.h>
  25 #include <errno.h>
  26 #include <limits.h>
  27 #include <sys/types.h>
  28
  29 #include <librfid/rfid.h>
  30 #include <librfid/rfid_asic.h>
  31 #include <librfid/rfid_asic_rc632.h>
  32 #include <librfid/rfid_reader_cm5121.h>
  33 #include <librfid/rfid_layer2_iso14443a.h>
  34 #include <librfid/rfid_layer2_iso15693.h>
  35 #include <librfid/rfid_protocol_mifare_classic.h>
  36
  37 #include "rfid_iso14443_common.h"
  38 #include "rc632.h"
  39
  40 #ifdef  __MINGW32__
  41 #include "usleep.h"
  42 #endif/*__MINGW32__*/
  43
  44 #define RC632_TMO_AUTH1 140
  45
  46 #define TIMER_RELAX_FACTOR      10
  47
  48 #define ENTER()         DEBUGP("entering\n")
  49 const struct rfid_asic rc632;
  50
  51 struct register_file {
  52         u_int8_t reg;
  53         u_int8_t val;
  54 };
  55
  56 /* Register and FIFO Access functions */
  57 static int
  58 rc632_reg_write(struct rfid_asic_handle *handle,
  59                 u_int8_t reg,
  60                 u_int8_t val)
  61 {
  62         return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
  63 }
  64
  65 static int
  66 rc632_reg_read(struct rfid_asic_handle *handle,
  67                u_int8_t reg,
  68                u_int8_t *val)
  69 {
  70         return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
  71 }
  72
  73 static int
  74 rc632_fifo_write(struct rfid_asic_handle *handle,
  75                  u_int8_t len,
  76                  const u_int8_t *buf,
  77                  u_int8_t flags)
  78 {
  79         return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
  80                                                            len, buf, flags);
  81 }
  82
  83 static int
  84 rc632_fifo_read(struct rfid_asic_handle *handle,
  85                 u_int8_t len,
  86                 u_int8_t *buf)
  87 {
  88         return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
  89 }
  90
  91
  92 static int
  93 rc632_set_bits(struct rfid_asic_handle *handle,
  94                 u_int8_t reg,
  95                 u_int8_t val)
  96 {
  97         int ret;
  98         u_int8_t tmp;
  99
 100         ret = rc632_reg_read(handle, reg, &tmp);
 101         if (ret < 0)
 102                 return -1;
 103
 104         /* if bits are already set, no need to set them again */
 105         if ((tmp & val) == val)
 106                 return 0;
 107
 108         return rc632_reg_write(handle, reg, (tmp|val)&0xff);
 109 }
 110 static int
 111 rc632_set_bit_mask(struct rfid_asic_handle *handle,
 112                    u_int8_t reg, u_int8_t mask, u_int8_t val)
 113 {
 114         int ret;
 115         u_int8_t tmp;
 116
 117         ret = rc632_reg_read(handle, reg, &tmp);
 118         if (ret < 0)
 119                 return ret;
 120
 121         /* if bits are already like we want them, abort */
 122         if ((tmp & mask) == val)
 123                 return 0;
 124
 125         return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
 126 }
 127
 128 static int
 129 rc632_clear_bits(struct rfid_asic_handle *handle,
 130                  u_int8_t reg,
 131                  u_int8_t val)
 132 {
 133         int ret;
 134         u_int8_t tmp;
 135
 136         ret = rc632_reg_read(handle, reg, &tmp);
 137         if (ret < 0) {
 138                 DEBUGP("error during reg_read(%p, %d):%d\n",
 139                         handle, reg, ret);
 140                 return -1;
 141         }
 142         /* if bits are already cleared, no need to clear them again */
 143         if ((tmp & val) == 0)
 144                 return 0;
 145
 146         return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
 147 }
 148
 149 static int
 150 rc632_clear_irqs(struct rfid_asic_handle *handle, u_int8_t bits)
 151 {
 152         return rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, (~RC632_INT_SET)&bits);
 153 }
 154
 155 static int
 156 rc632_rf_power(struct rfid_asic_handle *handle, int on)
 157 {
 158         ENTER();
 159         if (on)
 160                 return rc632_set_bits(handle, RC632_REG_TX_CONTROL,
 161                                       RC632_TXCTRL_TX1_RF_EN|
 162                                       RC632_TXCTRL_TX2_RF_EN);
 163         else
 164                 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL,
 165                                         RC632_TXCTRL_TX1_RF_EN|
 166                                         RC632_TXCTRL_TX2_RF_EN);
 167 }
 168
 169 static int
 170 rc632_power(struct rfid_asic_handle *handle, int on)
 171 {
 172         ENTER();
 173         if (on)
 174                 return rc632_clear_bits(handle, RC632_REG_CONTROL,
 175                                         RC632_CONTROL_POWERDOWN);
 176         else
 177                 return rc632_set_bits(handle, RC632_REG_CONTROL,
 178                                       RC632_CONTROL_POWERDOWN);
 179 }
 180
 181 static int
 182 rc632_execute_script(struct rfid_asic_handle *h, struct register_file *f,
 183                      int len)
 184 {
 185         int i, ret;
 186
 187         for (i = 0; i < len; i++) {
 188                 ret = rc632_reg_write(h, f[i].reg, f[i].val);
 189                 if (ret < 0)
 190                         return ret;
 191         }
 192
 193         return 0;
 194 }
 195
 196 /* calculate best 8bit prescaler and divisor for given usec timeout */
 197 static int best_prescaler(u_int64_t timeout, u_int8_t *prescaler,
 198                           u_int8_t *divisor)
 199 {
 200         u_int8_t best_prescaler, best_divisor, i;
 201         int64_t smallest_diff;
 202
 203         smallest_diff = LLONG_MAX;
 204         best_prescaler = 0;
 205
 206         for (i = 0; i < 21; i++) {
 207                 u_int64_t clk, tmp_div, res;
 208                 int64_t diff;
 209                 clk = 13560000 / (1 << i);
 210                 tmp_div = (clk * timeout) / 1000000;
 211                 tmp_div++;
 212
 213                 if ((tmp_div > 0xff) || (tmp_div > clk))
 214                         continue;
 215
 216                 res = 1000000 / (clk / tmp_div);
 217                 diff = res - timeout;
 218
 219                 if (diff < 0)
 220                         continue;
 221
 222                 if (diff < smallest_diff) {
 223                         best_prescaler = i;
 224                         best_divisor = tmp_div;
 225                         smallest_diff = diff;
 226                 }
 227         }
 228
 229         *prescaler = best_prescaler;
 230         *divisor = best_divisor;
 231
 232         DEBUGP("timeout %u usec, prescaler = %u, divisor = %u\n",
 233                 timeout, best_prescaler, best_divisor);
 234
 235         return 0;
 236 }
 237
 238 static int
 239 rc632_timer_set(struct rfid_asic_handle *handle,
 240                 u_int64_t timeout)
 241 {
 242         int ret;
 243         u_int8_t prescaler, divisor, irq;
 244
 245         timeout *= TIMER_RELAX_FACTOR;
 246
 247         ret = best_prescaler(timeout, &prescaler, &divisor);
 248
 249         ret = rc632_reg_write(handle, RC632_REG_TIMER_CLOCK,
 250                               prescaler & 0x1f);
 251         if (ret < 0)
 252                 return ret;
 253
 254         ret = rc632_reg_write(handle, RC632_REG_TIMER_CONTROL,
 255                               RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
 256
 257         /* clear timer irq bit */
 258         ret = rc632_clear_irqs(handle, RC632_IRQ_TIMER);
 259
 260         /* enable timer IRQ */
 261         ret |= rc632_reg_write(handle, RC632_REG_INTERRUPT_EN, RC632_IRQ_SET | RC632_IRQ_TIMER);
 262
 263         ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
 264
 265         return ret;
 266 }
 267
 268 /* Wait until RC632 is idle or TIMER IRQ has happened */
 269 static int rc632_wait_idle_timer(struct rfid_asic_handle *handle)
 270 {
 271         int ret;
 272         u_int8_t stat, irq, cmd;
 273
 274         ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_EN, &irq);
 275         if (ret < 0)
 276                 return ret;
 277         DEBUGP_INTERRUPT_FLAG("irq_en",irq);
 278
 279         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_EN, RC632_IRQ_SET
 280                                 | RC632_IRQ_TIMER
 281                                 | RC632_IRQ_IDLE
 282                                 | RC632_IRQ_RX );
 283         if (ret < 0)
 284                 return ret;
 285
 286         while (1) {
 287                 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &stat);
 288                 DEBUGP_STATUS_FLAG(stat);
 289                 if (stat & RC632_STAT_ERR) {
 290                         u_int8_t err;
 291                         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &err);
 292                         if (ret < 0)
 293                                 return ret;
 294                         DEBUGP_ERROR_FLAG(err);
 295                         if (err & (RC632_ERR_FLAG_COL_ERR |
 296                                    RC632_ERR_FLAG_PARITY_ERR |
 297                                    RC632_ERR_FLAG_FRAMING_ERR |
 298                                 /* FIXME: why get we CRC errors in CL2 anticol at iso14443a operation with mifare UL? */
 299                                 /*   RC632_ERR_FLAG_CRC_ERR | */
 300                                    0))
 301                                 return -EIO;
 302                 }
 303                 if (stat & RC632_STAT_IRQ) {
 304                         ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
 305                         if (ret < 0)
 306                                 return ret;
 307                         DEBUGP_INTERRUPT_FLAG("irq_rq",irq);
 308
 309                         if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
 310                                 DEBUGP("timer expired before RX!!\n");
 311                                 rc632_clear_irqs(handle, RC632_IRQ_TIMER);
 312                                 return -ETIMEDOUT;
 313                         }
 314                 }
 315
 316                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 317                 if (ret < 0)
 318                         return ret;
 319
 320                 if (cmd == 0) {
 321                         rc632_clear_irqs(handle, RC632_IRQ_RX);
 322                         return 0;
 323                 }
 324
 325                 /* poll every millisecond */
 326                 usleep(1000);
 327         }
 328 }
 329
 330 /* Stupid RC632 implementations don't evaluate interrupts but poll the
 331  * command register for "status idle" */
 332 static int
 333 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
 334 {
 335         u_int8_t cmd = 0xff;
 336         int ret, cycles = 0;
 337 #define USLEEP_PER_CYCLE        128
 338
 339         timeout *= TIMER_RELAX_FACTOR;
 340
 341         while (cmd != 0) {
 342                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 343                 if (ret < 0)
 344                         return ret;
 345
 346                 {
 347                         u_int8_t foo;
 348                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
 349                         DEBUGP_STATUS_FLAG(foo);
 350                         /* check if Error has occured (ERR flag set) */
 351                         if (foo & RC632_STAT_ERR) {
 352                                 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
 353                                 DEBUGP_ERROR_FLAG(foo);
 354                         }
 355                         /* check if IRQ has occurred (IRQ flag set)*/
 356                         if (foo & RC632_STAT_IRQ) {
 357                                 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &foo);
 358                                 DEBUGP_INTERRUPT_FLAG("irq_rq",foo);
 359                                 /* clear all interrupts */
 360                                 ret = rc632_clear_irqs(handle, 0xff);
 361                                 if (ret < 0)
 362                                         return ret;
 363                         }
 364                 }
 365                 if (cmd == 0) {
 366                         /* FIXME: read second time ?? */
 367                         DEBUGP("cmd == 0 (IDLE)\n");
 368                         return 0;
 369                 }
 370
 371                 /* Abort after some timeout */
 372                 if (cycles > timeout/USLEEP_PER_CYCLE) {
 373                         DEBUGP("timeout...\n");
 374                         return -ETIMEDOUT;
 375                 }
 376
 377                 cycles++;
 378                 usleep(USLEEP_PER_CYCLE);
 379         }
 380
 381         return 0;
 382 }
 383
 384 static int
 385 rc632_transmit(struct rfid_asic_handle *handle,
 386                 const u_int8_t *buf,
 387                 u_int8_t len,
 388                 u_int64_t timeout)
 389 {
 390         int ret, cur_len;
 391         const u_int8_t *cur_buf = buf;
 392
 393         DEBUGP("timeout=%u, tx_len=%u\n", timeout, len);
 394
 395         if (len > 64)
 396                 cur_len = 64;
 397         else
 398                 cur_len = len;
 399
 400         do {
 401                 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
 402                 if (ret < 0)
 403                         return ret;
 404
 405                 if (cur_buf == buf)  {
 406                         /* only start transmit first time */
 407                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 408                                               RC632_CMD_TRANSMIT);
 409                         if (ret < 0)
 410                                 return ret;
 411                 }
 412
 413                 cur_buf += cur_len;
 414                 if (cur_buf < buf + len) {
 415                         cur_len = buf - cur_buf;
 416                         if (cur_len > 64)
 417                                 cur_len = 64;
 418                 } else
 419                         cur_len = 0;
 420
 421         } while (cur_len);
 422
 423         return rc632_wait_idle(handle, timeout);
 424 }
 425
 426 static int
 427 tcl_toggle_pcb(struct rfid_asic_handle *handle)
 428 {
 429         /* FIXME: toggle something between 0x0a and 0x0b */
 430         return 0;
 431 }
 432
 433 static int
 434 rc632_transceive(struct rfid_asic_handle *handle,
 435                  const u_int8_t *tx_buf,
 436                  u_int8_t tx_len,
 437                  u_int8_t *rx_buf,
 438                  u_int8_t *rx_len,
 439                  u_int64_t timer,
 440                  unsigned int toggle)
 441 {
 442         int ret, cur_tx_len, i;
 443         u_int8_t rx_avail;
 444         const u_int8_t *cur_tx_buf = tx_buf;
 445
 446         DEBUGP("timeout=%u, rx_len=%u, tx_len=%u\n", timer, *rx_len, tx_len);
 447
 448         if (tx_len > 64)
 449                 cur_tx_len = 64;
 450         else
 451                 cur_tx_len = tx_len;
 452
 453
 454         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_IDLE);
 455         /* clear all interrupts */
 456         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
 457
 458         { u_int8_t tmp;
 459         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 460         DEBUGP_STATUS_FLAG(tmp);
 461         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 462         DEBUGP_ERROR_FLAG(tmp);
 463         }
 464
 465         ret = rc632_timer_set(handle, timer);
 466         if (ret < 0)
 467                 return ret;
 468
 469         do {
 470                 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
 471                 if (ret < 0)
 472                         return ret;
 473
 474                 if (cur_tx_buf == tx_buf) {
 475                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 476                                               RC632_CMD_TRANSCEIVE);
 477                         if (ret < 0)
 478                                 return ret;
 479                 }
 480
 481                 cur_tx_buf += cur_tx_len;
 482                 if (cur_tx_buf < tx_buf + tx_len) {
 483                         u_int8_t fifo_fill;
 484                         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
 485                                              &fifo_fill);
 486                         if (ret < 0)
 487                                 return ret;
 488
 489                         cur_tx_len = 64 - fifo_fill;
 490                 } else
 491                         cur_tx_len = 0;
 492
 493         } while (cur_tx_len);
 494
 495         if (toggle == 1)
 496                 tcl_toggle_pcb(handle);
 497
 498         ret = rc632_wait_idle_timer(handle);
 499         //ret = rc632_wait_idle(handle, timer);
 500
 501         DEBUGP("rc632_wait_idle >> ret=%d %s\n",ret,(ret==-ETIMEDOUT)?"ETIMEDOUT":"");
 502         if (ret < 0)
 503                 return ret;
 504
 505         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
 506         if (ret < 0)
 507                 return ret;
 508
 509         if (rx_avail > *rx_len)
 510                 DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
 511         else if (*rx_len > rx_avail)
 512                 *rx_len = rx_avail;
 513
 514         DEBUGP("rx_len == %d\n",*rx_len);
 515
 516         if (rx_avail == 0) {
 517                 u_int8_t tmp;
 518
 519                 for (i = 0; i < 1; i++){
 520                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 521                         DEBUGP_STATUS_FLAG(tmp);
 522                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 523                         DEBUGP_ERROR_FLAG(tmp);
 524                 }
 525                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 526
 527                 //return 0;
 528                 return -EIO;
 529         }
 530
 531         return rc632_fifo_read(handle, *rx_len, rx_buf);
 532         /* FIXME: discard addidional bytes in FIFO */
 533 }
 534
 535
 536 static int
 537 rc632_receive(struct rfid_asic_handle *handle,
 538                  u_int8_t *rx_buf,
 539                  u_int8_t *rx_len,
 540                  u_int64_t timer)
 541 {
 542         int ret, cur_tx_len, i;
 543         u_int8_t rx_avail;
 544
 545         DEBUGP("timeout=%u, rx_len=%u\n", timer, *rx_len);
 546         ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00); /* IDLE */
 547         /* clear all interrupts */
 548         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
 549
 550         ret = rc632_timer_set(handle, timer);
 551         if (ret < 0)
 552                 return ret;
 553
 554         ret = rc632_reg_write(handle, RC632_REG_COMMAND,RC632_CMD_RECEIVE);
 555         if (ret < 0)
 556                 return ret;
 557
 558         /* the timer cannot start in hardware based on the command we just
 559          * sent. this means that our timing will always be quite a bit more lax,
 560          * i.e. we'll always wait for a bit longer than the specs ask us to. */
 561         ret = rc632_set_bits(handle, RC632_REG_CONTROL,
 562                              RC632_CONTROL_TIMER_START);
 563         if (ret < 0)
 564                 return ret;
 565
 566         //ret = rc632_wait_idle(handle, timer);
 567         ret = rc632_wait_idle_timer(handle);
 568         if (ret < 0)
 569                 return ret;
 570
 571         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
 572         if (ret < 0)
 573                 return ret;
 574
 575         if (rx_avail > *rx_len) {
 576                 //DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
 577         } else if (*rx_len > rx_avail)
 578                 *rx_len = rx_avail;
 579
 580         if (rx_avail == 0) {
 581                 u_int8_t tmp;
 582
 583                 DEBUGP("rx_len == 0\n");
 584
 585                 for (i = 0; i < 1; i++) {
 586                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 587                         DEBUGP_STATUS_FLAG(tmp);
 588                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 589                         DEBUGP_ERROR_FLAG(tmp);
 590                 }
 591
 592                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 593                 return -1;
 594         }
 595
 596         return rc632_fifo_read(handle, *rx_len, rx_buf);
 597         /* FIXME: discard additional bytes in FIFO */
 598 }
 599
 600 #define MAX_WRITE_LEN   16      /* see Sec. 18.6.1.2 of RC632 Spec Rev. 3.2. */
 601
 602 static int
 603 rc632_write_eeprom(struct rfid_asic_handle *handle, u_int16_t addr,
 604                    u_int8_t *data, u_int8_t len)
 605 {
 606         u_int8_t sndbuf[MAX_WRITE_LEN + 2];
 607         u_int8_t reg;
 608         int ret;
 609
 610         if (len > MAX_WRITE_LEN)
 611                 return -EINVAL;
 612         if (addr < 0x10)
 613                 return -EPERM;
 614         if (addr > 0x1ff)
 615                 return -EINVAL;
 616
 617         sndbuf[0] = addr & 0x00ff;      /* LSB */
 618         sndbuf[1] = addr >> 8;          /* MSB */
 619         memcpy(&sndbuf[2], data, len);
 620
 621         ret = rc632_fifo_write(handle, len + 2, sndbuf, 0x03);
 622         if (ret < 0)
 623                 return ret;
 624
 625         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_WRITE_E2);
 626         if (ret < 0)
 627                 return ret;
 628
 629         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &reg);
 630         if (ret < 0)
 631                 return ret;
 632
 633         if (reg & RC632_ERR_FLAG_ACCESS_ERR)
 634                 return -EPERM;
 635
 636         while (1) {
 637                 u_int8_t reg;
 638                 ret = rc632_reg_read(handle, RC632_REG_SECONDARY_STATUS, &reg);
 639                 if (ret < 0)
 640                         return ret;
 641
 642                 if (reg & RC632_SEC_ST_E2_READY) {
 643                         /* the E2Write command must be terminated, See sec. 18.6.1.3 */
 644                         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_IDLE);
 645                         break;
 646                 }
 647         }
 648
 649         return ret;
 650 }
 651
 652 static int
 653 rc632_read_eeprom(struct rfid_asic_handle *handle, u_int16_t addr,
 654                   u_int8_t *buf, u_int8_t len)
 655 {
 656         u_int8_t sndbuf[3];
 657         u_int8_t reg;
 658         int ret;
 659
 660         sndbuf[0] = addr & 0xff;
 661         sndbuf[1] = addr >> 8;
 662         sndbuf[2] = len;
 663
 664         ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
 665         if (ret < 0)
 666                 return ret;
 667
 668         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
 669         if (ret < 0)
 670                 return ret;
 671
 672         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &reg);
 673         if (ret < 0)
 674                 return ret;
 675
 676         if (reg & RC632_ERR_FLAG_ACCESS_ERR)
 677                 return -EPERM;
 678
 679         usleep(20000);
 680
 681         return rc632_fifo_read(handle, len, buf);
 682 }
 683
 684 static int
 685 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
 686 {
 687         u_int8_t sndbuf[2] = { 0x01, 0x02 };
 688         u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
 689         int ret;
 690
 691         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
 692         if (ret < 0)
 693                 return ret;
 694
 695         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
 696         if (ret < 0)
 697                 return ret;
 698
 699         ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
 700         if (ret < 0)
 701                 return ret;
 702
 703         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
 704         if (ret < 0)
 705                 return ret;
 706
 707         usleep(10000);  /* FIXME: no checking for cmd completion? *
 708
 709         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
 710         if (ret < 0)
 711                 return ret;
 712
 713         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
 714         if (ret < 0)
 715                 return ret;
 716
 717         /* FIXME: what to do with crc result? */
 718         return ret;
 719 }
 720
 721
 722 int
 723 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
 724 {
 725         int ret = 0;
 726         u_int8_t i;
 727
 728         for (i = 0; i <= 0x3f; i++)
 729                 ret |= rc632_reg_read(handle, i, &buf[i]);
 730
 731         return ret;
 732 }
 733
 734 /* generic FIFO access functions (if no more efficient ones provided by
 735  * transport driver) */
 736
 737 static int
 738 generic_fifo_write()
 739 {
 740         /* FIXME: implementation (not needed for CM 5121) */
 741         return -1;
 742 }
 743
 744 static int
 745 generic_fifo_read()
 746 {
 747         /* FIXME: implementation (not neded for CM 5121) */
 748         return -1;
 749 }
 750
 751 static int
 752 rc632_init(struct rfid_asic_handle *ah)
 753 {
 754         int ret;
 755
 756         /* switch off rf (make sure PICCs are reset at init time) */
 757         ret = rc632_power(ah, 0);
 758         if (ret < 0)
 759                 return ret;
 760
 761         usleep(10000);
 762
 763         /* switch on rf */
 764         ret = rc632_power(ah, 1);
 765         if (ret < 0)
 766                 return ret;
 767
 768         /* disable register paging */
 769         ret = rc632_reg_write(ah, 0x00, 0x00);
 770         if (ret < 0)
 771                 return ret;
 772
 773         /* set some sane default values */
 774         ret = rc632_reg_write(ah, 0x11, 0x5b);
 775         if (ret < 0)
 776                 return ret;
 777
 778         /* switch off rf */
 779         ret = rc632_rf_power(ah, 0);
 780         if (ret < 0)
 781                 return ret;
 782
 783         usleep(100000);
 784
 785         /* switch on rf */
 786         ret = rc632_rf_power(ah, 1);
 787         if (ret < 0)
 788                 return ret;
 789
 790         return 0;
 791 }
 792
 793 static int
 794 rc632_fini(struct rfid_asic_handle *ah)
 795 {
 796         int ret;
 797
 798         /* switch off rf */
 799         ret = rc632_rf_power(ah, 0);
 800         if (ret < 0)
 801                 return ret;
 802
 803         ret = rc632_power(ah, 0);
 804         if (ret < 0)
 805                 return ret;
 806
 807         return 0;
 808 }
 809
 810 struct rfid_asic_handle *
 811 rc632_open(struct rfid_asic_transport_handle *th)
 812 {
 813         struct rfid_asic_handle *h;
 814
 815         h = malloc_asic_handle(sizeof(*h));
 816         if (!h)
 817                 return NULL;
 818         memset(h, 0, sizeof(*h));
 819
 820         h->asic = (void*)&rc632;
 821         h->rath = th;
 822         h->fc = h->asic->fc;
 823         /* FIXME: this is only cm5121 specific, since the latency
 824          * down to the RC632 FIFO is too long to refill during TX/RX */
 825         h->mtu = h->mru = 64;
 826
 827         if (rc632_init(h) < 0) {
 828                 free_asic_handle(h);
 829                 return NULL;
 830         }
 831
 832         return h;
 833 }
 834
 835 void
 836 rc632_close(struct rfid_asic_handle *h)
 837 {
 838         rc632_fini(h);
 839         free_asic_handle(h);
 840 }
 841
 842 /*
 843  * ISO14443A
 844  */
 845
 846 /* Register file for ISO14443A standard */
 847 static struct register_file iso14443a_script[] = {
 848         {
 849                 .reg    = RC632_REG_TX_CONTROL,
 850                 .val    = RC632_TXCTRL_MOD_SRC_INT |
 851                           RC632_TXCTRL_TX2_INV |
 852                           RC632_TXCTRL_FORCE_100_ASK |
 853                           RC632_TXCTRL_TX2_RF_EN |
 854                           RC632_TXCTRL_TX1_RF_EN,
 855         }, {
 856                 .reg    = RC632_REG_CW_CONDUCTANCE,
 857                 .val    = CM5121_CW_CONDUCTANCE,
 858         }, {
 859                 .reg    = RC632_REG_MOD_CONDUCTANCE,
 860                 .val    = CM5121_MOD_CONDUCTANCE,
 861         }, {
 862                 .reg    = RC632_REG_CODER_CONTROL,
 863                 .val    = (RC632_CDRCTRL_TXCD_14443A |
 864                            RC632_CDRCTRL_RATE_106K),
 865         }, {
 866                 .reg    = RC632_REG_MOD_WIDTH,
 867                 .val    = 0x13,
 868         }, {
 869                 .reg    = RC632_REG_MOD_WIDTH_SOF,
 870                 .val    = 0x3f,
 871         }, {
 872                 .reg    = RC632_REG_TYPE_B_FRAMING,
 873                 .val    = 0x00,
 874         }, {
 875                 .reg    = RC632_REG_RX_CONTROL1,
 876                 .val    = (RC632_RXCTRL1_GAIN_35DB |
 877                            RC632_RXCTRL1_ISO14443 |
 878                            RC632_RXCTRL1_SUBCP_8),
 879         }, {
 880                 .reg    = RC632_REG_DECODER_CONTROL,
 881                 .val    = (RC632_DECCTRL_MANCHESTER |
 882                            RC632_DECCTRL_RXFR_14443A),
 883         }, {
 884                 .reg    = RC632_REG_BIT_PHASE,
 885                 .val    = CM5121_14443A_BITPHASE,
 886         }, {
 887                 .reg    = RC632_REG_RX_THRESHOLD,
 888                 .val    = CM5121_14443A_THRESHOLD,
 889         }, {
 890                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
 891                 .val    = 0x00,
 892         }, {
 893                 .reg    = RC632_REG_RX_CONTROL2,
 894                 .val    = (RC632_RXCTRL2_DECSRC_INT |
 895                            RC632_RXCTRL2_CLK_Q),
 896         }, {
 897                 .reg    = RC632_REG_RX_WAIT,
 898                 //.val  = 0x03, /* default value */
 899                 .val    = 0x06, /* omnikey */
 900         }, {
 901                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
 902                 .val    = (RC632_CR_PARITY_ENABLE |
 903                            RC632_CR_PARITY_ODD),
 904         }, {
 905                 .reg    = RC632_REG_CRC_PRESET_LSB,
 906                 .val    = 0x63,
 907         }, {
 908                 .reg    = RC632_REG_CRC_PRESET_MSB,
 909                 .val    = 0x63,
 910         },
 911 };
 912
 913 static int
 914 rc632_iso14443a_init(struct rfid_asic_handle *handle)
 915 {
 916         int ret;
 917
 918         /* flush fifo (our way) */
 919         ret = rc632_reg_write(handle, RC632_REG_CONTROL,
 920                               RC632_CONTROL_FIFO_FLUSH);
 921
 922         ret = rc632_execute_script(handle, iso14443a_script,
 923                                    ARRAY_SIZE(iso14443a_script));
 924         if (ret < 0)
 925                 return ret;
 926
 927         return 0;
 928 }
 929
 930 static int
 931 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
 932 {
 933
 934 #if 0
 935         ret = rc632_rf_power(handle, 0);
 936         if (ret < 0)
 937                 return ret;
 938 #endif
 939
 940
 941         return 0;
 942 }
 943
 944
 945 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
 946 static int
 947 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
 948                                 u_int8_t cmd,
 949                                 struct iso14443a_atqa *atqa)
 950 {
 951         int ret;
 952         u_int8_t tx_buf[1];
 953         u_int8_t rx_len = 2;
 954         u_int8_t error_flag;
 955
 956         memset(atqa, 0, sizeof(*atqa));
 957
 958         tx_buf[0] = cmd;
 959
 960         /* transfer only 7 bits of last byte in frame */
 961         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
 962         if (ret < 0)
 963                 return ret;
 964
 965         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
 966                                 RC632_CONTROL_CRYPTO1_ON);
 967         if (ret < 0)
 968                 return ret;
 969
 970 #if 0
 971         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
 972                                 (RC632_CR_PARITY_ENABLE |
 973                                  RC632_CR_PARITY_ODD));
 974 #else
 975         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
 976                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
 977
 978 #endif
 979         if (ret < 0)
 980                 return ret;
 981
 982         ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
 983                                 (u_int8_t *)atqa, &rx_len,
 984                                 ISO14443A_FDT_ANTICOL_LAST1, 0);
 985         if (ret < 0) {
 986                 DEBUGP("error during rc632_transceive()\n");
 987                 return ret;
 988         }
 989
 990         /* switch back to normal 8bit last byte */
 991         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
 992         if (ret < 0)
 993                 return ret;
 994
 995         /* determine whether there was a collission */
 996         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
 997         if (ret < 0)
 998                 return ret;
 999
1000         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1001                 u_int8_t boc;
1002                 /* retrieve bit of collission */
1003                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1004                 if (ret < 0)
1005                         return ret;
1006                 DEBUGP("collision detected in xcv_sf: bit_of_col=%u\n", boc);
1007                 /* FIXME: how to signal this up the stack */
1008         }
1009
1010         if (rx_len != 2) {
1011                 DEBUGP("rx_len(%d) != 2\n", rx_len);
1012                 return -1;
1013         }
1014
1015         return 0;
1016 }
1017
1018 /* transceive regular frame */
1019 static int
1020 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
1021                            unsigned int frametype,
1022                            const u_int8_t *tx_buf, unsigned int tx_len,
1023                            u_int8_t *rx_buf, unsigned int *rx_len,
1024                            u_int64_t timeout, unsigned int flags)
1025 {
1026         int ret;
1027         u_int8_t rxl;
1028         u_int8_t channel_red;
1029
1030         if (*rx_len > 0xff)
1031                 rxl = 0xff;
1032         else
1033                 rxl = *rx_len;
1034
1035         memset(rx_buf, 0, *rx_len);
1036
1037         switch (frametype) {
1038         case RFID_14443A_FRAME_REGULAR:
1039         case RFID_MIFARE_FRAME:
1040                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
1041                                 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
1042                 break;
1043         case RFID_14443B_FRAME_REGULAR:
1044                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
1045                                 |RC632_CR_CRC3309;
1046                 break;
1047 #if 0
1048         case RFID_MIFARE_FRAME:
1049                 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
1050                 break;
1051 #endif
1052         case RFID_15693_FRAME:
1053                 channel_red = RC632_CR_CRC3309 | RC632_CR_RX_CRC_ENABLE
1054                                 | RC632_CR_TX_CRC_ENABLE;
1055                 break;
1056         case RFID_15693_FRAME_ICODE1:
1057                 /* FIXME: implement */
1058         default:
1059                 return -EINVAL;
1060                 break;
1061         }
1062         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1063                               channel_red);
1064         if (ret < 0)
1065                 return ret;
1066         DEBUGP("tx_len=%u\n",tx_len);
1067         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, timeout, 0);
1068         *rx_len = rxl;
1069         if (ret < 0)
1070                 return ret;
1071
1072
1073         return 0;
1074 }
1075
1076 /* transceive anti collission bitframe */
1077 static int
1078 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
1079                                 struct iso14443a_anticol_cmd *acf,
1080                                 unsigned int *bit_of_col)
1081 {
1082         int ret;
1083         u_int8_t rx_buf[64];
1084         u_int8_t rx_len = sizeof(rx_buf);
1085         u_int8_t rx_align = 0, tx_last_bits, tx_bytes, tx_bytes_total;
1086         u_int8_t boc;
1087         u_int8_t error_flag;
1088         *bit_of_col = ISO14443A_BITOFCOL_NONE;
1089         memset(rx_buf, 0, sizeof(rx_buf));
1090
1091         /* disable mifare cryto */
1092         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
1093                                 RC632_CONTROL_CRYPTO1_ON);
1094         if (ret < 0)
1095                 return ret;
1096
1097         /* disable CRC summing */
1098 #if 0
1099         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1100                                 (RC632_CR_PARITY_ENABLE |
1101                                  RC632_CR_PARITY_ODD));
1102 #else
1103         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1104                                 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1105 #endif
1106         if (ret < 0)
1107                 return ret;
1108
1109         tx_last_bits = acf->nvb & 0x07; /* lower nibble indicates bits */
1110         tx_bytes = ( acf->nvb >> 4 ) & 0x07;
1111         if (tx_last_bits) {
1112                 tx_bytes_total = tx_bytes+1;
1113                 rx_align = tx_last_bits & 0x07; /* rx frame complements tx */
1114         }
1115         else
1116                 tx_bytes_total = tx_bytes;
1117
1118         /* set RxAlign and TxLastBits*/
1119         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
1120                                 (rx_align << 4) | (tx_last_bits));
1121         if (ret < 0)
1122                 return ret;
1123
1124         ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes_total,
1125                                 rx_buf, &rx_len, 0x32, 0);
1126         if (ret < 0)
1127                 return ret;
1128
1129         /* bitwise-OR the two halves of the split byte */
1130         acf->uid_bits[tx_bytes-2] = (
1131                   (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
1132                 | rx_buf[0]);
1133
1134         /* copy the rest */
1135         if (rx_len)
1136                 memcpy(&acf->uid_bits[tx_bytes-1], &rx_buf[1], rx_len-1);
1137
1138         /* determine whether there was a collission */
1139         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1140         if (ret < 0)
1141                 return ret;
1142
1143         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1144                 /* retrieve bit of collission */
1145                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1146                 if (ret < 0)
1147                         return ret;
1148
1149                 /* bit of collission relative to start of part 1 of
1150                  * anticollision frame (!) */
1151                 *bit_of_col = 2*8 + boc;
1152         }
1153
1154         return 0;
1155 }
1156
1157 enum rc632_rate {
1158         RC632_RATE_106  = 0x00,
1159         RC632_RATE_212  = 0x01,
1160         RC632_RATE_424  = 0x02,
1161         RC632_RATE_848  = 0x03,
1162 };
1163
1164 struct rx_config {
1165         u_int8_t        subc_pulses;
1166         u_int8_t        rx_coding;
1167         u_int8_t        rx_threshold;
1168         u_int8_t        bpsk_dem_ctrl;
1169 };
1170
1171 struct tx_config {
1172         u_int8_t        rate;
1173         u_int8_t        mod_width;
1174 };
1175
1176 static struct rx_config rx_configs[] = {
1177         {
1178                 .subc_pulses    = RC632_RXCTRL1_SUBCP_8,
1179                 .rx_coding      = RC632_DECCTRL_MANCHESTER,
1180                 .rx_threshold   = 0x88,
1181                 .bpsk_dem_ctrl  = 0x00,
1182         },
1183         {
1184                 .subc_pulses    = RC632_RXCTRL1_SUBCP_4,
1185                 .rx_coding      = RC632_DECCTRL_BPSK,
1186                 .rx_threshold   = 0x50,
1187                 .bpsk_dem_ctrl  = 0x0c,
1188         },
1189         {
1190                 .subc_pulses    = RC632_RXCTRL1_SUBCP_2,
1191                 .rx_coding      = RC632_DECCTRL_BPSK,
1192                 .rx_threshold   = 0x50,
1193                 .bpsk_dem_ctrl  = 0x0c,
1194         },
1195         {
1196                 .subc_pulses    = RC632_RXCTRL1_SUBCP_1,
1197                 .rx_coding      = RC632_DECCTRL_BPSK,
1198                 .rx_threshold   = 0x50,
1199                 .bpsk_dem_ctrl  = 0x0c,
1200         },
1201 };
1202
1203 static struct tx_config tx_configs[] = {
1204         {
1205                 .rate           = RC632_CDRCTRL_RATE_106K,
1206                 .mod_width      = 0x13,
1207         },
1208         {
1209                 .rate           = RC632_CDRCTRL_RATE_212K,
1210                 .mod_width      = 0x07,
1211         },
1212         {
1213                 .rate           = RC632_CDRCTRL_RATE_424K,
1214                 .mod_width      = 0x03,
1215         },
1216         {
1217                 .rate           = RC632_CDRCTRL_RATE_848K,
1218                 .mod_width      = 0x01,
1219         },
1220 };
1221
1222 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
1223                                      unsigned int tx, unsigned int rate)
1224 {
1225         int rc;
1226         u_int8_t reg;
1227
1228
1229         if (!tx) {
1230                 /* Rx */
1231                 if (rate > ARRAY_SIZE(rx_configs))
1232                         return -EINVAL;
1233
1234                 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
1235                                         RC632_RXCTRL1_SUBCP_MASK,
1236                                         rx_configs[rate].subc_pulses);
1237                 if (rc < 0)
1238                         return rc;
1239
1240                 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
1241                                         RC632_DECCTRL_BPSK,
1242                                         rx_configs[rate].rx_coding);
1243                 if (rc < 0)
1244                         return rc;
1245
1246                 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1247                                         rx_configs[rate].rx_threshold);
1248                 if (rc < 0)
1249                         return rc;
1250
1251                 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
1252                         rc = rc632_reg_write(handle,
1253                                              RC632_REG_BPSK_DEM_CONTROL,
1254                                              rx_configs[rate].bpsk_dem_ctrl);
1255                         if (rc < 0)
1256                                 return rc;
1257                 }
1258         } else {
1259                 /* Tx */
1260                 if (rate > ARRAY_SIZE(tx_configs))
1261                         return -EINVAL;
1262
1263                 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
1264                                         RC632_CDRCTRL_RATE_MASK,
1265                                         tx_configs[rate].rate);
1266                 if (rc < 0)
1267                         return rc;
1268
1269                 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
1270                                      tx_configs[rate].mod_width);
1271                 if (rc < 0)
1272                         return rc;
1273         }
1274
1275         return 0;
1276 }
1277
1278 #if 0
1279 static struct register_file iso14443b_script[] = {
1280         {
1281                 .reg    = RC632_REG_TX_CONTROL,
1282                 .val    = (RC632_TXCTRL_TX1_RF_EN |
1283                            RC632_TXCTRL_TX2_RF_EN |
1284                            RC632_TXCTRL_TX2_INV |
1285                            RC632_TXCTRL_MOD_SRC_INT),
1286         }, {
1287                 .reg    = RC632_REG_CW_CONDUCTANCE,
1288                 .val    = 0x3f,
1289         }, {
1290                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1291                 .val    = 0x04,
1292         }, {
1293                 .reg    = RC632_REG_CODER_CONTROL,
1294                 .val    = (RC632_CDRCTRL_TXCD_NRZ |
1295                            RC632_CDRCTRL_RATE_14443B),
1296         }, {
1297                 .reg    = RC632_REG_MOD_WIDTH,
1298                 .val    = 0x13,
1299         }, {
1300                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1301                 .val    = 0x3f,
1302         }, {
1303                 .reg    = RC632_REG_TYPE_B_FRAMING,
1304                 .val    = (RC632_TBFRAMING_SOF_11L_3H |
1305                            (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1306                            RC632_TBFRAMING_EOF_11);
1307         }, {
1308                 .reg    = RC632_REG_RX_CONTROL1,
1309                 .val    = (RC632_RXCTRL1_GAIN_35DB |
1310                            RC632_RXCTRL1_ISO14443,
1311                            RC632_RXCTRL1_SUBCP_8),
1312         }, {
1313                 .reg    = RC632_REG_DECODER_CONTROL,
1314                 .val    = (RC632_DECCTRL_BPSK |
1315                            RC632_DECCTRL_RXFR_14443B),
1316         }, {
1317                 .reg    = RC632_REG_BIT_PHASE,
1318                 .val    = CM5121_14443B_BITPHASE,
1319         }, {
1320                 .reg    = RC632_REG_RX_THRESHOLD,
1321                 .val    = CM5121_14443B_THRESHOLD,
1322         }, {
1323                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1324                 .val    = ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1325                            (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1326                            RC632_BPSKD_FILTER_AMP_DETECT |
1327                            RC632_BPSKD_NO_RX_EOF |
1328                            RC632_BPSKD_NO_RX_EGT),
1329         }, {
1330                 .reg    = RC632_REG_RX_CONTROL2,
1331                 .val    = (RC632_RXCTRL2_AUTO_PD |
1332                            RC632_RXCTRL2_DECSRC_INT),
1333         }, {
1334                 .reg    = RC632_REG_RX_WAIT,
1335                 .val    = 0x03,
1336         }, {
1337                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1338                 .val    = (RC632_CR_TX_CRC_ENABLE |
1339                            RC632_CR_RX_CRC_ENABLE |
1340                            RC632_CR_CRC3309),
1341         }, {
1342                 .reg    = RC632_REG_CRC_PRESET_LSB,
1343                 .val    = 0xff,
1344         }, {
1345                 .reg    = RC632_REG_CRC_PRESET_MSB,
1346                 .val    = 0xff,
1347         },
1348 };
1349 #endif
1350
1351 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
1352 {
1353         int ret;
1354         ENTER();
1355         /* FIXME: some FIFO work */
1356
1357         /* flush fifo (our way) */
1358         ret = rc632_reg_write(handle, RC632_REG_CONTROL,
1359                               RC632_CONTROL_FIFO_FLUSH);
1360         if (ret < 0)
1361                 return ret;
1362
1363         ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
1364                         (RC632_TXCTRL_TX1_RF_EN |
1365                          RC632_TXCTRL_TX2_RF_EN |
1366                          RC632_TXCTRL_TX2_INV |
1367                          RC632_TXCTRL_MOD_SRC_INT));
1368         if (ret < 0)
1369                 return ret;
1370
1371         ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
1372         if (ret < 0)
1373                 return ret;
1374
1375         ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
1376         if (ret < 0)
1377                 return ret;
1378
1379         ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
1380                               (RC632_CDRCTRL_TXCD_NRZ |
1381                                RC632_CDRCTRL_RATE_14443B));
1382         if (ret < 0)
1383                 return ret;
1384
1385         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
1386         if (ret < 0)
1387                 return ret;
1388
1389         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1390         if (ret < 0)
1391                 return ret;
1392
1393         ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
1394                               (RC632_TBFRAMING_SOF_11L_3H |
1395                                (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1396                                RC632_TBFRAMING_EOF_11));
1397         if (ret < 0)
1398                 return ret;
1399
1400         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
1401                               (RC632_RXCTRL1_GAIN_35DB |
1402                                RC632_RXCTRL1_ISO14443 |
1403                                RC632_RXCTRL1_SUBCP_8));
1404         if (ret < 0)
1405                 return ret;
1406
1407         ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
1408                               (RC632_DECCTRL_BPSK |
1409                                RC632_DECCTRL_RXFR_14443B));
1410         if (ret < 0)
1411                 return ret;
1412
1413         ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
1414                                 CM5121_14443B_BITPHASE);
1415         if (ret < 0)
1416                 return ret;
1417
1418         ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1419                                 CM5121_14443B_THRESHOLD);
1420         if (ret < 0)
1421                 return ret;
1422
1423         ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1424                               ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1425                                (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1426                                RC632_BPSKD_FILTER_AMP_DETECT |
1427                                RC632_BPSKD_NO_RX_EOF |
1428                                RC632_BPSKD_NO_RX_EGT));
1429         if (ret < 0)
1430                 return ret;
1431
1432         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1433                               (RC632_RXCTRL2_AUTO_PD |
1434                                RC632_RXCTRL2_DECSRC_INT));
1435         if (ret < 0)
1436                 return ret;
1437
1438         ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1439         if (ret < 0)
1440                 return ret;
1441
1442         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1443                               (RC632_CR_TX_CRC_ENABLE |
1444                                RC632_CR_RX_CRC_ENABLE |
1445                                RC632_CR_CRC3309));
1446         if (ret < 0)
1447                 return ret;
1448
1449         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1450         if (ret < 0)
1451                 return ret;
1452
1453         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1454         if (ret < 0)
1455                 return ret;
1456
1457         return 0;
1458 }
1459
1460
1461
1462 /*
1463  * ISO15693
1464  */
1465
1466 /* Register file for ISO15693 standard */
1467 static struct register_file iso15693_fast_script[] = {
1468         {
1469                 .reg    = RC632_REG_TX_CONTROL,
1470                 .val    = RC632_TXCTRL_MOD_SRC_INT |
1471                           RC632_TXCTRL_TX2_INV |
1472                           RC632_TXCTRL_TX2_RF_EN |
1473                           RC632_TXCTRL_TX1_RF_EN,
1474         }, {
1475                 .reg    = RC632_REG_CW_CONDUCTANCE,
1476                 .val    = 0x3f,
1477         }, {
1478                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1479                 /* FIXME: nxp default for icode1/15693: 0x05 */
1480                 //.val  = 0x02,
1481                 .val    = 0x21, /* omnikey */
1482         }, {
1483                 .reg    = RC632_REG_CODER_CONTROL,
1484                 .val    = RC632_CDRCTRL_TXCD_15693_FAST |
1485                           RC632_CDRCTRL_RATE_15693,
1486         }, {
1487                 .reg    = RC632_REG_MOD_WIDTH,
1488                 .val    = 0x3f,
1489         }, {
1490                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1491                 .val    = 0x3f,
1492         }, {
1493                 .reg    = RC632_REG_TYPE_B_FRAMING,
1494                 .val    = 0x00,
1495         }, {
1496                 .reg    = RC632_REG_RX_CONTROL1,
1497                 .val    = RC632_RXCTRL1_ISO15693 |
1498                           RC632_RXCTRL1_SUBCP_16 |
1499                           RC632_RXCTRL1_GAIN_35DB,
1500         }, {
1501                 /* FIXME: this should always be the case */
1502                 .reg    = RC632_REG_RX_CONTROL2,
1503                 .val    = RC632_RXCTRL2_DECSRC_INT,
1504         }, {
1505                 .reg    = RC632_REG_DECODER_CONTROL,
1506                 .val    = RC632_DECCTRL_MANCHESTER |
1507                           RC632_DECCTRL_RX_INVERT |
1508                           RC632_DECCTRL_ZEROAFTERCOL |
1509                           RC632_DECCTRL_RXFR_15693,
1510         }, {
1511                 .reg    = RC632_REG_BIT_PHASE,
1512                 /* FIXME: nxp default for icode1/15693: 0x54 */
1513                 //.val  = 0x52,
1514                 .val    = 0xd0, /* omnikey */
1515         }, {
1516                 .reg    = RC632_REG_RX_THRESHOLD,
1517                 /* FIXME: nxp default for icode1/15693: 0x68 */
1518                 //.val  = 0x66,
1519                 .val    = 0xed,
1520         }, {
1521                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1522                 .val    = 0x00,
1523         }, {
1524                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1525                 .val    = RC632_CR_RX_CRC_ENABLE |
1526                           RC632_CR_TX_CRC_ENABLE |
1527                           RC632_CR_CRC3309,
1528         }, {
1529                 .reg    = RC632_REG_CRC_PRESET_LSB,
1530                 .val    = 0xff,
1531         }, {
1532                 .reg    = RC632_REG_CRC_PRESET_MSB,
1533                 .val    = 0xff,
1534         },
1535 };
1536
1537 /* Register file for I*Code standard */
1538 static struct register_file icode1_std_script[] = {
1539         {
1540                 .reg    = RC632_REG_TX_CONTROL,
1541                 .val    = RC632_TXCTRL_MOD_SRC_INT |
1542                           RC632_TXCTRL_TX2_INV |
1543                           RC632_TXCTRL_TX2_RF_EN |
1544                           RC632_TXCTRL_TX1_RF_EN,
1545         }, {
1546                 .reg    = RC632_REG_CW_CONDUCTANCE,
1547                 .val    = 0x3f,
1548         }, {
1549                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1550                 /* FIXME: nxp default for icode1/15693: 0x05 */
1551                 .val    = 0x02,
1552         }, {
1553                 .reg    = RC632_REG_CODER_CONTROL,
1554                 .val    = RC632_CDRCTRL_TXCD_ICODE_STD |
1555                           RC632_CDRCTRL_RATE_15693,
1556         }, {
1557                 .reg    = RC632_REG_MOD_WIDTH,
1558                 .val    = 0x3f,
1559         }, {
1560                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1561                 .val    = 0x3f,
1562         }, {
1563                 .reg    = RC632_REG_TYPE_B_FRAMING,
1564                 .val    = 0x00,
1565         }, {
1566                 .reg    = RC632_REG_RX_CONTROL1,
1567                 .val    = RC632_RXCTRL1_ISO15693 |
1568                           RC632_RXCTRL1_SUBCP_16 |
1569                           RC632_RXCTRL1_GAIN_35DB,
1570         }, {
1571                 /* FIXME: this should always be the case */
1572                 .reg    = RC632_REG_RX_CONTROL2,
1573                 .val    = RC632_RXCTRL2_DECSRC_INT,
1574         }, {
1575                 .reg    = RC632_REG_DECODER_CONTROL,
1576                 .val    = RC632_DECCTRL_MANCHESTER |
1577                           RC632_DECCTRL_RXFR_ICODE,
1578         }, {
1579                 .reg    = RC632_REG_BIT_PHASE,
1580                 /* FIXME: nxp default for icode1/15693: 0x54 */
1581                 .val    = 0x52,
1582         }, {
1583                 .reg    = RC632_REG_RX_THRESHOLD,
1584                 /* FIXME: nxp default for icode1/15693: 0x68 */
1585                 .val    = 0x66,
1586         }, {
1587                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1588                 .val    = 0x00,
1589         }, {
1590                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1591                 /* 16bit CRC, no parity, not CRC3309 */
1592                 .val    = RC632_CR_RX_CRC_ENABLE |
1593                           RC632_CR_TX_CRC_ENABLE,
1594         }, {
1595                 .reg    = RC632_REG_CRC_PRESET_LSB,
1596                 .val    = 0xfe,
1597         }, {
1598                 .reg    = RC632_REG_CRC_PRESET_MSB,
1599                 .val    = 0xff,
1600         /* }, {
1601                 .reg    = RC632_REG_INTERRUPT_EN,
1602                 .val    = RC632_INT_IDLE |
1603                           RC632_INT_TIMER |
1604                           RC632_INT_RX |
1605                           RC632_INT_TX, */
1606         }
1607 };
1608
1609 /* incremental changes on top of icode1_std_script */
1610 static struct register_file icode1_fast_patch[] = {
1611         {
1612                 .reg    = RC632_REG_CODER_CONTROL,
1613                 .val    = RC632_CDRCTRL_TXCD_ICODE_FAST |
1614                           RC632_CDRCTRL_RATE_ICODE_FAST,
1615         }, {
1616                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1617                 .val    = 0x73, /* 18.88uS */
1618         },
1619 };
1620
1621
1622 static int
1623 rc632_iso15693_init(struct rfid_asic_handle *h)
1624 {
1625         int ret;
1626
1627         /* flush fifo (our way) */
1628         ret = rc632_reg_write(h, RC632_REG_CONTROL,
1629                               RC632_CONTROL_FIFO_FLUSH);
1630         if (ret < 0)
1631                 return ret;
1632
1633         ret = rc632_execute_script(h, iso15693_fast_script,
1634                                    ARRAY_SIZE(iso15693_fast_script));
1635         if (ret < 0)
1636                 return ret;
1637
1638         return 0;
1639 }
1640
1641 static int
1642 rc632_iso15693_icode1_init(struct rfid_asic_handle *h)
1643 {
1644         int ret;
1645
1646         ret = rc632_execute_script(h, icode1_std_script,
1647                                    ARRAY_SIZE(icode1_std_script));
1648         if (ret < 0)
1649                 return ret;
1650
1651         /* FIXME: how to configure fast/slow properly? */
1652 #if 0
1653         if (fast) {
1654                 ret = rc632_execute_script(h, icode1_fast_patch,
1655                                            ARRAY_SIZE(icode1_fast_patch));
1656                 if (ret < 0)
1657                         return ret;
1658         }
1659 #endif
1660
1661         return 0;
1662 }
1663
1664 static int
1665 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1666 {
1667         int ret;
1668
1669         /* ICL */
1670
1671         ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1672                                                 (RC632_TXCTRL_MOD_SRC_INT |
1673                                                  RC632_TXCTRL_TX2_INV |
1674                                                  RC632_TXCTRL_TX2_RF_EN |
1675                                                  RC632_TXCTRL_TX1_RF_EN));
1676         if (ret < 0)
1677                 return ret;
1678
1679         ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1680         if (ret < 0)
1681                 return ret;
1682
1683         ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1684         if (ret < 0)
1685                 return ret;
1686
1687         ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1688                                                 (RC632_CDRCTRL_RATE_15693 |
1689                                                  RC632_CDRCTRL_TXCD_ICODE_STD |
1690                                                  0x03)); /* FIXME */
1691         if (ret < 0)
1692                 return ret;
1693
1694         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1695         if (ret < 0)
1696                 return ret;
1697
1698         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1699         if (ret < 0)
1700                 return ret;
1701         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1702                                                 (RC632_RXCTRL1_SUBCP_16|
1703                                                  RC632_RXCTRL1_ISO15693|
1704                                                  RC632_RXCTRL1_GAIN_35DB));
1705         if (ret < 0)
1706                 return ret;
1707         ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1708                                                 (RC632_DECCTRL_RX_INVERT|
1709                                                  RC632_DECCTRL_RXFR_15693));
1710         if (ret < 0)
1711                 return ret;
1712
1713         ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1714         if (ret < 0)
1715                 return ret;
1716
1717         ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1718         if (ret < 0)
1719                 return ret;
1720
1721         ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1722         if (ret < 0)
1723                 return ret;
1724
1725         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1726                                                 RC632_RXCTRL2_DECSRC_INT);
1727         if (ret < 0)
1728                 return ret;
1729
1730         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1731         if (ret < 0)
1732                 return ret;
1733
1734         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1735         if (ret < 0)
1736                 return ret;
1737
1738         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1739         if (ret < 0)
1740                 return ret;
1741
1742         return 0;
1743 }
1744
1745 static void uuid_reversecpy(unsigned char* out, unsigned char* in, int len)
1746 {
1747         int i = 0;
1748         while (len > 0) {
1749                 out[i] = in[len];
1750                 len--;
1751                 i++;
1752         }
1753 }
1754
1755 static int
1756 rc632_iso15693_transceive_ac(struct rfid_asic_handle *handle,
1757                              const struct iso15693_anticol_cmd *acf,
1758                              unsigned int acf_len,
1759                              struct iso15693_anticol_resp *resp,
1760                              unsigned int *rx_len, unsigned char *bit_of_col)
1761 {
1762         u_int8_t error_flag, boc;
1763         //u_int8_t rx_len;
1764
1765         int ret, tx_len, mask_len_bytes;
1766         unsigned int rate = ISO15693_T_SLOW;
1767
1768         if (acf->req.flags & RFID_15693_F_RATE_HIGH)
1769                 rate = ISO15693_T_FAST;
1770
1771         DEBUGP("acf = %s\n", rfid_hexdump(acf, acf_len));
1772
1773         ret = rc632_transceive(handle, (u_int8_t *)acf, acf_len,
1774                                (u_int8_t *) resp, rx_len,
1775                                iso15693_timing[rate][ISO15693_T1], 0);
1776         if (ret == -ETIMEDOUT || ret == -EIO)
1777                 return ret;
1778
1779         /* determine whether there was a collission */
1780         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1781         if (ret < 0)
1782                 return ret;
1783         DEBUGP_ERROR_FLAG(error_flag);
1784
1785         //FIXME: check for framing and crc errors...
1786         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1787                 /* retrieve bit of collission */
1788                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1789                 if (ret < 0)
1790                         return ret;
1791                 *bit_of_col = boc;
1792         } else {
1793                 *bit_of_col = 0;
1794                 if (error_flag & RC632_ERR_FLAG_CRC_ERR)
1795                         return -EIO;
1796         }
1797
1798         return 0;
1799
1800 #if 0
1801         *bit_of_col = 0;
1802
1803         mask_len_bytes = (acf->mask_len % 8) ? acf->mask_len/8+1 : acf->mask_len/8;
1804
1805         if (acf->current_slot == 0) {
1806                 /* first call: transmit Inventory frame */
1807                 DEBUGP("first_frame\n");
1808
1809                 tx_len = sizeof(struct iso15693_request) + 1 + mask_len_bytes;
1810
1811                 ret = rc632_transceive(handle, (u_int8_t *)&req, tx_len,
1812                                         (u_int8_t *)&rx_buf, &rx_len, ISO15693_T1, 0);
1813                 acf->current_slot = 1;
1814                 DEBUGP("rc632_transceive ret: %d rx_len: %d\n",ret,rx_len);
1815                 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1816                         return ret;     */
1817
1818         } else {
1819                 /* second++ call: end timeslot with EOFpulse and read */
1820                 DEBUGP("second++_frame\n");
1821                 if ((acf->current_slot > 16) ||
1822                     ((acf->flags & RFID_15693_F5_NSLOTS_1 == 0)
1823                                         && (acf->current_slot > 1))) {
1824
1825                         memset(uuid, 0, ISO15693_UID_LEN);
1826                         return -1;
1827                 }
1828
1829                 /* reset EOF-pulse-bit to 0 */
1830                 ret = rc632_clear_bits(handle, RC632_REG_CODER_CONTROL,
1831                                        RC632_CDRCTRL_15693_EOF_PULSE);
1832                 usleep(50);
1833                 /* generate EOF pulse */
1834                 ret = rc632_set_bits(handle, RC632_REG_CODER_CONTROL,
1835                                      RC632_CDRCTRL_15693_EOF_PULSE);
1836                 if (ret < 0)
1837                         return ret;
1838                 // DEBUGP("waiting for EOF pulse\n");
1839                 // ret = rc632_wait_idle(handle, 10); //wait for idle
1840
1841                 rx_len = sizeof(rx_buf);
1842                 ret = rc632_receive(handle, (u_int8_t*)&rx_buf, &rx_len, ISO15693_T3);
1843                 DEBUGP("rc632_receive ret: %d rx_len: %d\n", ret, rx_len);
1844                 acf->current_slot++;
1845
1846                 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1847                         return ret; */
1848         }
1849
1850         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
1851         DEBUGP_STATUS_FLAG(tmp);
1852
1853         if (ret == -ETIMEDOUT) {
1854                 /* no VICC answer in this timeslot*/
1855                 memset(uuid, 0, ISO15693_UID_LEN);
1856                 return -ETIMEDOUT;
1857         } else {
1858                 /* determine whether there was a collission */
1859                 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1860                 DEBUGP_ERROR_FLAG(error_flag);
1861                 if (ret < 0)
1862                         return ret;
1863
1864                 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1865                         /* retrieve bit of collission */
1866                         ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1867                         if (ret < 0)
1868                                 return ret;
1869                         *bit_of_col = boc;
1870                         memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1871                         // uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1872                         DEBUGP("Collision in slot %d bit %d\n",
1873                                 acf->current_slot,boc);
1874                         return -ECOLLISION;
1875                 } else {
1876                         /* no collision-> retrieve uuid */
1877                         DEBUGP("no collision in slot %d\n", acf->current_slot);
1878                         memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1879                         //uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1880                 }
1881         }
1882
1883         return 0;
1884 #endif
1885 }
1886
1887 struct mifare_authcmd {
1888         u_int8_t auth_cmd;
1889         u_int8_t block_address;
1890         u_int32_t serno;        /* lsb 1 2 msb */
1891 } __attribute__ ((packed));
1892
1893
1894 #define RFID_MIFARE_KEY_LEN 6
1895 #define RFID_MIFARE_KEY_CODED_LEN 12
1896
1897 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1898 static int
1899 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1900 {
1901         int i;
1902         u_int8_t ln;
1903         u_int8_t hn;
1904
1905         for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1906                 ln = key6[i] & 0x0f;
1907                 hn = key6[i] >> 4;
1908                 key12[i * 2 + 1] = (~ln << 4) | ln;
1909                 key12[i * 2] = (~hn << 4) | hn;
1910         }
1911         return 0;
1912 }
1913
1914 static int
1915 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1916 {
1917         u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1918         u_int8_t reg;
1919         int ret;
1920
1921         ret = rc632_mifare_transform_key(key, coded_key);
1922         if (ret < 0)
1923                 return ret;
1924
1925         /* Terminate probably running command */
1926         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1927         if (ret < 0)
1928                 return ret;
1929
1930         ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1931         if (ret < 0)
1932                 return ret;
1933
1934         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1935         if (ret < 0)
1936                 return ret;
1937
1938         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1939         if (ret < 0)
1940                 return ret;
1941
1942         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1943         ret = rc632_wait_idle_timer(h);
1944         if (ret < 0)
1945                 return ret;
1946
1947         ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, &reg);
1948         if (ret < 0)
1949                 return ret;
1950
1951         if (reg & RC632_ERR_FLAG_KEY_ERR)
1952                 return -EINVAL;
1953
1954         return 0;
1955 }
1956
1957 static int
1958 rc632_mifare_set_key_ee(struct rfid_asic_handle *h, unsigned int addr)
1959 {
1960         int ret;
1961         u_int8_t cmd_addr[2];
1962         u_int8_t reg;
1963
1964         if (addr > 0xffff - RFID_MIFARE_KEY_CODED_LEN)
1965                 return -EINVAL;
1966
1967         cmd_addr[0] = addr & 0xff;              /* LSB */
1968         cmd_addr[1] = (addr >> 8) & 0xff;       /* MSB */
1969
1970         /* Terminate probably running command */
1971         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1972         if (ret < 0)
1973                 return ret;
1974
1975         /* Write the key address to the FIFO */
1976         ret = rc632_fifo_write(h, 2, cmd_addr, 0x03);
1977         if (ret < 0)
1978                 return ret;
1979
1980         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY_E2);
1981         if (ret < 0)
1982                 return ret;
1983
1984         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1985         if (ret < 0)
1986                 return ret;
1987
1988         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1989         ret = rc632_wait_idle_timer(h);
1990         if (ret < 0)
1991                 return ret;
1992
1993         ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, &reg);
1994         if (ret < 0)
1995                 return ret;
1996
1997         if (reg & RC632_ERR_FLAG_KEY_ERR)
1998                 return -EINVAL;
1999
2000         return 0;
2001 }
2002
2003 static int
2004 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
2005                   u_int8_t block)
2006 {
2007         int ret;
2008         struct mifare_authcmd acmd;
2009         u_int8_t reg;
2010
2011         if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B) {
2012                 DEBUGP("invalid auth command\n");
2013                 return -EINVAL;
2014         }
2015
2016         /* Initialize acmd */
2017         acmd.block_address = block & 0xff;
2018         acmd.auth_cmd = cmd;
2019         //acmd.serno = htonl(serno);
2020         acmd.serno = serno;
2021
2022 #if 1
2023         /* Clear Rx CRC */
2024         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
2025                                 RC632_CR_RX_CRC_ENABLE);
2026 #else
2027         /* Clear Rx CRC, Set Tx CRC and Odd Parity */
2028         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
2029                                 RC632_CR_TX_CRC_ENABLE | RC632_CR_PARITY_ODD |
2030                                 RC632_CR_PARITY_ENABLE);
2031 #endif
2032         if (ret < 0)
2033                 return ret;
2034
2035         /* Send Authent1 Command */
2036         ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
2037         if (ret < 0)
2038                 return ret;
2039
2040         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
2041         if (ret < 0) {
2042                 DEBUGP("error during AUTHENT1");
2043                 return ret;
2044         }
2045
2046         /* Wait until transmitter is idle */
2047         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
2048         if (ret < 0)
2049                 return ret;
2050
2051         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
2052         ret = rc632_wait_idle_timer(h);
2053         if (ret < 0)
2054                 return ret;
2055
2056         ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, &reg);
2057         if (ret < 0)
2058                 return ret;
2059         if (reg & 0x07) {
2060                 DEBUGP("bitframe?");
2061                 return -EIO;
2062         }
2063
2064         /* Clear Tx CRC */
2065         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
2066                                 RC632_CR_TX_CRC_ENABLE);
2067         if (ret < 0)
2068                 return ret;
2069
2070         /* Wait until transmitter is idle */
2071         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
2072         if (ret < 0)
2073                 return ret;
2074
2075         /* Send Authent2 Command */
2076         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
2077         if (ret < 0)
2078                 return ret;
2079
2080         /* Wait until transmitter is idle */
2081         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
2082         ret = rc632_wait_idle_timer(h);
2083         if (ret < 0)
2084                 return ret;
2085
2086         /* Check whether authentication was successful */
2087         ret = rc632_reg_read(h, RC632_REG_CONTROL, &reg);
2088         if (ret < 0)
2089                 return ret;
2090
2091         if (!(reg & RC632_CONTROL_CRYPTO1_ON)) {
2092                 DEBUGP("authentication not successful");
2093                 return -EACCES;
2094         }
2095
2096         return 0;
2097 }
2098
2099 /* transceive regular frame */
2100 static int
2101 rc632_mifare_transceive(struct rfid_asic_handle *handle,
2102                         const u_int8_t *tx_buf, unsigned int tx_len,
2103                         u_int8_t *rx_buf, unsigned int *rx_len,
2104                         u_int64_t timeout, unsigned int flags)
2105 {
2106         int ret;
2107         u_int8_t rxl = *rx_len & 0xff;
2108
2109         DEBUGP("entered\n");
2110         memset(rx_buf, 0, *rx_len);
2111
2112 #if 1
2113         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
2114                                 (RC632_CR_PARITY_ENABLE |
2115                                  RC632_CR_PARITY_ODD |
2116                                  RC632_CR_TX_CRC_ENABLE |
2117                                  RC632_CR_RX_CRC_ENABLE));
2118 #else
2119         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
2120                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
2121 #endif
2122         if (ret < 0)
2123                 return ret;
2124
2125         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
2126         *rx_len = rxl;
2127         if (ret < 0)
2128                 return ret;
2129
2130
2131         return 0;
2132 }
2133
2134
2135 static int
2136 rc632_layer2_init(struct rfid_asic_handle *h, enum rfid_layer2_id l2)
2137 {
2138         switch (l2) {
2139         case RFID_LAYER2_ISO14443A:
2140                 return rc632_iso14443a_init(h);
2141         case RFID_LAYER2_ISO14443B:
2142                 return rc632_iso14443b_init(h);
2143         case RFID_LAYER2_ISO15693:
2144                 return rc632_iso15693_init(h);
2145         case RFID_LAYER2_ICODE1:
2146                 return rc632_iso15693_icode1_init(h);
2147         default:
2148                 return -EINVAL;
2149         }
2150 }
2151
2152 const struct rfid_asic rc632 = {
2153         .name   = "Philips CL RC632",
2154         .fc     = ISO14443_FREQ_CARRIER,
2155         .priv.rc632 = {
2156                 .fn = {
2157                         .power = &rc632_power,
2158                         .rf_power = &rc632_rf_power,
2159                         .transceive = &rc632_iso14443ab_transceive,
2160                         .init = &rc632_layer2_init,
2161                         .iso14443a = {
2162                                 .transceive_sf = &rc632_iso14443a_transceive_sf,
2163                                 .transceive_acf = &rc632_iso14443a_transceive_acf,
2164                                 .set_speed = &rc632_iso14443a_set_speed,
2165                         },
2166                         .iso15693 = {
2167                                 .transceive_ac = &rc632_iso15693_transceive_ac,
2168                         },
2169                         .mifare_classic = {
2170                                 .setkey = &rc632_mifare_set_key,
2171                                 .setkey_ee = &rc632_mifare_set_key_ee,
2172                                 .auth = &rc632_mifare_auth,
2173                         },
2174                 },
2175         },
2176 };