1 /* Generic Philips CL RC632 Routines
3 * (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
29 #include <sys/types.h>
31 #include <librfid/rfid.h>
32 #include <librfid/rfid_asic.h>
33 #include <librfid/rfid_asic_rc632.h>
34 #include <librfid/rfid_reader_cm5121.h>
35 #include <librfid/rfid_layer2_iso14443a.h>
36 #include <librfid/rfid_layer2_iso15693.h>
37 #include <librfid/rfid_protocol_mifare_classic.h>
39 #include "rfid_iso14443_common.h"
46 #define RC632_TMO_AUTH1 140
48 #define TIMER_RELAX_FACTOR 10
50 #define ENTER() DEBUGP("entering\n")
51 const struct rfid_asic rc632;
53 struct register_file {
58 /* Register and FIFO Access functions */
60 rc632_reg_write(struct rfid_asic_handle *handle,
64 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
68 rc632_reg_read(struct rfid_asic_handle *handle,
72 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
76 rc632_fifo_write(struct rfid_asic_handle *handle,
81 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
86 rc632_fifo_read(struct rfid_asic_handle *handle,
90 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
95 rc632_set_bits(struct rfid_asic_handle *handle,
102 ret = rc632_reg_read(handle, reg, &tmp);
106 /* if bits are already set, no need to set them again */
107 if ((tmp & val) == val)
110 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
113 rc632_set_bit_mask(struct rfid_asic_handle *handle,
114 u_int8_t reg, u_int8_t mask, u_int8_t val)
119 ret = rc632_reg_read(handle, reg, &tmp);
123 /* if bits are already like we want them, abort */
124 if ((tmp & mask) == val)
127 return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
131 rc632_clear_bits(struct rfid_asic_handle *handle,
138 ret = rc632_reg_read(handle, reg, &tmp);
140 DEBUGP("error during reg_read(%p, %d):%d\n",
144 /* if bits are already cleared, no need to clear them again */
145 if ((tmp & val) == 0)
148 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
152 rc632_clear_irqs(struct rfid_asic_handle *handle, u_int8_t bits)
154 return rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, (~RC632_INT_SET)&bits);
158 rc632_rf_power(struct rfid_asic_handle *handle, int on)
162 return rc632_set_bits(handle, RC632_REG_TX_CONTROL,
163 RC632_TXCTRL_TX1_RF_EN|
164 RC632_TXCTRL_TX2_RF_EN);
166 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL,
167 RC632_TXCTRL_TX1_RF_EN|
168 RC632_TXCTRL_TX2_RF_EN);
172 rc632_power(struct rfid_asic_handle *handle, int on)
176 return rc632_clear_bits(handle, RC632_REG_CONTROL,
177 RC632_CONTROL_POWERDOWN);
179 return rc632_set_bits(handle, RC632_REG_CONTROL,
180 RC632_CONTROL_POWERDOWN);
184 rc632_execute_script(struct rfid_asic_handle *h, struct register_file *f,
189 for (i = 0; i < len; i++) {
190 ret = rc632_reg_write(h, f[i].reg, f[i].val);
198 /* calculate best 8bit prescaler and divisor for given usec timeout */
199 static int best_prescaler(u_int64_t timeout, u_int8_t *prescaler,
202 u_int8_t best_prescaler, best_divisor, i;
203 int64_t smallest_diff;
205 smallest_diff = LLONG_MAX;
208 for (i = 0; i < 21; i++) {
209 u_int64_t clk, tmp_div, res;
211 clk = 13560000 / (1 << i);
212 tmp_div = (clk * timeout) / 1000000;
215 if ((tmp_div > 0xff) || (tmp_div > clk))
218 res = 1000000 / (clk / tmp_div);
219 diff = res - timeout;
224 if (diff < smallest_diff) {
226 best_divisor = tmp_div;
227 smallest_diff = diff;
231 *prescaler = best_prescaler;
232 *divisor = best_divisor;
234 DEBUGP("timeout %u usec, prescaler = %u, divisor = %u\n",
235 timeout, best_prescaler, best_divisor);
241 rc632_timer_set(struct rfid_asic_handle *handle,
245 u_int8_t prescaler, divisor;
247 timeout *= TIMER_RELAX_FACTOR;
249 ret = best_prescaler(timeout, &prescaler, &divisor);
251 ret = rc632_reg_write(handle, RC632_REG_TIMER_CLOCK,
256 ret = rc632_reg_write(handle, RC632_REG_TIMER_CONTROL,
257 RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
259 /* clear timer irq bit */
260 ret = rc632_set_bits(handle, RC632_REG_INTERRUPT_RQ, RC632_IRQ_TIMER);
262 ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
267 /* Wait until RC632 is idle or TIMER IRQ has happened */
268 static int rc632_wait_idle_timer(struct rfid_asic_handle *handle)
271 u_int8_t stat, irq, cmd;
274 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &stat);
275 DEBUGP_STATUS_FLAG(stat);
276 if (stat & RC632_STAT_ERR) {
278 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &err);
279 DEBUGP_ERROR_FLAG(err);
280 if (err & (RC632_ERR_FLAG_COL_ERR |
281 RC632_ERR_FLAG_PARITY_ERR |
282 RC632_ERR_FLAG_FRAMING_ERR |
283 RC632_ERR_FLAG_CRC_ERR))
286 if (stat & RC632_STAT_IRQ) {
287 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
290 DEBUGP_INTERRUPT_FLAG(irq);
292 if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
293 DEBUGP("timer expired before RX!!\n");
298 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
305 /* poll every millisecond */
310 /* Stupid RC632 implementations don't evaluate interrupts but poll the
311 * command register for "status idle" */
313 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
317 #define USLEEP_PER_CYCLE 128
319 timeout *= TIMER_RELAX_FACTOR;
322 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
328 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
329 DEBUGP_STATUS_FLAG(foo);
330 /* check if Error has occured (ERR flag set) */
331 if (foo & RC632_STAT_ERR) {
332 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
333 DEBUGP_ERROR_FLAG(foo);
335 /* check if IRQ has occurred (IRQ flag set)*/
336 if (foo & RC632_STAT_IRQ) {
337 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &foo);
338 DEBUGP_INTERRUPT_FLAG(foo);
339 /* clear all interrupts */
340 rc632_clear_irqs(handle, 0xff);
344 /* FIXME: read second time ?? */
345 DEBUGP("cmd == 0 (IDLE)\n");
349 /* Abort after some timeout */
350 if (cycles > timeout/USLEEP_PER_CYCLE) {
351 DEBUGP("timeout...\n");
356 usleep(USLEEP_PER_CYCLE);
363 rc632_transmit(struct rfid_asic_handle *handle,
369 const u_int8_t *cur_buf = buf;
371 DEBUGP("timeout=%u, tx_len=%u\n", timeout, len);
379 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
383 if (cur_buf == buf) {
384 /* only start transmit first time */
385 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
392 if (cur_buf < buf + len) {
393 cur_len = buf - cur_buf;
401 return rc632_wait_idle(handle, timeout);
405 tcl_toggle_pcb(struct rfid_asic_handle *handle)
407 /* FIXME: toggle something between 0x0a and 0x0b */
412 rc632_transceive(struct rfid_asic_handle *handle,
413 const u_int8_t *tx_buf,
420 int ret, cur_tx_len, i;
422 const u_int8_t *cur_tx_buf = tx_buf;
424 DEBUGP("timeout=%u, rx_len=%u, tx_len=%u\n", timer, *rx_len, tx_len);
432 ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00);
433 /* clear all interrupts */
434 ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
435 ret = rc632_reg_write(handle, RC632_REG_ERROR_FLAG, 0xff);
438 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
439 DEBUGP_STATUS_FLAG(tmp);
440 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
441 DEBUGP_STATUS_FLAG(tmp);
442 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
443 DEBUGP_STATUS_FLAG(tmp);
444 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
445 DEBUGP_ERROR_FLAG(tmp);
448 ret = rc632_timer_set(handle, timer);
453 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
457 if (cur_tx_buf == tx_buf) {
458 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
459 RC632_CMD_TRANSCEIVE);
464 cur_tx_buf += cur_tx_len;
465 if (cur_tx_buf < tx_buf + tx_len) {
467 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
472 cur_tx_len = 64 - fifo_fill;
476 } while (cur_tx_len);
479 tcl_toggle_pcb(handle);
481 ret = rc632_wait_idle_timer(handle);
482 //ret = rc632_wait_idle(handle, timer);
484 DEBUGP("rc632_wait_idle >> ret=%d %s\n",ret,(ret==-ETIMEDOUT)?"ETIMEDOUT":"");
488 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
492 if (rx_avail > *rx_len)
493 DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
494 else if (*rx_len > rx_avail)
497 DEBUGP("rx_len == %d\n",*rx_len);
502 for (i = 0; i < 1; i++){
503 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
504 DEBUGP_STATUS_FLAG(tmp);
505 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
506 DEBUGP_ERROR_FLAG(tmp);
508 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
514 return rc632_fifo_read(handle, *rx_len, rx_buf);
515 /* FIXME: discard addidional bytes in FIFO */
520 rc632_receive(struct rfid_asic_handle *handle,
525 int ret, cur_tx_len, i;
528 DEBUGP("timeout=%u, rx_len=%u\n", timer, *rx_len);
529 ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00); /* IDLE */
530 /* clear all interrupts */
531 ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
533 ret = rc632_timer_set(handle, timer);
537 ret = rc632_reg_write(handle, RC632_REG_COMMAND,RC632_CMD_RECEIVE);
541 /* the timer cannot start in hardware based on the command we just
542 * sent. this means that our timing will always be quite a bit more lax,
543 * i.e. we'll always wait for a bit longer than the specs ask us to. */
544 ret = rc632_set_bits(handle, RC632_REG_CONTROL,
545 RC632_CONTROL_TIMER_START);
549 //ret = rc632_wait_idle(handle, timer);
550 ret = rc632_wait_idle_timer(handle);
554 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
558 if (rx_avail > *rx_len) {
559 //printf("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
560 } else if (*rx_len > rx_avail)
566 DEBUGP("rx_len == 0\n");
568 for (i = 0; i < 1; i++) {
569 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
570 DEBUGP_STATUS_FLAG(tmp);
571 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
572 DEBUGP_ERROR_FLAG(tmp);
575 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
579 return rc632_fifo_read(handle, *rx_len, rx_buf);
580 /* FIXME: discard additional bytes in FIFO */
584 rc632_read_eeprom(struct rfid_asic_handle *handle)
586 u_int8_t recvbuf[60];
594 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
598 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
604 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
608 /* FIXME: do something with eeprom contents */
613 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
615 u_int8_t sndbuf[2] = { 0x01, 0x02 };
616 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
619 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
623 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
627 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
631 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
635 usleep(10000); /* FIXME: no checking for cmd completion? *
637 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
641 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
645 /* FIXME: what to do with crc result? */
651 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
656 for (i = 0; i <= 0x3f; i++)
657 ret |= rc632_reg_read(handle, i, &buf[i]);
662 /* generic FIFO access functions (if no more efficient ones provided by
663 * transport driver) */
668 /* FIXME: implementation (not needed for CM 5121) */
675 /* FIXME: implementation (not neded for CM 5121) */
680 rc632_init(struct rfid_asic_handle *ah)
684 /* switch off rf (make sure PICCs are reset at init time) */
685 ret = rc632_power(ah, 0);
692 ret = rc632_power(ah, 1);
696 /* disable register paging */
697 ret = rc632_reg_write(ah, 0x00, 0x00);
701 /* set some sane default values */
702 ret = rc632_reg_write(ah, 0x11, 0x5b);
707 ret = rc632_rf_power(ah, 0);
714 ret = rc632_rf_power(ah, 1);
722 rc632_fini(struct rfid_asic_handle *ah)
727 ret = rc632_rf_power(ah, 0);
731 ret = rc632_power(ah, 0);
738 struct rfid_asic_handle *
739 rc632_open(struct rfid_asic_transport_handle *th)
741 struct rfid_asic_handle *h;
743 h = malloc_asic_handle(sizeof(*h));
746 memset(h, 0, sizeof(*h));
748 h->asic = (void*)&rc632;
751 /* FIXME: this is only cm5121 specific, since the latency
752 * down to the RC632 FIFO is too long to refill during TX/RX */
753 h->mtu = h->mru = 64;
755 if (rc632_init(h) < 0) {
764 rc632_close(struct rfid_asic_handle *h)
774 /* Register file for ISO14443A standard */
775 static struct register_file iso14443a_script[] = {
777 .reg = RC632_REG_TX_CONTROL,
778 .val = RC632_TXCTRL_MOD_SRC_INT |
779 RC632_TXCTRL_TX2_INV |
780 RC632_TXCTRL_FORCE_100_ASK |
781 RC632_TXCTRL_TX2_RF_EN |
782 RC632_TXCTRL_TX1_RF_EN,
784 .reg = RC632_REG_CW_CONDUCTANCE,
785 .val = CM5121_CW_CONDUCTANCE,
787 .reg = RC632_REG_MOD_CONDUCTANCE,
788 .val = CM5121_MOD_CONDUCTANCE,
790 .reg = RC632_REG_CODER_CONTROL,
791 .val = (RC632_CDRCTRL_TXCD_14443A |
792 RC632_CDRCTRL_RATE_106K),
794 .reg = RC632_REG_MOD_WIDTH,
797 .reg = RC632_REG_MOD_WIDTH_SOF,
800 .reg = RC632_REG_TYPE_B_FRAMING,
803 .reg = RC632_REG_RX_CONTROL1,
804 .val = (RC632_RXCTRL1_GAIN_35DB |
805 RC632_RXCTRL1_ISO14443 |
806 RC632_RXCTRL1_SUBCP_8),
808 .reg = RC632_REG_DECODER_CONTROL,
809 .val = (RC632_DECCTRL_MANCHESTER |
810 RC632_DECCTRL_RXFR_14443A),
812 .reg = RC632_REG_BIT_PHASE,
813 .val = CM5121_14443A_BITPHASE,
815 .reg = RC632_REG_RX_THRESHOLD,
816 .val = CM5121_14443A_THRESHOLD,
818 .reg = RC632_REG_BPSK_DEM_CONTROL,
821 .reg = RC632_REG_RX_CONTROL2,
822 .val = (RC632_RXCTRL2_DECSRC_INT |
823 RC632_RXCTRL2_CLK_Q),
825 .reg = RC632_REG_RX_WAIT,
826 //.val = 0x03, /* default value */
827 .val = 0x06, /* omnikey */
829 .reg = RC632_REG_CHANNEL_REDUNDANCY,
830 .val = (RC632_CR_PARITY_ENABLE |
831 RC632_CR_PARITY_ODD),
833 .reg = RC632_REG_CRC_PRESET_LSB,
836 .reg = RC632_REG_CRC_PRESET_MSB,
842 rc632_iso14443a_init(struct rfid_asic_handle *handle)
846 /* flush fifo (our way) */
847 ret = rc632_reg_write(handle, RC632_REG_CONTROL,
848 RC632_CONTROL_FIFO_FLUSH);
850 ret = rc632_execute_script(handle, iso14443a_script,
851 ARRAY_SIZE(iso14443a_script));
859 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
863 ret = rc632_rf_power(handle, 0);
873 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
875 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
877 struct iso14443a_atqa *atqa)
884 memset(atqa, 0, sizeof(*atqa));
888 /* transfer only 7 bits of last byte in frame */
889 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
893 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
894 RC632_CONTROL_CRYPTO1_ON);
899 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
900 (RC632_CR_PARITY_ENABLE |
901 RC632_CR_PARITY_ODD));
903 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
904 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
910 ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
911 (u_int8_t *)atqa, &rx_len,
912 ISO14443A_FDT_ANTICOL_LAST1, 0);
914 DEBUGP("error during rc632_transceive()\n");
918 /* switch back to normal 8bit last byte */
919 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
923 /* determine whether there was a collission */
924 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
928 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
930 /* retrieve bit of collission */
931 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
934 DEBUGP("collision detected in xcv_sf: bit_of_col=%u\n", boc);
935 /* FIXME: how to signal this up the stack */
939 DEBUGP("rx_len(%d) != 2\n", rx_len);
946 /* transceive regular frame */
948 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
949 unsigned int frametype,
950 const u_int8_t *tx_buf, unsigned int tx_len,
951 u_int8_t *rx_buf, unsigned int *rx_len,
952 u_int64_t timeout, unsigned int flags)
956 u_int8_t channel_red;
963 memset(rx_buf, 0, *rx_len);
966 case RFID_14443A_FRAME_REGULAR:
967 case RFID_MIFARE_FRAME:
968 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
969 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
971 case RFID_14443B_FRAME_REGULAR:
972 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
976 case RFID_MIFARE_FRAME:
977 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
980 case RFID_15693_FRAME:
981 channel_red = RC632_CR_CRC3309 | RC632_CR_RX_CRC_ENABLE
982 | RC632_CR_TX_CRC_ENABLE;
984 case RFID_15693_FRAME_ICODE1:
985 /* FIXME: implement */
990 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
994 DEBUGP("tx_len=%u\n",tx_len);
995 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, timeout, 0);
1004 /* transceive anti collission bitframe */
1006 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
1007 struct iso14443a_anticol_cmd *acf,
1008 unsigned int *bit_of_col)
1011 u_int8_t rx_buf[64];
1012 u_int8_t rx_len = sizeof(rx_buf);
1013 u_int8_t rx_align = 0, tx_last_bits, tx_bytes, tx_bytes_total;
1015 u_int8_t error_flag;
1016 *bit_of_col = ISO14443A_BITOFCOL_NONE;
1017 memset(rx_buf, 0, sizeof(rx_buf));
1019 /* disable mifare cryto */
1020 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
1021 RC632_CONTROL_CRYPTO1_ON);
1025 /* disable CRC summing */
1027 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1028 (RC632_CR_PARITY_ENABLE |
1029 RC632_CR_PARITY_ODD));
1031 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1032 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1037 tx_last_bits = acf->nvb & 0x07; /* lower nibble indicates bits */
1038 tx_bytes = ( acf->nvb >> 4 ) & 0x07;
1040 tx_bytes_total = tx_bytes+1;
1041 rx_align = tx_last_bits & 0x07; /* rx frame complements tx */
1044 tx_bytes_total = tx_bytes;
1046 /* set RxAlign and TxLastBits*/
1047 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
1048 (rx_align << 4) | (tx_last_bits));
1052 ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes_total,
1053 rx_buf, &rx_len, 0x32, 0);
1057 /* bitwise-OR the two halves of the split byte */
1058 acf->uid_bits[tx_bytes-2] = (
1059 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
1064 memcpy(&acf->uid_bits[tx_bytes-1], &rx_buf[1], rx_len-1);
1066 /* determine whether there was a collission */
1067 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1071 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1072 /* retrieve bit of collission */
1073 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1077 /* bit of collission relative to start of part 1 of
1078 * anticollision frame (!) */
1079 *bit_of_col = 2*8 + boc;
1086 RC632_RATE_106 = 0x00,
1087 RC632_RATE_212 = 0x01,
1088 RC632_RATE_424 = 0x02,
1089 RC632_RATE_848 = 0x03,
1093 u_int8_t subc_pulses;
1095 u_int8_t rx_threshold;
1096 u_int8_t bpsk_dem_ctrl;
1104 static struct rx_config rx_configs[] = {
1106 .subc_pulses = RC632_RXCTRL1_SUBCP_8,
1107 .rx_coding = RC632_DECCTRL_MANCHESTER,
1108 .rx_threshold = 0x88,
1109 .bpsk_dem_ctrl = 0x00,
1112 .subc_pulses = RC632_RXCTRL1_SUBCP_4,
1113 .rx_coding = RC632_DECCTRL_BPSK,
1114 .rx_threshold = 0x50,
1115 .bpsk_dem_ctrl = 0x0c,
1118 .subc_pulses = RC632_RXCTRL1_SUBCP_2,
1119 .rx_coding = RC632_DECCTRL_BPSK,
1120 .rx_threshold = 0x50,
1121 .bpsk_dem_ctrl = 0x0c,
1124 .subc_pulses = RC632_RXCTRL1_SUBCP_1,
1125 .rx_coding = RC632_DECCTRL_BPSK,
1126 .rx_threshold = 0x50,
1127 .bpsk_dem_ctrl = 0x0c,
1131 static struct tx_config tx_configs[] = {
1133 .rate = RC632_CDRCTRL_RATE_106K,
1137 .rate = RC632_CDRCTRL_RATE_212K,
1141 .rate = RC632_CDRCTRL_RATE_424K,
1145 .rate = RC632_CDRCTRL_RATE_848K,
1150 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
1151 unsigned int tx, unsigned int rate)
1159 if (rate > ARRAY_SIZE(rx_configs))
1162 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
1163 RC632_RXCTRL1_SUBCP_MASK,
1164 rx_configs[rate].subc_pulses);
1168 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
1170 rx_configs[rate].rx_coding);
1174 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1175 rx_configs[rate].rx_threshold);
1179 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
1180 rc = rc632_reg_write(handle,
1181 RC632_REG_BPSK_DEM_CONTROL,
1182 rx_configs[rate].bpsk_dem_ctrl);
1188 if (rate > ARRAY_SIZE(tx_configs))
1191 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
1192 RC632_CDRCTRL_RATE_MASK,
1193 tx_configs[rate].rate);
1197 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
1198 tx_configs[rate].mod_width);
1207 static struct register_file iso14443b_script[] = {
1209 .reg = RC632_REG_TX_CONTROL,
1210 .val = (RC632_TXCTRL_TX1_RF_EN |
1211 RC632_TXCTRL_TX2_RF_EN |
1212 RC632_TXCTRL_TX2_INV |
1213 RC632_TXCTRL_MOD_SRC_INT),
1215 .reg = RC632_REG_CW_CONDUCTANCE,
1218 .reg = RC632_REG_MOD_CONDUCTANCE,
1221 .reg = RC632_REG_CODER_CONTROL,
1222 .val = (RC632_CDRCTRL_TXCD_NRZ |
1223 RC632_CDRCTRL_RATE_14443B),
1225 .reg = RC632_REG_MOD_WIDTH,
1228 .reg = RC632_REG_MOD_WIDTH_SOF,
1231 .reg = RC632_REG_TYPE_B_FRAMING,
1232 .val = (RC632_TBFRAMING_SOF_11L_3H |
1233 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1234 RC632_TBFRAMING_EOF_11);
1236 .reg = RC632_REG_RX_CONTROL1,
1237 .val = (RC632_RXCTRL1_GAIN_35DB |
1238 RC632_RXCTRL1_ISO14443,
1239 RC632_RXCTRL1_SUBCP_8),
1241 .reg = RC632_REG_DECODER_CONTROL,
1242 .val = (RC632_DECCTRL_BPSK |
1243 RC632_DECCTRL_RXFR_14443B),
1245 .reg = RC632_REG_BIT_PHASE,
1246 .val = CM5121_14443B_BITPHASE,
1248 .reg = RC632_REG_RX_THRESHOLD,
1249 .val = CM5121_14443B_THRESHOLD,
1251 .reg = RC632_REG_BPSK_DEM_CONTROL,
1252 .val = ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1253 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1254 RC632_BPSKD_FILTER_AMP_DETECT |
1255 RC632_BPSKD_NO_RX_EOF |
1256 RC632_BPSKD_NO_RX_EGT),
1258 .reg = RC632_REG_RX_CONTROL2,
1259 .val = (RC632_RXCTRL2_AUTO_PD |
1260 RC632_RXCTRL2_DECSRC_INT),
1262 .reg = RC632_REG_RX_WAIT,
1265 .reg = RC632_REG_CHANNEL_REDUNDANCY,
1266 .val = (RC632_CR_TX_CRC_ENABLE |
1267 RC632_CR_RX_CRC_ENABLE |
1270 .reg = RC632_REG_CRC_PRESET_LSB,
1273 .reg = RC632_REG_CRC_PRESET_MSB,
1279 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
1283 /* FIXME: some FIFO work */
1285 /* flush fifo (our way) */
1286 ret = rc632_reg_write(handle, RC632_REG_CONTROL,
1287 RC632_CONTROL_FIFO_FLUSH);
1291 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
1292 (RC632_TXCTRL_TX1_RF_EN |
1293 RC632_TXCTRL_TX2_RF_EN |
1294 RC632_TXCTRL_TX2_INV |
1295 RC632_TXCTRL_MOD_SRC_INT));
1299 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
1303 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
1307 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
1308 (RC632_CDRCTRL_TXCD_NRZ |
1309 RC632_CDRCTRL_RATE_14443B));
1313 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
1317 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1321 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
1322 (RC632_TBFRAMING_SOF_11L_3H |
1323 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1324 RC632_TBFRAMING_EOF_11));
1328 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
1329 (RC632_RXCTRL1_GAIN_35DB |
1330 RC632_RXCTRL1_ISO14443 |
1331 RC632_RXCTRL1_SUBCP_8));
1335 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
1336 (RC632_DECCTRL_BPSK |
1337 RC632_DECCTRL_RXFR_14443B));
1341 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
1342 CM5121_14443B_BITPHASE);
1346 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1347 CM5121_14443B_THRESHOLD);
1351 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1352 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1353 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1354 RC632_BPSKD_FILTER_AMP_DETECT |
1355 RC632_BPSKD_NO_RX_EOF |
1356 RC632_BPSKD_NO_RX_EGT));
1360 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1361 (RC632_RXCTRL2_AUTO_PD |
1362 RC632_RXCTRL2_DECSRC_INT));
1366 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1370 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1371 (RC632_CR_TX_CRC_ENABLE |
1372 RC632_CR_RX_CRC_ENABLE |
1377 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1381 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1394 /* Register file for ISO15693 standard */
1395 static struct register_file iso15693_fast_script[] = {
1397 .reg = RC632_REG_TX_CONTROL,
1398 .val = RC632_TXCTRL_MOD_SRC_INT |
1399 RC632_TXCTRL_TX2_INV |
1400 RC632_TXCTRL_TX2_RF_EN |
1401 RC632_TXCTRL_TX1_RF_EN,
1403 .reg = RC632_REG_CW_CONDUCTANCE,
1406 .reg = RC632_REG_MOD_CONDUCTANCE,
1407 /* FIXME: nxp default for icode1/15693: 0x05 */
1409 .val = 0x21, /* omnikey */
1411 .reg = RC632_REG_CODER_CONTROL,
1412 .val = RC632_CDRCTRL_TXCD_15693_FAST |
1413 RC632_CDRCTRL_RATE_15693,
1415 .reg = RC632_REG_MOD_WIDTH,
1418 .reg = RC632_REG_MOD_WIDTH_SOF,
1421 .reg = RC632_REG_TYPE_B_FRAMING,
1424 .reg = RC632_REG_RX_CONTROL1,
1425 .val = RC632_RXCTRL1_ISO15693 |
1426 RC632_RXCTRL1_SUBCP_16 |
1427 RC632_RXCTRL1_GAIN_35DB,
1429 /* FIXME: this should always be the case */
1430 .reg = RC632_REG_RX_CONTROL2,
1431 .val = RC632_RXCTRL2_DECSRC_INT,
1433 .reg = RC632_REG_DECODER_CONTROL,
1434 .val = RC632_DECCTRL_MANCHESTER |
1435 RC632_DECCTRL_RX_INVERT |
1436 RC632_DECCTRL_ZEROAFTERCOL |
1437 RC632_DECCTRL_RXFR_15693,
1439 .reg = RC632_REG_BIT_PHASE,
1440 /* FIXME: nxp default for icode1/15693: 0x54 */
1442 .val = 0xd0, /* omnikey */
1444 .reg = RC632_REG_RX_THRESHOLD,
1445 /* FIXME: nxp default for icode1/15693: 0x68 */
1449 .reg = RC632_REG_BPSK_DEM_CONTROL,
1452 .reg = RC632_REG_CHANNEL_REDUNDANCY,
1453 .val = RC632_CR_RX_CRC_ENABLE |
1454 RC632_CR_TX_CRC_ENABLE |
1457 .reg = RC632_REG_CRC_PRESET_LSB,
1460 .reg = RC632_REG_CRC_PRESET_MSB,
1465 /* Register file for I*Code standard */
1466 static struct register_file icode1_std_script[] = {
1468 .reg = RC632_REG_TX_CONTROL,
1469 .val = RC632_TXCTRL_MOD_SRC_INT |
1470 RC632_TXCTRL_TX2_INV |
1471 RC632_TXCTRL_TX2_RF_EN |
1472 RC632_TXCTRL_TX1_RF_EN,
1474 .reg = RC632_REG_CW_CONDUCTANCE,
1477 .reg = RC632_REG_MOD_CONDUCTANCE,
1478 /* FIXME: nxp default for icode1/15693: 0x05 */
1481 .reg = RC632_REG_CODER_CONTROL,
1482 .val = RC632_CDRCTRL_TXCD_ICODE_STD |
1483 RC632_CDRCTRL_RATE_15693,
1485 .reg = RC632_REG_MOD_WIDTH,
1488 .reg = RC632_REG_MOD_WIDTH_SOF,
1491 .reg = RC632_REG_TYPE_B_FRAMING,
1494 .reg = RC632_REG_RX_CONTROL1,
1495 .val = RC632_RXCTRL1_ISO15693 |
1496 RC632_RXCTRL1_SUBCP_16 |
1497 RC632_RXCTRL1_GAIN_35DB,
1499 /* FIXME: this should always be the case */
1500 .reg = RC632_REG_RX_CONTROL2,
1501 .val = RC632_RXCTRL2_DECSRC_INT,
1503 .reg = RC632_REG_DECODER_CONTROL,
1504 .val = RC632_DECCTRL_MANCHESTER |
1505 RC632_DECCTRL_RXFR_ICODE,
1507 .reg = RC632_REG_BIT_PHASE,
1508 /* FIXME: nxp default for icode1/15693: 0x54 */
1511 .reg = RC632_REG_RX_THRESHOLD,
1512 /* FIXME: nxp default for icode1/15693: 0x68 */
1515 .reg = RC632_REG_BPSK_DEM_CONTROL,
1518 .reg = RC632_REG_CHANNEL_REDUNDANCY,
1519 /* 16bit CRC, no parity, not CRC3309 */
1520 .val = RC632_CR_RX_CRC_ENABLE |
1521 RC632_CR_TX_CRC_ENABLE,
1523 .reg = RC632_REG_CRC_PRESET_LSB,
1526 .reg = RC632_REG_CRC_PRESET_MSB,
1531 /* incremental changes on top of icode1_std_script */
1532 static struct register_file icode1_fast_patch[] = {
1534 .reg = RC632_REG_CODER_CONTROL,
1535 .val = RC632_CDRCTRL_TXCD_ICODE_FAST |
1536 RC632_CDRCTRL_RATE_ICODE_FAST,
1538 .reg = RC632_REG_MOD_WIDTH_SOF,
1539 .val = 0x73, /* 18.88uS */
1545 rc632_iso15693_init(struct rfid_asic_handle *h)
1549 /* flush fifo (our way) */
1550 ret = rc632_reg_write(h, RC632_REG_CONTROL,
1551 RC632_CONTROL_FIFO_FLUSH);
1555 ret = rc632_execute_script(h, iso15693_fast_script,
1556 ARRAY_SIZE(iso15693_fast_script));
1564 rc632_iso15693_icode1_init(struct rfid_asic_handle *h)
1568 ret = rc632_execute_script(h, icode1_std_script,
1569 ARRAY_SIZE(icode1_std_script));
1573 /* FIXME: how to configure fast/slow properly? */
1576 ret = rc632_execute_script(h, icode1_fast_patch,
1577 ARRAY_SIZE(icode1_fast_patch));
1587 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1593 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1594 (RC632_TXCTRL_MOD_SRC_INT |
1595 RC632_TXCTRL_TX2_INV |
1596 RC632_TXCTRL_TX2_RF_EN |
1597 RC632_TXCTRL_TX1_RF_EN));
1601 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1605 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1609 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1610 (RC632_CDRCTRL_RATE_15693 |
1611 RC632_CDRCTRL_TXCD_ICODE_STD |
1616 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1620 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1623 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1624 (RC632_RXCTRL1_SUBCP_16|
1625 RC632_RXCTRL1_ISO15693|
1626 RC632_RXCTRL1_GAIN_35DB));
1629 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1630 (RC632_DECCTRL_RX_INVERT|
1631 RC632_DECCTRL_RXFR_15693));
1635 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1639 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1643 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1647 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1648 RC632_RXCTRL2_DECSRC_INT);
1652 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1656 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1660 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1667 static void uuid_reversecpy(unsigned char* out, unsigned char* in, int len)
1678 rc632_iso15693_transceive_ac(struct rfid_asic_handle *handle,
1679 const struct iso15693_anticol_cmd *acf,
1680 unsigned int acf_len,
1681 struct iso15693_anticol_resp *resp,
1682 unsigned int *rx_len, char *bit_of_col)
1684 u_int8_t error_flag, boc;
1687 int ret, tx_len, mask_len_bytes;
1688 unsigned int rate = ISO15693_T_SLOW;
1690 if (acf->req.flags & RFID_15693_F_RATE_HIGH)
1691 rate = ISO15693_T_FAST;
1693 printf("acf = %s\n", rfid_hexdump(acf, acf_len));
1695 ret = rc632_transceive(handle, (u_int8_t *)acf, acf_len,
1696 (u_int8_t *) resp, rx_len,
1697 iso15693_timing[rate][ISO15693_T1], 0);
1698 if (ret == -ETIMEDOUT)
1701 /* determine whether there was a collission */
1702 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1705 DEBUGP_ERROR_FLAG(error_flag);
1707 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1708 /* retrieve bit of collission */
1709 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1720 mask_len_bytes = (acf->mask_len % 8) ? acf->mask_len/8+1 : acf->mask_len/8;
1722 if (acf->current_slot == 0) {
1723 /* first call: transmit Inventory frame */
1724 DEBUGP("first_frame\n");
1726 tx_len = sizeof(struct iso15693_request) + 1 + mask_len_bytes;
1728 ret = rc632_transceive(handle, (u_int8_t *)&req, tx_len,
1729 (u_int8_t *)&rx_buf, &rx_len, ISO15693_T1, 0);
1730 acf->current_slot = 1;
1731 DEBUGP("rc632_transceive ret: %d rx_len: %d\n",ret,rx_len);
1732 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1736 /* second++ call: end timeslot with EOFpulse and read */
1737 DEBUGP("second++_frame\n");
1738 if ((acf->current_slot > 16) ||
1739 ((acf->flags & RFID_15693_F5_NSLOTS_1 == 0)
1740 && (acf->current_slot > 1))) {
1742 memset(uuid, 0, ISO15693_UID_LEN);
1746 /* reset EOF-pulse-bit to 0 */
1747 ret = rc632_clear_bits(handle, RC632_REG_CODER_CONTROL,
1748 RC632_CDRCTRL_15693_EOF_PULSE);
1750 /* generate EOF pulse */
1751 ret = rc632_set_bits(handle, RC632_REG_CODER_CONTROL,
1752 RC632_CDRCTRL_15693_EOF_PULSE);
1755 // DEBUGP("waiting for EOF pulse\n");
1756 // ret = rc632_wait_idle(handle, 10); //wait for idle
1758 rx_len = sizeof(rx_buf);
1759 ret = rc632_receive(handle, (u_int8_t*)&rx_buf, &rx_len, ISO15693_T3);
1760 DEBUGP("rc632_receive ret: %d rx_len: %d\n", ret, rx_len);
1761 acf->current_slot++;
1763 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1767 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
1768 DEBUGP_STATUS_FLAG(tmp);
1770 if (ret == -ETIMEDOUT) {
1771 /* no VICC answer in this timeslot*/
1772 memset(uuid, 0, ISO15693_UID_LEN);
1775 /* determine whether there was a collission */
1776 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1777 DEBUGP_ERROR_FLAG(error_flag);
1781 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1782 /* retrieve bit of collission */
1783 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1787 memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1788 // uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1789 DEBUGP("Collision in slot %d bit %d\n",
1790 acf->current_slot,boc);
1793 /* no collision-> retrieve uuid */
1794 DEBUGP("no collision in slot %d\n", acf->current_slot);
1795 memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1796 //uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1804 struct mifare_authcmd {
1806 u_int8_t block_address;
1807 u_int32_t serno; /* lsb 1 2 msb */
1808 } __attribute__ ((packed));
1811 #define RFID_MIFARE_KEY_LEN 6
1812 #define RFID_MIFARE_KEY_CODED_LEN 12
1814 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1816 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1822 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1823 ln = key6[i] & 0x0f;
1825 key12[i * 2 + 1] = (~ln << 4) | ln;
1826 key12[i * 2] = (~hn << 4) | hn;
1832 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1834 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1838 ret = rc632_mifare_transform_key(key, coded_key);
1842 /* Terminate probably running command */
1843 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1847 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1851 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1855 ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1859 //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1860 ret = rc632_wait_idle_timer(h);
1864 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1868 if (reg & RC632_ERR_FLAG_KEY_ERR)
1875 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1879 struct mifare_authcmd acmd;
1882 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B) {
1883 DEBUGP("invalid auth command\n");
1887 /* Initialize acmd */
1888 acmd.block_address = block & 0xff;
1889 acmd.auth_cmd = cmd;
1890 //acmd.serno = htonl(serno);
1895 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1896 RC632_CR_RX_CRC_ENABLE);
1898 /* Clear Rx CRC, Set Tx CRC and Odd Parity */
1899 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1900 RC632_CR_TX_CRC_ENABLE | RC632_CR_PARITY_ODD |
1901 RC632_CR_PARITY_ENABLE);
1906 /* Send Authent1 Command */
1907 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1911 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1913 DEBUGP("error during AUTHENT1");
1917 /* Wait until transmitter is idle */
1918 ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1922 //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1923 ret = rc632_wait_idle_timer(h);
1927 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1931 DEBUGP("bitframe?");
1936 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1937 RC632_CR_TX_CRC_ENABLE);
1941 /* Wait until transmitter is idle */
1942 ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1946 /* Send Authent2 Command */
1947 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1951 /* Wait until transmitter is idle */
1952 //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1953 ret = rc632_wait_idle_timer(h);
1957 /* Check whether authentication was successful */
1958 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1962 if (!(reg & RC632_CONTROL_CRYPTO1_ON)) {
1963 DEBUGP("authentication not successful");
1970 /* transceive regular frame */
1972 rc632_mifare_transceive(struct rfid_asic_handle *handle,
1973 const u_int8_t *tx_buf, unsigned int tx_len,
1974 u_int8_t *rx_buf, unsigned int *rx_len,
1975 u_int64_t timeout, unsigned int flags)
1978 u_int8_t rxl = *rx_len & 0xff;
1980 DEBUGP("entered\n");
1981 memset(rx_buf, 0, *rx_len);
1984 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1985 (RC632_CR_PARITY_ENABLE |
1986 RC632_CR_PARITY_ODD |
1987 RC632_CR_TX_CRC_ENABLE |
1988 RC632_CR_RX_CRC_ENABLE));
1990 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1991 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1996 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
2007 rc632_layer2_init(struct rfid_asic_handle *h, enum rfid_layer2_id l2)
2010 case RFID_LAYER2_ISO14443A:
2011 return rc632_iso14443a_init(h);
2012 case RFID_LAYER2_ISO14443B:
2013 return rc632_iso14443b_init(h);
2014 case RFID_LAYER2_ISO15693:
2015 return rc632_iso15693_init(h);
2016 case RFID_LAYER2_ICODE1:
2017 return rc632_iso15693_icode1_init(h);
2023 const struct rfid_asic rc632 = {
2024 .name = "Philips CL RC632",
2025 .fc = ISO14443_FREQ_CARRIER,
2028 .power = &rc632_power,
2029 .rf_power = &rc632_rf_power,
2030 .transceive = &rc632_iso14443ab_transceive,
2031 .init = &rc632_layer2_init,
2033 .transceive_sf = &rc632_iso14443a_transceive_sf,
2034 .transceive_acf = &rc632_iso14443a_transceive_acf,
2035 .set_speed = &rc632_iso14443a_set_speed,
2038 .transceive_ac = &rc632_iso15693_transceive_ac,
2041 .setkey = &rc632_mifare_set_key,
2042 .auth = &rc632_mifare_auth,