git.rot13.org Git - librfid/blob - src/rfid_asic_rc632.c

   1 /* Generic Philips CL RC632 Routines
   2  *
   3  * (C) 2005-2008 Harald Welte <laforge@gnumonks.org>
   4  *
   5  */
   6
   7 /*
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License version 2
  10  *  as published by the Free Software Foundation
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
  20  */
  21
  22 #include <unistd.h>
  23 #include <stdlib.h>
  24 #include <string.h>
  25 #include <errno.h>
  26 #include <limits.h>
  27 #include <sys/types.h>
  28
  29 #include <librfid/rfid.h>
  30 #include <librfid/rfid_asic.h>
  31 #include <librfid/rfid_asic_rc632.h>
  32 #include <librfid/rfid_reader_cm5121.h>
  33 #include <librfid/rfid_layer2_iso14443a.h>
  34 #include <librfid/rfid_layer2_iso15693.h>
  35 #include <librfid/rfid_protocol_mifare_classic.h>
  36
  37 #include "rfid_iso14443_common.h"
  38 #include "rc632.h"
  39
  40 #ifdef  __MINGW32__
  41 #include "usleep.h"
  42 #endif/*__MINGW32__*/
  43
  44 #define RC632_TMO_AUTH1 140
  45
  46 #define TIMER_RELAX_FACTOR      10
  47
  48 #define ENTER()         DEBUGP("entering\n")
  49 const struct rfid_asic rc632;
  50
  51 struct register_file {
  52         u_int8_t reg;
  53         u_int8_t val;
  54 };
  55
  56 /* Register and FIFO Access functions */
  57 static int
  58 rc632_reg_write(struct rfid_asic_handle *handle,
  59                 u_int8_t reg,
  60                 u_int8_t val)
  61 {
  62         return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
  63 }
  64
  65 static int
  66 rc632_reg_read(struct rfid_asic_handle *handle,
  67                u_int8_t reg,
  68                u_int8_t *val)
  69 {
  70         return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
  71 }
  72
  73 static int
  74 rc632_fifo_write(struct rfid_asic_handle *handle,
  75                  u_int8_t len,
  76                  const u_int8_t *buf,
  77                  u_int8_t flags)
  78 {
  79         return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
  80                                                            len, buf, flags);
  81 }
  82
  83 static int
  84 rc632_fifo_read(struct rfid_asic_handle *handle,
  85                 u_int8_t len,
  86                 u_int8_t *buf)
  87 {
  88         return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
  89 }
  90
  91
  92 static int
  93 rc632_set_bits(struct rfid_asic_handle *handle,
  94                 u_int8_t reg,
  95                 u_int8_t val)
  96 {
  97         int ret;
  98         u_int8_t tmp;
  99
 100         ret = rc632_reg_read(handle, reg, &tmp);
 101         if (ret < 0)
 102                 return -1;
 103
 104         /* if bits are already set, no need to set them again */
 105         if ((tmp & val) == val)
 106                 return 0;
 107
 108         return rc632_reg_write(handle, reg, (tmp|val)&0xff);
 109 }
 110 static int
 111 rc632_set_bit_mask(struct rfid_asic_handle *handle,
 112                    u_int8_t reg, u_int8_t mask, u_int8_t val)
 113 {
 114         int ret;
 115         u_int8_t tmp;
 116
 117         ret = rc632_reg_read(handle, reg, &tmp);
 118         if (ret < 0)
 119                 return ret;
 120
 121         /* if bits are already like we want them, abort */
 122         if ((tmp & mask) == val)
 123                 return 0;
 124
 125         return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
 126 }
 127
 128 static int
 129 rc632_clear_bits(struct rfid_asic_handle *handle,
 130                  u_int8_t reg,
 131                  u_int8_t val)
 132 {
 133         int ret;
 134         u_int8_t tmp;
 135
 136         ret = rc632_reg_read(handle, reg, &tmp);
 137         if (ret < 0) {
 138                 DEBUGP("error during reg_read(%p, %d):%d\n",
 139                         handle, reg, ret);
 140                 return -1;
 141         }
 142         /* if bits are already cleared, no need to clear them again */
 143         if ((tmp & val) == 0)
 144                 return 0;
 145
 146         return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
 147 }
 148
 149 static int
 150 rc632_clear_irqs(struct rfid_asic_handle *handle, u_int8_t bits)
 151 {
 152         return rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, (~RC632_INT_SET)&bits);
 153 }
 154
 155 static int
 156 rc632_rf_power(struct rfid_asic_handle *handle, int on)
 157 {
 158         ENTER();
 159         if (on)
 160                 return rc632_set_bits(handle, RC632_REG_TX_CONTROL,
 161                                       RC632_TXCTRL_TX1_RF_EN|
 162                                       RC632_TXCTRL_TX2_RF_EN);
 163         else
 164                 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL,
 165                                         RC632_TXCTRL_TX1_RF_EN|
 166                                         RC632_TXCTRL_TX2_RF_EN);
 167 }
 168
 169 static int
 170 rc632_power(struct rfid_asic_handle *handle, int on)
 171 {
 172         ENTER();
 173         if (on)
 174                 return rc632_clear_bits(handle, RC632_REG_CONTROL,
 175                                         RC632_CONTROL_POWERDOWN);
 176         else
 177                 return rc632_set_bits(handle, RC632_REG_CONTROL,
 178                                       RC632_CONTROL_POWERDOWN);
 179 }
 180
 181 static int
 182 rc632_execute_script(struct rfid_asic_handle *h, struct register_file *f,
 183                      int len)
 184 {
 185         int i, ret;
 186
 187         for (i = 0; i < len; i++) {
 188                 ret = rc632_reg_write(h, f[i].reg, f[i].val);
 189                 if (ret < 0)
 190                         return ret;
 191         }
 192
 193         return 0;
 194 }
 195
 196 /* calculate best 8bit prescaler and divisor for given usec timeout */
 197 static int best_prescaler(u_int64_t timeout, u_int8_t *prescaler,
 198                           u_int8_t *divisor)
 199 {
 200         u_int8_t best_prescaler, best_divisor, i;
 201         int64_t smallest_diff;
 202
 203         smallest_diff = LLONG_MAX;
 204         best_prescaler = 0;
 205
 206         for (i = 0; i < 21; i++) {
 207                 u_int64_t clk, tmp_div, res;
 208                 int64_t diff;
 209                 clk = 13560000 / (1 << i);
 210                 tmp_div = (clk * timeout) / 1000000;
 211                 tmp_div++;
 212
 213                 if ((tmp_div > 0xff) || (tmp_div > clk))
 214                         continue;
 215
 216                 res = 1000000 / (clk / tmp_div);
 217                 diff = res - timeout;
 218
 219                 if (diff < 0)
 220                         continue;
 221
 222                 if (diff < smallest_diff) {
 223                         best_prescaler = i;
 224                         best_divisor = tmp_div;
 225                         smallest_diff = diff;
 226                 }
 227         }
 228
 229         *prescaler = best_prescaler;
 230         *divisor = best_divisor;
 231
 232         DEBUGP("timeout %u usec, prescaler = %u, divisor = %u\n",
 233                 timeout, best_prescaler, best_divisor);
 234
 235         return 0;
 236 }
 237
 238 static int
 239 rc632_timer_set(struct rfid_asic_handle *handle,
 240                 u_int64_t timeout)
 241 {
 242         int ret;
 243         u_int8_t prescaler, divisor;
 244
 245         timeout *= TIMER_RELAX_FACTOR;
 246
 247         ret = best_prescaler(timeout, &prescaler, &divisor);
 248
 249         ret = rc632_reg_write(handle, RC632_REG_TIMER_CLOCK,
 250                               prescaler & 0x1f);
 251         if (ret < 0)
 252                 return ret;
 253
 254         ret = rc632_reg_write(handle, RC632_REG_TIMER_CONTROL,
 255                               RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
 256
 257         /* clear timer irq bit */
 258         ret = rc632_set_bits(handle, RC632_REG_INTERRUPT_RQ, RC632_IRQ_TIMER);
 259
 260         ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
 261
 262         return ret;
 263 }
 264
 265 /* Wait until RC632 is idle or TIMER IRQ has happened */
 266 static int rc632_wait_idle_timer(struct rfid_asic_handle *handle)
 267 {
 268         int ret;
 269         u_int8_t stat, irq, cmd;
 270
 271         while (1) {
 272                 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &stat);
 273                 DEBUGP_STATUS_FLAG(stat);
 274                 if (stat & RC632_STAT_ERR) {
 275                         u_int8_t err;
 276                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &err);
 277                         DEBUGP_ERROR_FLAG(err);
 278                         if (err & (RC632_ERR_FLAG_COL_ERR |
 279                                    RC632_ERR_FLAG_PARITY_ERR |
 280                                    RC632_ERR_FLAG_FRAMING_ERR |
 281                                    RC632_ERR_FLAG_CRC_ERR))
 282                                 return -EIO;
 283                 }
 284                 if (stat & RC632_STAT_IRQ) {
 285                         ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
 286                         if (ret < 0)
 287                                 return ret;
 288                         DEBUGP_INTERRUPT_FLAG(irq);
 289
 290                         if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
 291                                 DEBUGP("timer expired before RX!!\n");
 292                                 return -ETIMEDOUT;
 293                         }
 294                 }
 295
 296                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 297                 if (ret < 0)
 298                         return ret;
 299
 300                 if (cmd == 0)
 301                         return 0;
 302
 303                 /* poll every millisecond */
 304                 usleep(1000);
 305         }
 306 }
 307
 308 /* Stupid RC632 implementations don't evaluate interrupts but poll the
 309  * command register for "status idle" */
 310 static int
 311 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
 312 {
 313         u_int8_t cmd = 0xff;
 314         int ret, cycles = 0;
 315 #define USLEEP_PER_CYCLE        128
 316
 317         timeout *= TIMER_RELAX_FACTOR;
 318
 319         while (cmd != 0) {
 320                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 321                 if (ret < 0)
 322                         return ret;
 323
 324                 {
 325                         u_int8_t foo;
 326                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
 327                         DEBUGP_STATUS_FLAG(foo);
 328                         /* check if Error has occured (ERR flag set) */
 329                         if (foo & RC632_STAT_ERR) {
 330                                 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
 331                                 DEBUGP_ERROR_FLAG(foo);
 332                         }
 333                         /* check if IRQ has occurred (IRQ flag set)*/
 334                         if (foo & RC632_STAT_IRQ) {
 335                                 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &foo);
 336                                 DEBUGP_INTERRUPT_FLAG(foo);
 337                                 /* clear all interrupts */
 338                                 rc632_clear_irqs(handle, 0xff);
 339                         }
 340                 }
 341                 if (cmd == 0) {
 342                         /* FIXME: read second time ?? */
 343                         DEBUGP("cmd == 0 (IDLE)\n");
 344                         return 0;
 345                 }
 346
 347                 /* Abort after some timeout */
 348                 if (cycles > timeout/USLEEP_PER_CYCLE) {
 349                         DEBUGP("timeout...\n");
 350                         return -ETIMEDOUT;
 351                 }
 352
 353                 cycles++;
 354                 usleep(USLEEP_PER_CYCLE);
 355         }
 356
 357         return 0;
 358 }
 359
 360 static int
 361 rc632_transmit(struct rfid_asic_handle *handle,
 362                 const u_int8_t *buf,
 363                 u_int8_t len,
 364                 u_int64_t timeout)
 365 {
 366         int ret, cur_len;
 367         const u_int8_t *cur_buf = buf;
 368
 369         DEBUGP("timeout=%u, tx_len=%u\n", timeout, len);
 370
 371         if (len > 64)
 372                 cur_len = 64;
 373         else
 374                 cur_len = len;
 375
 376         do {
 377                 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
 378                 if (ret < 0)
 379                         return ret;
 380
 381                 if (cur_buf == buf)  {
 382                         /* only start transmit first time */
 383                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 384                                               RC632_CMD_TRANSMIT);
 385                         if (ret < 0)
 386                                 return ret;
 387                 }
 388
 389                 cur_buf += cur_len;
 390                 if (cur_buf < buf + len) {
 391                         cur_len = buf - cur_buf;
 392                         if (cur_len > 64)
 393                                 cur_len = 64;
 394                 } else
 395                         cur_len = 0;
 396
 397         } while (cur_len);
 398
 399         return rc632_wait_idle(handle, timeout);
 400 }
 401
 402 static int
 403 tcl_toggle_pcb(struct rfid_asic_handle *handle)
 404 {
 405         /* FIXME: toggle something between 0x0a and 0x0b */
 406         return 0;
 407 }
 408
 409 static int
 410 rc632_transceive(struct rfid_asic_handle *handle,
 411                  const u_int8_t *tx_buf,
 412                  u_int8_t tx_len,
 413                  u_int8_t *rx_buf,
 414                  u_int8_t *rx_len,
 415                  u_int64_t timer,
 416                  unsigned int toggle)
 417 {
 418         int ret, cur_tx_len, i;
 419         u_int8_t rx_avail;
 420         const u_int8_t *cur_tx_buf = tx_buf;
 421
 422         DEBUGP("timeout=%u, rx_len=%u, tx_len=%u\n", timer, *rx_len, tx_len);
 423
 424         if (tx_len > 64)
 425                 cur_tx_len = 64;
 426         else
 427                 cur_tx_len = tx_len;
 428
 429
 430         ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00);
 431         /* clear all interrupts */
 432         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
 433         ret = rc632_reg_write(handle, RC632_REG_ERROR_FLAG, 0xff);
 434
 435         { u_int8_t tmp;
 436         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 437         DEBUGP_STATUS_FLAG(tmp);
 438         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 439         DEBUGP_STATUS_FLAG(tmp);
 440         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 441         DEBUGP_STATUS_FLAG(tmp);
 442         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 443         DEBUGP_ERROR_FLAG(tmp);
 444         }
 445
 446         ret = rc632_timer_set(handle, timer);
 447         if (ret < 0)
 448                 return ret;
 449
 450         do {
 451                 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
 452                 if (ret < 0)
 453                         return ret;
 454
 455                 if (cur_tx_buf == tx_buf) {
 456                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 457                                               RC632_CMD_TRANSCEIVE);
 458                         if (ret < 0)
 459                                 return ret;
 460                 }
 461
 462                 cur_tx_buf += cur_tx_len;
 463                 if (cur_tx_buf < tx_buf + tx_len) {
 464                         u_int8_t fifo_fill;
 465                         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
 466                                              &fifo_fill);
 467                         if (ret < 0)
 468                                 return ret;
 469
 470                         cur_tx_len = 64 - fifo_fill;
 471                 } else
 472                         cur_tx_len = 0;
 473
 474         } while (cur_tx_len);
 475
 476         if (toggle == 1)
 477                 tcl_toggle_pcb(handle);
 478
 479         ret = rc632_wait_idle_timer(handle);
 480         //ret = rc632_wait_idle(handle, timer);
 481
 482         DEBUGP("rc632_wait_idle >> ret=%d %s\n",ret,(ret==-ETIMEDOUT)?"ETIMEDOUT":"");
 483         if (ret < 0)
 484                 return ret;
 485
 486         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
 487         if (ret < 0)
 488                 return ret;
 489
 490         if (rx_avail > *rx_len)
 491                 DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
 492         else if (*rx_len > rx_avail)
 493                 *rx_len = rx_avail;
 494
 495         DEBUGP("rx_len == %d\n",*rx_len);
 496
 497         if (rx_avail == 0) {
 498                 u_int8_t tmp;
 499
 500                 for (i = 0; i < 1; i++){
 501                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 502                         DEBUGP_STATUS_FLAG(tmp);
 503                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 504                         DEBUGP_ERROR_FLAG(tmp);
 505                 }
 506                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 507
 508                 //return 0;
 509                 return -1;
 510         }
 511
 512         return rc632_fifo_read(handle, *rx_len, rx_buf);
 513         /* FIXME: discard addidional bytes in FIFO */
 514 }
 515
 516
 517 static int
 518 rc632_receive(struct rfid_asic_handle *handle,
 519                  u_int8_t *rx_buf,
 520                  u_int8_t *rx_len,
 521                  u_int64_t timer)
 522 {
 523         int ret, cur_tx_len, i;
 524         u_int8_t rx_avail;
 525
 526         DEBUGP("timeout=%u, rx_len=%u\n", timer, *rx_len);
 527         ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00); /* IDLE */
 528         /* clear all interrupts */
 529         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
 530
 531         ret = rc632_timer_set(handle, timer);
 532         if (ret < 0)
 533                 return ret;
 534
 535         ret = rc632_reg_write(handle, RC632_REG_COMMAND,RC632_CMD_RECEIVE);
 536         if (ret < 0)
 537                 return ret;
 538
 539         /* the timer cannot start in hardware based on the command we just
 540          * sent. this means that our timing will always be quite a bit more lax,
 541          * i.e. we'll always wait for a bit longer than the specs ask us to. */
 542         ret = rc632_set_bits(handle, RC632_REG_CONTROL,
 543                              RC632_CONTROL_TIMER_START);
 544         if (ret < 0)
 545                 return ret;
 546
 547         //ret = rc632_wait_idle(handle, timer);
 548         ret = rc632_wait_idle_timer(handle);
 549         if (ret < 0)
 550                 return ret;
 551
 552         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
 553         if (ret < 0)
 554                 return ret;
 555
 556         if (rx_avail > *rx_len) {
 557                 //DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
 558         } else if (*rx_len > rx_avail)
 559                 *rx_len = rx_avail;
 560
 561         if (rx_avail == 0) {
 562                 u_int8_t tmp;
 563
 564                 DEBUGP("rx_len == 0\n");
 565
 566                 for (i = 0; i < 1; i++) {
 567                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 568                         DEBUGP_STATUS_FLAG(tmp);
 569                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 570                         DEBUGP_ERROR_FLAG(tmp);
 571                 }
 572
 573                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 574                 return -1;
 575         }
 576
 577         return rc632_fifo_read(handle, *rx_len, rx_buf);
 578         /* FIXME: discard additional bytes in FIFO */
 579 }
 580
 581 #define MAX_WRITE_LEN   16      /* see Sec. 18.6.1.2 of RC632 Spec Rev. 3.2. */
 582
 583 static int
 584 rc632_write_eeprom(struct rfid_asic_handle *handle, u_int16_t addr,
 585                    u_int8_t *data, u_int8_t len)
 586 {
 587         u_int8_t sndbuf[MAX_WRITE_LEN + 2];
 588         u_int8_t reg;
 589         int ret;
 590
 591         if (len > MAX_WRITE_LEN)
 592                 return -EINVAL;
 593         if (addr < 0x10)
 594                 return -EPERM;
 595         if (addr > 0x1ff)
 596                 return -EINVAL;
 597
 598         sndbuf[0] = addr & 0x00ff;      /* LSB */
 599         sndbuf[1] = addr >> 8;          /* MSB */
 600         memcpy(&sndbuf[2], data, len);
 601
 602         ret = rc632_fifo_write(handle, len + 2, sndbuf, 0x03);
 603         if (ret < 0)
 604                 return ret;
 605
 606         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_WRITE_E2);
 607         if (ret < 0)
 608                 return ret;
 609
 610         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &reg);
 611         if (ret < 0)
 612                 return ret;
 613
 614         if (reg & RC632_ERR_FLAG_ACCESS_ERR)
 615                 return -EPERM;
 616
 617         while (1) {
 618                 u_int8_t reg;
 619                 ret = rc632_reg_read(handle, RC632_REG_SECONDARY_STATUS, &reg);
 620                 if (ret < 0)
 621                         return ret;
 622
 623                 if (reg & RC632_SEC_ST_E2_READY) {
 624                         /* the E2Write command must be terminated, See sec. 18.6.1.3 */
 625                         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_IDLE);
 626                         break;
 627                 }
 628         }
 629
 630         return ret;
 631 }
 632
 633 static int
 634 rc632_read_eeprom(struct rfid_asic_handle *handle, u_int16_t addr,
 635                   u_int8_t *buf, u_int8_t len)
 636 {
 637         u_int8_t sndbuf[3];
 638         u_int8_t reg;
 639         int ret;
 640
 641         sndbuf[0] = addr & 0xff;
 642         sndbuf[1] = addr >> 8;
 643         sndbuf[2] = len;
 644
 645         ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
 646         if (ret < 0)
 647                 return ret;
 648
 649         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
 650         if (ret < 0)
 651                 return ret;
 652
 653         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &reg);
 654         if (ret < 0)
 655                 return ret;
 656
 657         if (reg & RC632_ERR_FLAG_ACCESS_ERR)
 658                 return -EPERM;
 659
 660         usleep(20000);
 661
 662         return rc632_fifo_read(handle, len, buf);
 663 }
 664
 665 static int
 666 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
 667 {
 668         u_int8_t sndbuf[2] = { 0x01, 0x02 };
 669         u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
 670         int ret;
 671
 672         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
 673         if (ret < 0)
 674                 return ret;
 675
 676         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
 677         if (ret < 0)
 678                 return ret;
 679
 680         ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
 681         if (ret < 0)
 682                 return ret;
 683
 684         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
 685         if (ret < 0)
 686                 return ret;
 687
 688         usleep(10000);  /* FIXME: no checking for cmd completion? *
 689
 690         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
 691         if (ret < 0)
 692                 return ret;
 693
 694         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
 695         if (ret < 0)
 696                 return ret;
 697
 698         /* FIXME: what to do with crc result? */
 699         return ret;
 700 }
 701
 702
 703 int
 704 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
 705 {
 706         int ret = 0;
 707         u_int8_t i;
 708
 709         for (i = 0; i <= 0x3f; i++)
 710                 ret |= rc632_reg_read(handle, i, &buf[i]);
 711
 712         return ret;
 713 }
 714
 715 /* generic FIFO access functions (if no more efficient ones provided by
 716  * transport driver) */
 717
 718 static int
 719 generic_fifo_write()
 720 {
 721         /* FIXME: implementation (not needed for CM 5121) */
 722         return -1;
 723 }
 724
 725 static int
 726 generic_fifo_read()
 727 {
 728         /* FIXME: implementation (not neded for CM 5121) */
 729         return -1;
 730 }
 731
 732 static int
 733 rc632_init(struct rfid_asic_handle *ah)
 734 {
 735         int ret;
 736
 737         /* switch off rf (make sure PICCs are reset at init time) */
 738         ret = rc632_power(ah, 0);
 739         if (ret < 0)
 740                 return ret;
 741
 742         usleep(10000);
 743
 744         /* switch on rf */
 745         ret = rc632_power(ah, 1);
 746         if (ret < 0)
 747                 return ret;
 748
 749         /* disable register paging */
 750         ret = rc632_reg_write(ah, 0x00, 0x00);
 751         if (ret < 0)
 752                 return ret;
 753
 754         /* set some sane default values */
 755         ret = rc632_reg_write(ah, 0x11, 0x5b);
 756         if (ret < 0)
 757                 return ret;
 758
 759         /* switch off rf */
 760         ret = rc632_rf_power(ah, 0);
 761         if (ret < 0)
 762                 return ret;
 763
 764         usleep(100000);
 765
 766         /* switch on rf */
 767         ret = rc632_rf_power(ah, 1);
 768         if (ret < 0)
 769                 return ret;
 770
 771         return 0;
 772 }
 773
 774 static int
 775 rc632_fini(struct rfid_asic_handle *ah)
 776 {
 777         int ret;
 778
 779         /* switch off rf */
 780         ret = rc632_rf_power(ah, 0);
 781         if (ret < 0)
 782                 return ret;
 783
 784         ret = rc632_power(ah, 0);
 785         if (ret < 0)
 786                 return ret;
 787
 788         return 0;
 789 }
 790
 791 struct rfid_asic_handle *
 792 rc632_open(struct rfid_asic_transport_handle *th)
 793 {
 794         struct rfid_asic_handle *h;
 795
 796         h = malloc_asic_handle(sizeof(*h));
 797         if (!h)
 798                 return NULL;
 799         memset(h, 0, sizeof(*h));
 800
 801         h->asic = (void*)&rc632;
 802         h->rath = th;
 803         h->fc = h->asic->fc;
 804         /* FIXME: this is only cm5121 specific, since the latency
 805          * down to the RC632 FIFO is too long to refill during TX/RX */
 806         h->mtu = h->mru = 64;
 807
 808         if (rc632_init(h) < 0) {
 809                 free_asic_handle(h);
 810                 return NULL;
 811         }
 812
 813         return h;
 814 }
 815
 816 void
 817 rc632_close(struct rfid_asic_handle *h)
 818 {
 819         rc632_fini(h);
 820         free_asic_handle(h);
 821 }
 822
 823 /*
 824  * ISO14443A
 825  */
 826
 827 /* Register file for ISO14443A standard */
 828 static struct register_file iso14443a_script[] = {
 829         {
 830                 .reg    = RC632_REG_TX_CONTROL,
 831                 .val    = RC632_TXCTRL_MOD_SRC_INT |
 832                           RC632_TXCTRL_TX2_INV |
 833                           RC632_TXCTRL_FORCE_100_ASK |
 834                           RC632_TXCTRL_TX2_RF_EN |
 835                           RC632_TXCTRL_TX1_RF_EN,
 836         }, {
 837                 .reg    = RC632_REG_CW_CONDUCTANCE,
 838                 .val    = CM5121_CW_CONDUCTANCE,
 839         }, {
 840                 .reg    = RC632_REG_MOD_CONDUCTANCE,
 841                 .val    = CM5121_MOD_CONDUCTANCE,
 842         }, {
 843                 .reg    = RC632_REG_CODER_CONTROL,
 844                 .val    = (RC632_CDRCTRL_TXCD_14443A |
 845                            RC632_CDRCTRL_RATE_106K),
 846         }, {
 847                 .reg    = RC632_REG_MOD_WIDTH,
 848                 .val    = 0x13,
 849         }, {
 850                 .reg    = RC632_REG_MOD_WIDTH_SOF,
 851                 .val    = 0x3f,
 852         }, {
 853                 .reg    = RC632_REG_TYPE_B_FRAMING,
 854                 .val    = 0x00,
 855         }, {
 856                 .reg    = RC632_REG_RX_CONTROL1,
 857                 .val    = (RC632_RXCTRL1_GAIN_35DB |
 858                            RC632_RXCTRL1_ISO14443 |
 859                            RC632_RXCTRL1_SUBCP_8),
 860         }, {
 861                 .reg    = RC632_REG_DECODER_CONTROL,
 862                 .val    = (RC632_DECCTRL_MANCHESTER |
 863                            RC632_DECCTRL_RXFR_14443A),
 864         }, {
 865                 .reg    = RC632_REG_BIT_PHASE,
 866                 .val    = CM5121_14443A_BITPHASE,
 867         }, {
 868                 .reg    = RC632_REG_RX_THRESHOLD,
 869                 .val    = CM5121_14443A_THRESHOLD,
 870         }, {
 871                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
 872                 .val    = 0x00,
 873         }, {
 874                 .reg    = RC632_REG_RX_CONTROL2,
 875                 .val    = (RC632_RXCTRL2_DECSRC_INT |
 876                            RC632_RXCTRL2_CLK_Q),
 877         }, {
 878                 .reg    = RC632_REG_RX_WAIT,
 879                 //.val  = 0x03, /* default value */
 880                 .val    = 0x06, /* omnikey */
 881         }, {
 882                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
 883                 .val    = (RC632_CR_PARITY_ENABLE |
 884                            RC632_CR_PARITY_ODD),
 885         }, {
 886                 .reg    = RC632_REG_CRC_PRESET_LSB,
 887                 .val    = 0x63,
 888         }, {
 889                 .reg    = RC632_REG_CRC_PRESET_MSB,
 890                 .val    = 0x63,
 891         },
 892 };
 893
 894 static int
 895 rc632_iso14443a_init(struct rfid_asic_handle *handle)
 896 {
 897         int ret;
 898
 899         /* flush fifo (our way) */
 900         ret = rc632_reg_write(handle, RC632_REG_CONTROL,
 901                               RC632_CONTROL_FIFO_FLUSH);
 902
 903         ret = rc632_execute_script(handle, iso14443a_script,
 904                                    ARRAY_SIZE(iso14443a_script));
 905         if (ret < 0)
 906                 return ret;
 907
 908         return 0;
 909 }
 910
 911 static int
 912 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
 913 {
 914
 915 #if 0
 916         ret = rc632_rf_power(handle, 0);
 917         if (ret < 0)
 918                 return ret;
 919 #endif
 920
 921
 922         return 0;
 923 }
 924
 925
 926 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
 927 static int
 928 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
 929                                 u_int8_t cmd,
 930                                 struct iso14443a_atqa *atqa)
 931 {
 932         int ret;
 933         u_int8_t tx_buf[1];
 934         u_int8_t rx_len = 2;
 935         u_int8_t error_flag;
 936
 937         memset(atqa, 0, sizeof(*atqa));
 938
 939         tx_buf[0] = cmd;
 940
 941         /* transfer only 7 bits of last byte in frame */
 942         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
 943         if (ret < 0)
 944                 return ret;
 945
 946         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
 947                                 RC632_CONTROL_CRYPTO1_ON);
 948         if (ret < 0)
 949                 return ret;
 950
 951 #if 0
 952         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
 953                                 (RC632_CR_PARITY_ENABLE |
 954                                  RC632_CR_PARITY_ODD));
 955 #else
 956         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
 957                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
 958
 959 #endif
 960         if (ret < 0)
 961                 return ret;
 962
 963         ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
 964                                 (u_int8_t *)atqa, &rx_len,
 965                                 ISO14443A_FDT_ANTICOL_LAST1, 0);
 966         if (ret < 0) {
 967                 DEBUGP("error during rc632_transceive()\n");
 968                 return ret;
 969         }
 970
 971         /* switch back to normal 8bit last byte */
 972         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
 973         if (ret < 0)
 974                 return ret;
 975
 976         /* determine whether there was a collission */
 977         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
 978         if (ret < 0)
 979                 return ret;
 980
 981         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
 982                 u_int8_t boc;
 983                 /* retrieve bit of collission */
 984                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
 985                 if (ret < 0)
 986                         return ret;
 987                 DEBUGP("collision detected in xcv_sf: bit_of_col=%u\n", boc);
 988                 /* FIXME: how to signal this up the stack */
 989         }
 990
 991         if (rx_len != 2) {
 992                 DEBUGP("rx_len(%d) != 2\n", rx_len);
 993                 return -1;
 994         }
 995
 996         return 0;
 997 }
 998
 999 /* transceive regular frame */
1000 static int
1001 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
1002                            unsigned int frametype,
1003                            const u_int8_t *tx_buf, unsigned int tx_len,
1004                            u_int8_t *rx_buf, unsigned int *rx_len,
1005                            u_int64_t timeout, unsigned int flags)
1006 {
1007         int ret;
1008         u_int8_t rxl;
1009         u_int8_t channel_red;
1010
1011         if (*rx_len > 0xff)
1012                 rxl = 0xff;
1013         else
1014                 rxl = *rx_len;
1015
1016         memset(rx_buf, 0, *rx_len);
1017
1018         switch (frametype) {
1019         case RFID_14443A_FRAME_REGULAR:
1020         case RFID_MIFARE_FRAME:
1021                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
1022                                 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
1023                 break;
1024         case RFID_14443B_FRAME_REGULAR:
1025                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
1026                                 |RC632_CR_CRC3309;
1027                 break;
1028 #if 0
1029         case RFID_MIFARE_FRAME:
1030                 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
1031                 break;
1032 #endif
1033         case RFID_15693_FRAME:
1034                 channel_red = RC632_CR_CRC3309 | RC632_CR_RX_CRC_ENABLE
1035                                 | RC632_CR_TX_CRC_ENABLE;
1036                 break;
1037         case RFID_15693_FRAME_ICODE1:
1038                 /* FIXME: implement */
1039         default:
1040                 return -EINVAL;
1041                 break;
1042         }
1043         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1044                               channel_red);
1045         if (ret < 0)
1046                 return ret;
1047         DEBUGP("tx_len=%u\n",tx_len);
1048         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, timeout, 0);
1049         *rx_len = rxl;
1050         if (ret < 0)
1051                 return ret;
1052
1053
1054         return 0;
1055 }
1056
1057 /* transceive anti collission bitframe */
1058 static int
1059 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
1060                                 struct iso14443a_anticol_cmd *acf,
1061                                 unsigned int *bit_of_col)
1062 {
1063         int ret;
1064         u_int8_t rx_buf[64];
1065         u_int8_t rx_len = sizeof(rx_buf);
1066         u_int8_t rx_align = 0, tx_last_bits, tx_bytes, tx_bytes_total;
1067         u_int8_t boc;
1068         u_int8_t error_flag;
1069         *bit_of_col = ISO14443A_BITOFCOL_NONE;
1070         memset(rx_buf, 0, sizeof(rx_buf));
1071
1072         /* disable mifare cryto */
1073         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
1074                                 RC632_CONTROL_CRYPTO1_ON);
1075         if (ret < 0)
1076                 return ret;
1077
1078         /* disable CRC summing */
1079 #if 0
1080         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1081                                 (RC632_CR_PARITY_ENABLE |
1082                                  RC632_CR_PARITY_ODD));
1083 #else
1084         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1085                                 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1086 #endif
1087         if (ret < 0)
1088                 return ret;
1089
1090         tx_last_bits = acf->nvb & 0x07; /* lower nibble indicates bits */
1091         tx_bytes = ( acf->nvb >> 4 ) & 0x07;
1092         if (tx_last_bits) {
1093                 tx_bytes_total = tx_bytes+1;
1094                 rx_align = tx_last_bits & 0x07; /* rx frame complements tx */
1095         }
1096         else
1097                 tx_bytes_total = tx_bytes;
1098
1099         /* set RxAlign and TxLastBits*/
1100         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
1101                                 (rx_align << 4) | (tx_last_bits));
1102         if (ret < 0)
1103                 return ret;
1104
1105         ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes_total,
1106                                 rx_buf, &rx_len, 0x32, 0);
1107         if (ret < 0)
1108                 return ret;
1109
1110         /* bitwise-OR the two halves of the split byte */
1111         acf->uid_bits[tx_bytes-2] = (
1112                   (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
1113                 | rx_buf[0]);
1114
1115         /* copy the rest */
1116         if (rx_len)
1117                 memcpy(&acf->uid_bits[tx_bytes-1], &rx_buf[1], rx_len-1);
1118
1119         /* determine whether there was a collission */
1120         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1121         if (ret < 0)
1122                 return ret;
1123
1124         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1125                 /* retrieve bit of collission */
1126                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1127                 if (ret < 0)
1128                         return ret;
1129
1130                 /* bit of collission relative to start of part 1 of
1131                  * anticollision frame (!) */
1132                 *bit_of_col = 2*8 + boc;
1133         }
1134
1135         return 0;
1136 }
1137
1138 enum rc632_rate {
1139         RC632_RATE_106  = 0x00,
1140         RC632_RATE_212  = 0x01,
1141         RC632_RATE_424  = 0x02,
1142         RC632_RATE_848  = 0x03,
1143 };
1144
1145 struct rx_config {
1146         u_int8_t        subc_pulses;
1147         u_int8_t        rx_coding;
1148         u_int8_t        rx_threshold;
1149         u_int8_t        bpsk_dem_ctrl;
1150 };
1151
1152 struct tx_config {
1153         u_int8_t        rate;
1154         u_int8_t        mod_width;
1155 };
1156
1157 static struct rx_config rx_configs[] = {
1158         {
1159                 .subc_pulses    = RC632_RXCTRL1_SUBCP_8,
1160                 .rx_coding      = RC632_DECCTRL_MANCHESTER,
1161                 .rx_threshold   = 0x88,
1162                 .bpsk_dem_ctrl  = 0x00,
1163         },
1164         {
1165                 .subc_pulses    = RC632_RXCTRL1_SUBCP_4,
1166                 .rx_coding      = RC632_DECCTRL_BPSK,
1167                 .rx_threshold   = 0x50,
1168                 .bpsk_dem_ctrl  = 0x0c,
1169         },
1170         {
1171                 .subc_pulses    = RC632_RXCTRL1_SUBCP_2,
1172                 .rx_coding      = RC632_DECCTRL_BPSK,
1173                 .rx_threshold   = 0x50,
1174                 .bpsk_dem_ctrl  = 0x0c,
1175         },
1176         {
1177                 .subc_pulses    = RC632_RXCTRL1_SUBCP_1,
1178                 .rx_coding      = RC632_DECCTRL_BPSK,
1179                 .rx_threshold   = 0x50,
1180                 .bpsk_dem_ctrl  = 0x0c,
1181         },
1182 };
1183
1184 static struct tx_config tx_configs[] = {
1185         {
1186                 .rate           = RC632_CDRCTRL_RATE_106K,
1187                 .mod_width      = 0x13,
1188         },
1189         {
1190                 .rate           = RC632_CDRCTRL_RATE_212K,
1191                 .mod_width      = 0x07,
1192         },
1193         {
1194                 .rate           = RC632_CDRCTRL_RATE_424K,
1195                 .mod_width      = 0x03,
1196         },
1197         {
1198                 .rate           = RC632_CDRCTRL_RATE_848K,
1199                 .mod_width      = 0x01,
1200         },
1201 };
1202
1203 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
1204                                      unsigned int tx, unsigned int rate)
1205 {
1206         int rc;
1207         u_int8_t reg;
1208
1209
1210         if (!tx) {
1211                 /* Rx */
1212                 if (rate > ARRAY_SIZE(rx_configs))
1213                         return -EINVAL;
1214
1215                 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
1216                                         RC632_RXCTRL1_SUBCP_MASK,
1217                                         rx_configs[rate].subc_pulses);
1218                 if (rc < 0)
1219                         return rc;
1220
1221                 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
1222                                         RC632_DECCTRL_BPSK,
1223                                         rx_configs[rate].rx_coding);
1224                 if (rc < 0)
1225                         return rc;
1226
1227                 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1228                                         rx_configs[rate].rx_threshold);
1229                 if (rc < 0)
1230                         return rc;
1231
1232                 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
1233                         rc = rc632_reg_write(handle,
1234                                              RC632_REG_BPSK_DEM_CONTROL,
1235                                              rx_configs[rate].bpsk_dem_ctrl);
1236                         if (rc < 0)
1237                                 return rc;
1238                 }
1239         } else {
1240                 /* Tx */
1241                 if (rate > ARRAY_SIZE(tx_configs))
1242                         return -EINVAL;
1243
1244                 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
1245                                         RC632_CDRCTRL_RATE_MASK,
1246                                         tx_configs[rate].rate);
1247                 if (rc < 0)
1248                         return rc;
1249
1250                 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
1251                                      tx_configs[rate].mod_width);
1252                 if (rc < 0)
1253                         return rc;
1254         }
1255
1256         return 0;
1257 }
1258
1259 #if 0
1260 static struct register_file iso14443b_script[] = {
1261         {
1262                 .reg    = RC632_REG_TX_CONTROL,
1263                 .val    = (RC632_TXCTRL_TX1_RF_EN |
1264                            RC632_TXCTRL_TX2_RF_EN |
1265                            RC632_TXCTRL_TX2_INV |
1266                            RC632_TXCTRL_MOD_SRC_INT),
1267         }, {
1268                 .reg    = RC632_REG_CW_CONDUCTANCE,
1269                 .val    = 0x3f,
1270         }, {
1271                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1272                 .val    = 0x04,
1273         }, {
1274                 .reg    = RC632_REG_CODER_CONTROL,
1275                 .val    = (RC632_CDRCTRL_TXCD_NRZ |
1276                            RC632_CDRCTRL_RATE_14443B),
1277         }, {
1278                 .reg    = RC632_REG_MOD_WIDTH,
1279                 .val    = 0x13,
1280         }, {
1281                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1282                 .val    = 0x3f,
1283         }, {
1284                 .reg    = RC632_REG_TYPE_B_FRAMING,
1285                 .val    = (RC632_TBFRAMING_SOF_11L_3H |
1286                            (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1287                            RC632_TBFRAMING_EOF_11);
1288         }, {
1289                 .reg    = RC632_REG_RX_CONTROL1,
1290                 .val    = (RC632_RXCTRL1_GAIN_35DB |
1291                            RC632_RXCTRL1_ISO14443,
1292                            RC632_RXCTRL1_SUBCP_8),
1293         }, {
1294                 .reg    = RC632_REG_DECODER_CONTROL,
1295                 .val    = (RC632_DECCTRL_BPSK |
1296                            RC632_DECCTRL_RXFR_14443B),
1297         }, {
1298                 .reg    = RC632_REG_BIT_PHASE,
1299                 .val    = CM5121_14443B_BITPHASE,
1300         }, {
1301                 .reg    = RC632_REG_RX_THRESHOLD,
1302                 .val    = CM5121_14443B_THRESHOLD,
1303         }, {
1304                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1305                 .val    = ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1306                            (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1307                            RC632_BPSKD_FILTER_AMP_DETECT |
1308                            RC632_BPSKD_NO_RX_EOF |
1309                            RC632_BPSKD_NO_RX_EGT),
1310         }, {
1311                 .reg    = RC632_REG_RX_CONTROL2,
1312                 .val    = (RC632_RXCTRL2_AUTO_PD |
1313                            RC632_RXCTRL2_DECSRC_INT),
1314         }, {
1315                 .reg    = RC632_REG_RX_WAIT,
1316                 .val    = 0x03,
1317         }, {
1318                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1319                 .val    = (RC632_CR_TX_CRC_ENABLE |
1320                            RC632_CR_RX_CRC_ENABLE |
1321                            RC632_CR_CRC3309),
1322         }, {
1323                 .reg    = RC632_REG_CRC_PRESET_LSB,
1324                 .val    = 0xff,
1325         }, {
1326                 .reg    = RC632_REG_CRC_PRESET_MSB,
1327                 .val    = 0xff,
1328         },
1329 };
1330 #endif
1331
1332 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
1333 {
1334         int ret;
1335         ENTER();
1336         /* FIXME: some FIFO work */
1337
1338         /* flush fifo (our way) */
1339         ret = rc632_reg_write(handle, RC632_REG_CONTROL,
1340                               RC632_CONTROL_FIFO_FLUSH);
1341         if (ret < 0)
1342                 return ret;
1343
1344         ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
1345                         (RC632_TXCTRL_TX1_RF_EN |
1346                          RC632_TXCTRL_TX2_RF_EN |
1347                          RC632_TXCTRL_TX2_INV |
1348                          RC632_TXCTRL_MOD_SRC_INT));
1349         if (ret < 0)
1350                 return ret;
1351
1352         ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
1353         if (ret < 0)
1354                 return ret;
1355
1356         ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
1357         if (ret < 0)
1358                 return ret;
1359
1360         ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
1361                               (RC632_CDRCTRL_TXCD_NRZ |
1362                                RC632_CDRCTRL_RATE_14443B));
1363         if (ret < 0)
1364                 return ret;
1365
1366         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
1367         if (ret < 0)
1368                 return ret;
1369
1370         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1371         if (ret < 0)
1372                 return ret;
1373
1374         ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
1375                               (RC632_TBFRAMING_SOF_11L_3H |
1376                                (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1377                                RC632_TBFRAMING_EOF_11));
1378         if (ret < 0)
1379                 return ret;
1380
1381         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
1382                               (RC632_RXCTRL1_GAIN_35DB |
1383                                RC632_RXCTRL1_ISO14443 |
1384                                RC632_RXCTRL1_SUBCP_8));
1385         if (ret < 0)
1386                 return ret;
1387
1388         ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
1389                               (RC632_DECCTRL_BPSK |
1390                                RC632_DECCTRL_RXFR_14443B));
1391         if (ret < 0)
1392                 return ret;
1393
1394         ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
1395                                 CM5121_14443B_BITPHASE);
1396         if (ret < 0)
1397                 return ret;
1398
1399         ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1400                                 CM5121_14443B_THRESHOLD);
1401         if (ret < 0)
1402                 return ret;
1403
1404         ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1405                               ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1406                                (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1407                                RC632_BPSKD_FILTER_AMP_DETECT |
1408                                RC632_BPSKD_NO_RX_EOF |
1409                                RC632_BPSKD_NO_RX_EGT));
1410         if (ret < 0)
1411                 return ret;
1412
1413         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1414                               (RC632_RXCTRL2_AUTO_PD |
1415                                RC632_RXCTRL2_DECSRC_INT));
1416         if (ret < 0)
1417                 return ret;
1418
1419         ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1420         if (ret < 0)
1421                 return ret;
1422
1423         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1424                               (RC632_CR_TX_CRC_ENABLE |
1425                                RC632_CR_RX_CRC_ENABLE |
1426                                RC632_CR_CRC3309));
1427         if (ret < 0)
1428                 return ret;
1429
1430         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1431         if (ret < 0)
1432                 return ret;
1433
1434         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1435         if (ret < 0)
1436                 return ret;
1437
1438         return 0;
1439 }
1440
1441
1442
1443 /*
1444  * ISO15693
1445  */
1446
1447 /* Register file for ISO15693 standard */
1448 static struct register_file iso15693_fast_script[] = {
1449         {
1450                 .reg    = RC632_REG_TX_CONTROL,
1451                 .val    = RC632_TXCTRL_MOD_SRC_INT |
1452                           RC632_TXCTRL_TX2_INV |
1453                           RC632_TXCTRL_TX2_RF_EN |
1454                           RC632_TXCTRL_TX1_RF_EN,
1455         }, {
1456                 .reg    = RC632_REG_CW_CONDUCTANCE,
1457                 .val    = 0x3f,
1458         }, {
1459                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1460                 /* FIXME: nxp default for icode1/15693: 0x05 */
1461                 //.val  = 0x02,
1462                 .val    = 0x21, /* omnikey */
1463         }, {
1464                 .reg    = RC632_REG_CODER_CONTROL,
1465                 .val    = RC632_CDRCTRL_TXCD_15693_FAST |
1466                           RC632_CDRCTRL_RATE_15693,
1467         }, {
1468                 .reg    = RC632_REG_MOD_WIDTH,
1469                 .val    = 0x3f,
1470         }, {
1471                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1472                 .val    = 0x3f,
1473         }, {
1474                 .reg    = RC632_REG_TYPE_B_FRAMING,
1475                 .val    = 0x00,
1476         }, {
1477                 .reg    = RC632_REG_RX_CONTROL1,
1478                 .val    = RC632_RXCTRL1_ISO15693 |
1479                           RC632_RXCTRL1_SUBCP_16 |
1480                           RC632_RXCTRL1_GAIN_35DB,
1481         }, {
1482                 /* FIXME: this should always be the case */
1483                 .reg    = RC632_REG_RX_CONTROL2,
1484                 .val    = RC632_RXCTRL2_DECSRC_INT,
1485         }, {
1486                 .reg    = RC632_REG_DECODER_CONTROL,
1487                 .val    = RC632_DECCTRL_MANCHESTER |
1488                           RC632_DECCTRL_RX_INVERT |
1489                           RC632_DECCTRL_ZEROAFTERCOL |
1490                           RC632_DECCTRL_RXFR_15693,
1491         }, {
1492                 .reg    = RC632_REG_BIT_PHASE,
1493                 /* FIXME: nxp default for icode1/15693: 0x54 */
1494                 //.val  = 0x52,
1495                 .val    = 0xd0, /* omnikey */
1496         }, {
1497                 .reg    = RC632_REG_RX_THRESHOLD,
1498                 /* FIXME: nxp default for icode1/15693: 0x68 */
1499                 //.val  = 0x66,
1500                 .val    = 0xed,
1501         }, {
1502                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1503                 .val    = 0x00,
1504         }, {
1505                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1506                 .val    = RC632_CR_RX_CRC_ENABLE |
1507                           RC632_CR_TX_CRC_ENABLE |
1508                           RC632_CR_CRC3309,
1509         }, {
1510                 .reg    = RC632_REG_CRC_PRESET_LSB,
1511                 .val    = 0xff,
1512         }, {
1513                 .reg    = RC632_REG_CRC_PRESET_MSB,
1514                 .val    = 0xff,
1515         },
1516 };
1517
1518 /* Register file for I*Code standard */
1519 static struct register_file icode1_std_script[] = {
1520         {
1521                 .reg    = RC632_REG_TX_CONTROL,
1522                 .val    = RC632_TXCTRL_MOD_SRC_INT |
1523                           RC632_TXCTRL_TX2_INV |
1524                           RC632_TXCTRL_TX2_RF_EN |
1525                           RC632_TXCTRL_TX1_RF_EN,
1526         }, {
1527                 .reg    = RC632_REG_CW_CONDUCTANCE,
1528                 .val    = 0x3f,
1529         }, {
1530                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1531                 /* FIXME: nxp default for icode1/15693: 0x05 */
1532                 .val    = 0x02,
1533         }, {
1534                 .reg    = RC632_REG_CODER_CONTROL,
1535                 .val    = RC632_CDRCTRL_TXCD_ICODE_STD |
1536                           RC632_CDRCTRL_RATE_15693,
1537         }, {
1538                 .reg    = RC632_REG_MOD_WIDTH,
1539                 .val    = 0x3f,
1540         }, {
1541                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1542                 .val    = 0x3f,
1543         }, {
1544                 .reg    = RC632_REG_TYPE_B_FRAMING,
1545                 .val    = 0x00,
1546         }, {
1547                 .reg    = RC632_REG_RX_CONTROL1,
1548                 .val    = RC632_RXCTRL1_ISO15693 |
1549                           RC632_RXCTRL1_SUBCP_16 |
1550                           RC632_RXCTRL1_GAIN_35DB,
1551         }, {
1552                 /* FIXME: this should always be the case */
1553                 .reg    = RC632_REG_RX_CONTROL2,
1554                 .val    = RC632_RXCTRL2_DECSRC_INT,
1555         }, {
1556                 .reg    = RC632_REG_DECODER_CONTROL,
1557                 .val    = RC632_DECCTRL_MANCHESTER |
1558                           RC632_DECCTRL_RXFR_ICODE,
1559         }, {
1560                 .reg    = RC632_REG_BIT_PHASE,
1561                 /* FIXME: nxp default for icode1/15693: 0x54 */
1562                 .val    = 0x52,
1563         }, {
1564                 .reg    = RC632_REG_RX_THRESHOLD,
1565                 /* FIXME: nxp default for icode1/15693: 0x68 */
1566                 .val    = 0x66,
1567         }, {
1568                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1569                 .val    = 0x00,
1570         }, {
1571                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1572                 /* 16bit CRC, no parity, not CRC3309 */
1573                 .val    = RC632_CR_RX_CRC_ENABLE |
1574                           RC632_CR_TX_CRC_ENABLE,
1575         }, {
1576                 .reg    = RC632_REG_CRC_PRESET_LSB,
1577                 .val    = 0xfe,
1578         }, {
1579                 .reg    = RC632_REG_CRC_PRESET_MSB,
1580                 .val    = 0xff,
1581         }
1582 };
1583
1584 /* incremental changes on top of icode1_std_script */
1585 static struct register_file icode1_fast_patch[] = {
1586         {
1587                 .reg    = RC632_REG_CODER_CONTROL,
1588                 .val    = RC632_CDRCTRL_TXCD_ICODE_FAST |
1589                           RC632_CDRCTRL_RATE_ICODE_FAST,
1590         }, {
1591                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1592                 .val    = 0x73, /* 18.88uS */
1593         },
1594 };
1595
1596
1597 static int
1598 rc632_iso15693_init(struct rfid_asic_handle *h)
1599 {
1600         int ret;
1601
1602         /* flush fifo (our way) */
1603         ret = rc632_reg_write(h, RC632_REG_CONTROL,
1604                               RC632_CONTROL_FIFO_FLUSH);
1605         if (ret < 0)
1606                 return ret;
1607
1608         ret = rc632_execute_script(h, iso15693_fast_script,
1609                                    ARRAY_SIZE(iso15693_fast_script));
1610         if (ret < 0)
1611                 return ret;
1612
1613         return 0;
1614 }
1615
1616 static int
1617 rc632_iso15693_icode1_init(struct rfid_asic_handle *h)
1618 {
1619         int ret;
1620
1621         ret = rc632_execute_script(h, icode1_std_script,
1622                                    ARRAY_SIZE(icode1_std_script));
1623         if (ret < 0)
1624                 return ret;
1625
1626         /* FIXME: how to configure fast/slow properly? */
1627 #if 0
1628         if (fast) {
1629                 ret = rc632_execute_script(h, icode1_fast_patch,
1630                                            ARRAY_SIZE(icode1_fast_patch));
1631                 if (ret < 0)
1632                         return ret;
1633         }
1634 #endif
1635
1636         return 0;
1637 }
1638
1639 static int
1640 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1641 {
1642         int ret;
1643
1644         /* ICL */
1645
1646         ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1647                                                 (RC632_TXCTRL_MOD_SRC_INT |
1648                                                  RC632_TXCTRL_TX2_INV |
1649                                                  RC632_TXCTRL_TX2_RF_EN |
1650                                                  RC632_TXCTRL_TX1_RF_EN));
1651         if (ret < 0)
1652                 return ret;
1653
1654         ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1655         if (ret < 0)
1656                 return ret;
1657
1658         ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1659         if (ret < 0)
1660                 return ret;
1661
1662         ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1663                                                 (RC632_CDRCTRL_RATE_15693 |
1664                                                  RC632_CDRCTRL_TXCD_ICODE_STD |
1665                                                  0x03)); /* FIXME */
1666         if (ret < 0)
1667                 return ret;
1668
1669         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1670         if (ret < 0)
1671                 return ret;
1672
1673         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1674         if (ret < 0)
1675                 return ret;
1676         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1677                                                 (RC632_RXCTRL1_SUBCP_16|
1678                                                  RC632_RXCTRL1_ISO15693|
1679                                                  RC632_RXCTRL1_GAIN_35DB));
1680         if (ret < 0)
1681                 return ret;
1682         ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1683                                                 (RC632_DECCTRL_RX_INVERT|
1684                                                  RC632_DECCTRL_RXFR_15693));
1685         if (ret < 0)
1686                 return ret;
1687
1688         ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1689         if (ret < 0)
1690                 return ret;
1691
1692         ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1693         if (ret < 0)
1694                 return ret;
1695
1696         ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1697         if (ret < 0)
1698                 return ret;
1699
1700         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1701                                                 RC632_RXCTRL2_DECSRC_INT);
1702         if (ret < 0)
1703                 return ret;
1704
1705         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1706         if (ret < 0)
1707                 return ret;
1708
1709         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1710         if (ret < 0)
1711                 return ret;
1712
1713         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1714         if (ret < 0)
1715                 return ret;
1716
1717         return 0;
1718 }
1719
1720 static void uuid_reversecpy(unsigned char* out, unsigned char* in, int len)
1721 {
1722         int i = 0;
1723         while (len > 0) {
1724                 out[i] = in[len];
1725                 len--;
1726                 i++;
1727         }
1728 }
1729
1730 static int
1731 rc632_iso15693_transceive_ac(struct rfid_asic_handle *handle,
1732                              const struct iso15693_anticol_cmd *acf,
1733                              unsigned int acf_len,
1734                              struct iso15693_anticol_resp *resp,
1735                              unsigned int *rx_len, char *bit_of_col)
1736 {
1737         u_int8_t error_flag, boc;
1738         //u_int8_t rx_len;
1739
1740         int ret, tx_len, mask_len_bytes;
1741         unsigned int rate = ISO15693_T_SLOW;
1742
1743         if (acf->req.flags & RFID_15693_F_RATE_HIGH)
1744                 rate = ISO15693_T_FAST;
1745
1746         DEBUGP("acf = %s\n", rfid_hexdump(acf, acf_len));
1747
1748         ret = rc632_transceive(handle, (u_int8_t *)acf, acf_len,
1749                                (u_int8_t *) resp, rx_len,
1750                                iso15693_timing[rate][ISO15693_T1], 0);
1751         if (ret == -ETIMEDOUT)
1752                 return ret;
1753
1754         /* determine whether there was a collission */
1755         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1756         if (ret < 0)
1757                 return ret;
1758         DEBUGP_ERROR_FLAG(error_flag);
1759
1760         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1761                 /* retrieve bit of collission */
1762                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1763                 if (ret < 0)
1764                         return ret;
1765                 *bit_of_col = boc;
1766         }
1767
1768         return 0;
1769
1770 #if 0
1771         *bit_of_col = 0;
1772
1773         mask_len_bytes = (acf->mask_len % 8) ? acf->mask_len/8+1 : acf->mask_len/8;
1774
1775         if (acf->current_slot == 0) {
1776                 /* first call: transmit Inventory frame */
1777                 DEBUGP("first_frame\n");
1778
1779                 tx_len = sizeof(struct iso15693_request) + 1 + mask_len_bytes;
1780
1781                 ret = rc632_transceive(handle, (u_int8_t *)&req, tx_len,
1782                                         (u_int8_t *)&rx_buf, &rx_len, ISO15693_T1, 0);
1783                 acf->current_slot = 1;
1784                 DEBUGP("rc632_transceive ret: %d rx_len: %d\n",ret,rx_len);
1785                 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1786                         return ret;     */
1787
1788         } else {
1789                 /* second++ call: end timeslot with EOFpulse and read */
1790                 DEBUGP("second++_frame\n");
1791                 if ((acf->current_slot > 16) ||
1792                     ((acf->flags & RFID_15693_F5_NSLOTS_1 == 0)
1793                                         && (acf->current_slot > 1))) {
1794
1795                         memset(uuid, 0, ISO15693_UID_LEN);
1796                         return -1;
1797                 }
1798
1799                 /* reset EOF-pulse-bit to 0 */
1800                 ret = rc632_clear_bits(handle, RC632_REG_CODER_CONTROL,
1801                                        RC632_CDRCTRL_15693_EOF_PULSE);
1802                 usleep(50);
1803                 /* generate EOF pulse */
1804                 ret = rc632_set_bits(handle, RC632_REG_CODER_CONTROL,
1805                                      RC632_CDRCTRL_15693_EOF_PULSE);
1806                 if (ret < 0)
1807                         return ret;
1808                 // DEBUGP("waiting for EOF pulse\n");
1809                 // ret = rc632_wait_idle(handle, 10); //wait for idle
1810
1811                 rx_len = sizeof(rx_buf);
1812                 ret = rc632_receive(handle, (u_int8_t*)&rx_buf, &rx_len, ISO15693_T3);
1813                 DEBUGP("rc632_receive ret: %d rx_len: %d\n", ret, rx_len);
1814                 acf->current_slot++;
1815
1816                 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1817                         return ret; */
1818         }
1819
1820         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
1821         DEBUGP_STATUS_FLAG(tmp);
1822
1823         if (ret == -ETIMEDOUT) {
1824                 /* no VICC answer in this timeslot*/
1825                 memset(uuid, 0, ISO15693_UID_LEN);
1826                 return -ETIMEDOUT;
1827         } else {
1828                 /* determine whether there was a collission */
1829                 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1830                 DEBUGP_ERROR_FLAG(error_flag);
1831                 if (ret < 0)
1832                         return ret;
1833
1834                 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1835                         /* retrieve bit of collission */
1836                         ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1837                         if (ret < 0)
1838                                 return ret;
1839                         *bit_of_col = boc;
1840                         memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1841                         // uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1842                         DEBUGP("Collision in slot %d bit %d\n",
1843                                 acf->current_slot,boc);
1844                         return -ECOLLISION;
1845                 } else {
1846                         /* no collision-> retrieve uuid */
1847                         DEBUGP("no collision in slot %d\n", acf->current_slot);
1848                         memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1849                         //uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1850                 }
1851         }
1852
1853         return 0;
1854 #endif
1855 }
1856
1857 struct mifare_authcmd {
1858         u_int8_t auth_cmd;
1859         u_int8_t block_address;
1860         u_int32_t serno;        /* lsb 1 2 msb */
1861 } __attribute__ ((packed));
1862
1863
1864 #define RFID_MIFARE_KEY_LEN 6
1865 #define RFID_MIFARE_KEY_CODED_LEN 12
1866
1867 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1868 static int
1869 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1870 {
1871         int i;
1872         u_int8_t ln;
1873         u_int8_t hn;
1874
1875         for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1876                 ln = key6[i] & 0x0f;
1877                 hn = key6[i] >> 4;
1878                 key12[i * 2 + 1] = (~ln << 4) | ln;
1879                 key12[i * 2] = (~hn << 4) | hn;
1880         }
1881         return 0;
1882 }
1883
1884 static int
1885 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1886 {
1887         u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1888         u_int8_t reg;
1889         int ret;
1890
1891         ret = rc632_mifare_transform_key(key, coded_key);
1892         if (ret < 0)
1893                 return ret;
1894
1895         /* Terminate probably running command */
1896         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1897         if (ret < 0)
1898                 return ret;
1899
1900         ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1901         if (ret < 0)
1902                 return ret;
1903
1904         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1905         if (ret < 0)
1906                 return ret;
1907
1908         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1909         if (ret < 0)
1910                 return ret;
1911
1912         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1913         ret = rc632_wait_idle_timer(h);
1914         if (ret < 0)
1915                 return ret;
1916
1917         ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, &reg);
1918         if (ret < 0)
1919                 return ret;
1920
1921         if (reg & RC632_ERR_FLAG_KEY_ERR)
1922                 return -EINVAL;
1923
1924         return 0;
1925 }
1926
1927 static int
1928 rc632_mifare_set_key_ee(struct rfid_asic_handle *h, unsigned int addr)
1929 {
1930         int ret;
1931         u_int8_t cmd_addr[2];
1932         u_int8_t reg;
1933
1934         if (addr > 0xffff - RFID_MIFARE_KEY_CODED_LEN)
1935                 return -EINVAL;
1936
1937         cmd_addr[0] = addr & 0xff;              /* LSB */
1938         cmd_addr[1] = (addr >> 8) & 0xff;       /* MSB */
1939
1940         /* Terminate probably running command */
1941         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1942         if (ret < 0)
1943                 return ret;
1944
1945         /* Write the key address to the FIFO */
1946         ret = rc632_fifo_write(h, 2, cmd_addr, 0x03);
1947         if (ret < 0)
1948                 return ret;
1949
1950         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY_E2);
1951         if (ret < 0)
1952                 return ret;
1953
1954         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1955         if (ret < 0)
1956                 return ret;
1957
1958         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1959         ret = rc632_wait_idle_timer(h);
1960         if (ret < 0)
1961                 return ret;
1962
1963         ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, &reg);
1964         if (ret < 0)
1965                 return ret;
1966
1967         if (reg & RC632_ERR_FLAG_KEY_ERR)
1968                 return -EINVAL;
1969
1970         return 0;
1971 }
1972
1973 static int
1974 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1975                   u_int8_t block)
1976 {
1977         int ret;
1978         struct mifare_authcmd acmd;
1979         u_int8_t reg;
1980
1981         if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B) {
1982                 DEBUGP("invalid auth command\n");
1983                 return -EINVAL;
1984         }
1985
1986         /* Initialize acmd */
1987         acmd.block_address = block & 0xff;
1988         acmd.auth_cmd = cmd;
1989         //acmd.serno = htonl(serno);
1990         acmd.serno = serno;
1991
1992 #if 1
1993         /* Clear Rx CRC */
1994         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1995                                 RC632_CR_RX_CRC_ENABLE);
1996 #else
1997         /* Clear Rx CRC, Set Tx CRC and Odd Parity */
1998         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1999                                 RC632_CR_TX_CRC_ENABLE | RC632_CR_PARITY_ODD |
2000                                 RC632_CR_PARITY_ENABLE);
2001 #endif
2002         if (ret < 0)
2003                 return ret;
2004
2005         /* Send Authent1 Command */
2006         ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
2007         if (ret < 0)
2008                 return ret;
2009
2010         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
2011         if (ret < 0) {
2012                 DEBUGP("error during AUTHENT1");
2013                 return ret;
2014         }
2015
2016         /* Wait until transmitter is idle */
2017         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
2018         if (ret < 0)
2019                 return ret;
2020
2021         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
2022         ret = rc632_wait_idle_timer(h);
2023         if (ret < 0)
2024                 return ret;
2025
2026         ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, &reg);
2027         if (ret < 0)
2028                 return ret;
2029         if (reg & 0x07) {
2030                 DEBUGP("bitframe?");
2031                 return -EIO;
2032         }
2033
2034         /* Clear Tx CRC */
2035         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
2036                                 RC632_CR_TX_CRC_ENABLE);
2037         if (ret < 0)
2038                 return ret;
2039
2040         /* Wait until transmitter is idle */
2041         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
2042         if (ret < 0)
2043                 return ret;
2044
2045         /* Send Authent2 Command */
2046         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
2047         if (ret < 0)
2048                 return ret;
2049
2050         /* Wait until transmitter is idle */
2051         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
2052         ret = rc632_wait_idle_timer(h);
2053         if (ret < 0)
2054                 return ret;
2055
2056         /* Check whether authentication was successful */
2057         ret = rc632_reg_read(h, RC632_REG_CONTROL, &reg);
2058         if (ret < 0)
2059                 return ret;
2060
2061         if (!(reg & RC632_CONTROL_CRYPTO1_ON)) {
2062                 DEBUGP("authentication not successful");
2063                 return -EACCES;
2064         }
2065
2066         return 0;
2067 }
2068
2069 /* transceive regular frame */
2070 static int
2071 rc632_mifare_transceive(struct rfid_asic_handle *handle,
2072                         const u_int8_t *tx_buf, unsigned int tx_len,
2073                         u_int8_t *rx_buf, unsigned int *rx_len,
2074                         u_int64_t timeout, unsigned int flags)
2075 {
2076         int ret;
2077         u_int8_t rxl = *rx_len & 0xff;
2078
2079         DEBUGP("entered\n");
2080         memset(rx_buf, 0, *rx_len);
2081
2082 #if 1
2083         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
2084                                 (RC632_CR_PARITY_ENABLE |
2085                                  RC632_CR_PARITY_ODD |
2086                                  RC632_CR_TX_CRC_ENABLE |
2087                                  RC632_CR_RX_CRC_ENABLE));
2088 #else
2089         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
2090                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
2091 #endif
2092         if (ret < 0)
2093                 return ret;
2094
2095         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
2096         *rx_len = rxl;
2097         if (ret < 0)
2098                 return ret;
2099
2100
2101         return 0;
2102 }
2103
2104
2105 static int
2106 rc632_layer2_init(struct rfid_asic_handle *h, enum rfid_layer2_id l2)
2107 {
2108         switch (l2) {
2109         case RFID_LAYER2_ISO14443A:
2110                 return rc632_iso14443a_init(h);
2111         case RFID_LAYER2_ISO14443B:
2112                 return rc632_iso14443b_init(h);
2113         case RFID_LAYER2_ISO15693:
2114                 return rc632_iso15693_init(h);
2115         case RFID_LAYER2_ICODE1:
2116                 return rc632_iso15693_icode1_init(h);
2117         default:
2118                 return -EINVAL;
2119         }
2120 }
2121
2122 const struct rfid_asic rc632 = {
2123         .name   = "Philips CL RC632",
2124         .fc     = ISO14443_FREQ_CARRIER,
2125         .priv.rc632 = {
2126                 .fn = {
2127                         .power = &rc632_power,
2128                         .rf_power = &rc632_rf_power,
2129                         .transceive = &rc632_iso14443ab_transceive,
2130                         .init = &rc632_layer2_init,
2131                         .iso14443a = {
2132                                 .transceive_sf = &rc632_iso14443a_transceive_sf,
2133                                 .transceive_acf = &rc632_iso14443a_transceive_acf,
2134                                 .set_speed = &rc632_iso14443a_set_speed,
2135                         },
2136                         .iso15693 = {
2137                                 .transceive_ac = &rc632_iso15693_transceive_ac,
2138                         },
2139                         .mifare_classic = {
2140                                 .setkey = &rc632_mifare_set_key,
2141                                 .setkey_ee = &rc632_mifare_set_key_ee,
2142                                 .auth = &rc632_mifare_auth,
2143                         },
2144                 },
2145         },
2146 };