git.rot13.org Git - librfid/blob - src/rfid_asic_rc632.c

   1 /* Generic Philips CL RC632 Routines
   2  *
   3  * (C) 2005-2008 Harald Welte <laforge@gnumonks.org>
   4  *
   5  */
   6
   7 /*
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License version 2
  10  *  as published by the Free Software Foundation
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
  20  */
  21
  22 #include <unistd.h>
  23 #include <stdlib.h>
  24 #include <string.h>
  25 #include <errno.h>
  26 #include <limits.h>
  27 #include <sys/types.h>
  28
  29 #include <librfid/rfid.h>
  30 #include <librfid/rfid_asic.h>
  31 #include <librfid/rfid_asic_rc632.h>
  32 #include <librfid/rfid_reader_cm5121.h>
  33 #include <librfid/rfid_layer2_iso14443a.h>
  34 #include <librfid/rfid_layer2_iso15693.h>
  35 #include <librfid/rfid_protocol_mifare_classic.h>
  36
  37 #include "rfid_iso14443_common.h"
  38 #include "rc632.h"
  39
  40 #ifdef  __MINGW32__
  41 #include "usleep.h"
  42 #endif/*__MINGW32__*/
  43
  44 #define RC632_TMO_AUTH1 140
  45
  46 #define TIMER_RELAX_FACTOR      10
  47
  48 #define ENTER()         DEBUGP("entering\n")
  49 const struct rfid_asic rc632;
  50
  51 struct register_file {
  52         u_int8_t reg;
  53         u_int8_t val;
  54 };
  55
  56 /* Register and FIFO Access functions */
  57 static int
  58 rc632_reg_write(struct rfid_asic_handle *handle,
  59                 u_int8_t reg,
  60                 u_int8_t val)
  61 {
  62         return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
  63 }
  64
  65 static int
  66 rc632_reg_read(struct rfid_asic_handle *handle,
  67                u_int8_t reg,
  68                u_int8_t *val)
  69 {
  70         return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
  71 }
  72
  73 static int
  74 rc632_fifo_write(struct rfid_asic_handle *handle,
  75                  u_int8_t len,
  76                  const u_int8_t *buf,
  77                  u_int8_t flags)
  78 {
  79         return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
  80                                                            len, buf, flags);
  81 }
  82
  83 static int
  84 rc632_fifo_read(struct rfid_asic_handle *handle,
  85                 u_int8_t len,
  86                 u_int8_t *buf)
  87 {
  88         return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
  89 }
  90
  91
  92 static int
  93 rc632_set_bits(struct rfid_asic_handle *handle,
  94                 u_int8_t reg,
  95                 u_int8_t val)
  96 {
  97         int ret;
  98         u_int8_t tmp;
  99
 100         ret = rc632_reg_read(handle, reg, &tmp);
 101         if (ret < 0)
 102                 return -1;
 103
 104         /* if bits are already set, no need to set them again */
 105         if ((tmp & val) == val)
 106                 return 0;
 107
 108         return rc632_reg_write(handle, reg, (tmp|val)&0xff);
 109 }
 110 static int
 111 rc632_set_bit_mask(struct rfid_asic_handle *handle,
 112                    u_int8_t reg, u_int8_t mask, u_int8_t val)
 113 {
 114         int ret;
 115         u_int8_t tmp;
 116
 117         ret = rc632_reg_read(handle, reg, &tmp);
 118         if (ret < 0)
 119                 return ret;
 120
 121         /* if bits are already like we want them, abort */
 122         if ((tmp & mask) == val)
 123                 return 0;
 124
 125         return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
 126 }
 127
 128 static int
 129 rc632_clear_bits(struct rfid_asic_handle *handle,
 130                  u_int8_t reg,
 131                  u_int8_t val)
 132 {
 133         int ret;
 134         u_int8_t tmp;
 135
 136         ret = rc632_reg_read(handle, reg, &tmp);
 137         if (ret < 0) {
 138                 DEBUGP("error during reg_read(%p, %d):%d\n",
 139                         handle, reg, ret);
 140                 return -1;
 141         }
 142         /* if bits are already cleared, no need to clear them again */
 143         if ((tmp & val) == 0)
 144                 return 0;
 145
 146         return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
 147 }
 148
 149 static int
 150 rc632_clear_irqs(struct rfid_asic_handle *handle, u_int8_t bits)
 151 {
 152         return rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, (~RC632_INT_SET)&bits);
 153 }
 154
 155 static int
 156 rc632_rf_power(struct rfid_asic_handle *handle, int on)
 157 {
 158         ENTER();
 159         if (on)
 160                 return rc632_set_bits(handle, RC632_REG_TX_CONTROL,
 161                                       RC632_TXCTRL_TX1_RF_EN|
 162                                       RC632_TXCTRL_TX2_RF_EN);
 163         else
 164                 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL,
 165                                         RC632_TXCTRL_TX1_RF_EN|
 166                                         RC632_TXCTRL_TX2_RF_EN);
 167 }
 168
 169 static int
 170 rc632_power(struct rfid_asic_handle *handle, int on)
 171 {
 172         ENTER();
 173         if (on)
 174                 return rc632_clear_bits(handle, RC632_REG_CONTROL,
 175                                         RC632_CONTROL_POWERDOWN);
 176         else
 177                 return rc632_set_bits(handle, RC632_REG_CONTROL,
 178                                       RC632_CONTROL_POWERDOWN);
 179 }
 180
 181 static int
 182 rc632_execute_script(struct rfid_asic_handle *h, struct register_file *f,
 183                      int len)
 184 {
 185         int i, ret;
 186
 187         for (i = 0; i < len; i++) {
 188                 ret = rc632_reg_write(h, f[i].reg, f[i].val);
 189                 if (ret < 0)
 190                         return ret;
 191         }
 192
 193         return 0;
 194 }
 195
 196 /* calculate best 8bit prescaler and divisor for given usec timeout */
 197 static int best_prescaler(u_int64_t timeout, u_int8_t *prescaler,
 198                           u_int8_t *divisor)
 199 {
 200         u_int8_t best_prescaler, best_divisor, i;
 201         int64_t smallest_diff;
 202
 203         smallest_diff = LLONG_MAX;
 204         best_prescaler = 0;
 205
 206         for (i = 0; i < 21; i++) {
 207                 u_int64_t clk, tmp_div, res;
 208                 int64_t diff;
 209                 clk = 13560000 / (1 << i);
 210                 tmp_div = (clk * timeout) / 1000000;
 211                 tmp_div++;
 212
 213                 if ((tmp_div > 0xff) || (tmp_div > clk))
 214                         continue;
 215
 216                 res = 1000000 / (clk / tmp_div);
 217                 diff = res - timeout;
 218
 219                 if (diff < 0)
 220                         continue;
 221
 222                 if (diff < smallest_diff) {
 223                         best_prescaler = i;
 224                         best_divisor = tmp_div;
 225                         smallest_diff = diff;
 226                 }
 227         }
 228
 229         *prescaler = best_prescaler;
 230         *divisor = best_divisor;
 231
 232         DEBUGP("timeout %u usec, prescaler = %u, divisor = %u\n",
 233                 timeout, best_prescaler, best_divisor);
 234
 235         return 0;
 236 }
 237
 238 static int
 239 rc632_timer_set(struct rfid_asic_handle *handle,
 240                 u_int64_t timeout)
 241 {
 242         int ret;
 243         u_int8_t prescaler, divisor, irq;
 244
 245         timeout *= TIMER_RELAX_FACTOR;
 246
 247         ret = best_prescaler(timeout, &prescaler, &divisor);
 248
 249         ret = rc632_reg_write(handle, RC632_REG_TIMER_CLOCK,
 250                               prescaler & 0x1f);
 251         if (ret < 0)
 252                 return ret;
 253
 254         ret = rc632_reg_write(handle, RC632_REG_TIMER_CONTROL,
 255                               RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
 256
 257         /* clear timer irq bit */
 258         ret = rc632_clear_irqs(handle, RC632_IRQ_TIMER);
 259
 260         /* enable timer IRQ */
 261         ret |= rc632_reg_write(handle, RC632_REG_INTERRUPT_EN, RC632_IRQ_SET | RC632_IRQ_TIMER);
 262
 263         ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
 264
 265         return ret;
 266 }
 267
 268 /* Wait until RC632 is idle or TIMER IRQ has happened */
 269 static int rc632_wait_idle_timer(struct rfid_asic_handle *handle)
 270 {
 271         int ret;
 272         u_int8_t stat, irq, cmd;
 273
 274         ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_EN, &irq);
 275         if (ret < 0)
 276                 return ret;
 277         DEBUGP_INTERRUPT_FLAG("irq_en",irq);
 278
 279         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_EN, RC632_IRQ_SET
 280                                 | RC632_IRQ_TIMER
 281                                 | RC632_IRQ_IDLE
 282                                 | RC632_IRQ_RX );
 283         if (ret < 0)
 284                 return ret;
 285
 286         while (1) {
 287                 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &stat);
 288                 DEBUGP_STATUS_FLAG(stat);
 289                 if (stat & RC632_STAT_ERR) {
 290                         u_int8_t err;
 291                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &err);
 292                         DEBUGP_ERROR_FLAG(err);
 293                         if (err & (RC632_ERR_FLAG_COL_ERR |
 294                                    RC632_ERR_FLAG_PARITY_ERR |
 295                                    RC632_ERR_FLAG_FRAMING_ERR |
 296                                 /* FIXME: why get we CRC errors in CL2 anticol at iso14443a operation with mifare UL? */
 297                                 /*   RC632_ERR_FLAG_CRC_ERR | */
 298                                    0))
 299                                 return -EIO;
 300                 }
 301                 if (stat & RC632_STAT_IRQ) {
 302                         ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
 303                         if (ret < 0)
 304                                 return ret;
 305                         DEBUGP_INTERRUPT_FLAG("irq_rq",irq);
 306
 307                         if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
 308                                 DEBUGP("timer expired before RX!!\n");
 309                                 rc632_clear_irqs(handle, RC632_IRQ_TIMER);
 310                                 return -ETIMEDOUT;
 311                         }
 312                 }
 313
 314                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 315                 if (ret < 0)
 316                         return ret;
 317
 318                 if (cmd == 0) {
 319                         rc632_clear_irqs(handle, RC632_IRQ_RX);
 320                         return 0;
 321                 }
 322
 323                 /* poll every millisecond */
 324                 usleep(1000);
 325         }
 326 }
 327
 328 /* Stupid RC632 implementations don't evaluate interrupts but poll the
 329  * command register for "status idle" */
 330 static int
 331 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
 332 {
 333         u_int8_t cmd = 0xff;
 334         int ret, cycles = 0;
 335 #define USLEEP_PER_CYCLE        128
 336
 337         timeout *= TIMER_RELAX_FACTOR;
 338
 339         while (cmd != 0) {
 340                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 341                 if (ret < 0)
 342                         return ret;
 343
 344                 {
 345                         u_int8_t foo;
 346                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
 347                         DEBUGP_STATUS_FLAG(foo);
 348                         /* check if Error has occured (ERR flag set) */
 349                         if (foo & RC632_STAT_ERR) {
 350                                 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
 351                                 DEBUGP_ERROR_FLAG(foo);
 352                         }
 353                         /* check if IRQ has occurred (IRQ flag set)*/
 354                         if (foo & RC632_STAT_IRQ) {
 355                                 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &foo);
 356                                 DEBUGP_INTERRUPT_FLAG("irq_rq",foo);
 357                                 /* clear all interrupts */
 358                                 rc632_clear_irqs(handle, 0xff);
 359                         }
 360                 }
 361                 if (cmd == 0) {
 362                         /* FIXME: read second time ?? */
 363                         DEBUGP("cmd == 0 (IDLE)\n");
 364                         return 0;
 365                 }
 366
 367                 /* Abort after some timeout */
 368                 if (cycles > timeout/USLEEP_PER_CYCLE) {
 369                         DEBUGP("timeout...\n");
 370                         return -ETIMEDOUT;
 371                 }
 372
 373                 cycles++;
 374                 usleep(USLEEP_PER_CYCLE);
 375         }
 376
 377         return 0;
 378 }
 379
 380 static int
 381 rc632_transmit(struct rfid_asic_handle *handle,
 382                 const u_int8_t *buf,
 383                 u_int8_t len,
 384                 u_int64_t timeout)
 385 {
 386         int ret, cur_len;
 387         const u_int8_t *cur_buf = buf;
 388
 389         DEBUGP("timeout=%u, tx_len=%u\n", timeout, len);
 390
 391         if (len > 64)
 392                 cur_len = 64;
 393         else
 394                 cur_len = len;
 395
 396         do {
 397                 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
 398                 if (ret < 0)
 399                         return ret;
 400
 401                 if (cur_buf == buf)  {
 402                         /* only start transmit first time */
 403                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 404                                               RC632_CMD_TRANSMIT);
 405                         if (ret < 0)
 406                                 return ret;
 407                 }
 408
 409                 cur_buf += cur_len;
 410                 if (cur_buf < buf + len) {
 411                         cur_len = buf - cur_buf;
 412                         if (cur_len > 64)
 413                                 cur_len = 64;
 414                 } else
 415                         cur_len = 0;
 416
 417         } while (cur_len);
 418
 419         return rc632_wait_idle(handle, timeout);
 420 }
 421
 422 static int
 423 tcl_toggle_pcb(struct rfid_asic_handle *handle)
 424 {
 425         /* FIXME: toggle something between 0x0a and 0x0b */
 426         return 0;
 427 }
 428
 429 static int
 430 rc632_transceive(struct rfid_asic_handle *handle,
 431                  const u_int8_t *tx_buf,
 432                  u_int8_t tx_len,
 433                  u_int8_t *rx_buf,
 434                  u_int8_t *rx_len,
 435                  u_int64_t timer,
 436                  unsigned int toggle)
 437 {
 438         int ret, cur_tx_len, i;
 439         u_int8_t rx_avail;
 440         const u_int8_t *cur_tx_buf = tx_buf;
 441
 442         DEBUGP("timeout=%u, rx_len=%u, tx_len=%u\n", timer, *rx_len, tx_len);
 443
 444         if (tx_len > 64)
 445                 cur_tx_len = 64;
 446         else
 447                 cur_tx_len = tx_len;
 448
 449
 450         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_IDLE);
 451         /* clear all interrupts */
 452         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
 453
 454         { u_int8_t tmp;
 455         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 456         DEBUGP_STATUS_FLAG(tmp);
 457         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 458         DEBUGP_ERROR_FLAG(tmp);
 459         }
 460
 461         ret = rc632_timer_set(handle, timer);
 462         if (ret < 0)
 463                 return ret;
 464
 465         do {
 466                 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
 467                 if (ret < 0)
 468                         return ret;
 469
 470                 if (cur_tx_buf == tx_buf) {
 471                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 472                                               RC632_CMD_TRANSCEIVE);
 473                         if (ret < 0)
 474                                 return ret;
 475                 }
 476
 477                 cur_tx_buf += cur_tx_len;
 478                 if (cur_tx_buf < tx_buf + tx_len) {
 479                         u_int8_t fifo_fill;
 480                         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
 481                                              &fifo_fill);
 482                         if (ret < 0)
 483                                 return ret;
 484
 485                         cur_tx_len = 64 - fifo_fill;
 486                 } else
 487                         cur_tx_len = 0;
 488
 489         } while (cur_tx_len);
 490
 491         if (toggle == 1)
 492                 tcl_toggle_pcb(handle);
 493
 494         ret = rc632_wait_idle_timer(handle);
 495         //ret = rc632_wait_idle(handle, timer);
 496
 497         DEBUGP("rc632_wait_idle >> ret=%d %s\n",ret,(ret==-ETIMEDOUT)?"ETIMEDOUT":"");
 498         if (ret < 0)
 499                 return ret;
 500
 501         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
 502         if (ret < 0)
 503                 return ret;
 504
 505         if (rx_avail > *rx_len)
 506                 DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
 507         else if (*rx_len > rx_avail)
 508                 *rx_len = rx_avail;
 509
 510         DEBUGP("rx_len == %d\n",*rx_len);
 511
 512         if (rx_avail == 0) {
 513                 u_int8_t tmp;
 514
 515                 for (i = 0; i < 1; i++){
 516                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 517                         DEBUGP_STATUS_FLAG(tmp);
 518                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 519                         DEBUGP_ERROR_FLAG(tmp);
 520                 }
 521                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 522
 523                 //return 0;
 524                 return -EIO;
 525         }
 526
 527         return rc632_fifo_read(handle, *rx_len, rx_buf);
 528         /* FIXME: discard addidional bytes in FIFO */
 529 }
 530
 531
 532 static int
 533 rc632_receive(struct rfid_asic_handle *handle,
 534                  u_int8_t *rx_buf,
 535                  u_int8_t *rx_len,
 536                  u_int64_t timer)
 537 {
 538         int ret, cur_tx_len, i;
 539         u_int8_t rx_avail;
 540
 541         DEBUGP("timeout=%u, rx_len=%u\n", timer, *rx_len);
 542         ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00); /* IDLE */
 543         /* clear all interrupts */
 544         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
 545
 546         ret = rc632_timer_set(handle, timer);
 547         if (ret < 0)
 548                 return ret;
 549
 550         ret = rc632_reg_write(handle, RC632_REG_COMMAND,RC632_CMD_RECEIVE);
 551         if (ret < 0)
 552                 return ret;
 553
 554         /* the timer cannot start in hardware based on the command we just
 555          * sent. this means that our timing will always be quite a bit more lax,
 556          * i.e. we'll always wait for a bit longer than the specs ask us to. */
 557         ret = rc632_set_bits(handle, RC632_REG_CONTROL,
 558                              RC632_CONTROL_TIMER_START);
 559         if (ret < 0)
 560                 return ret;
 561
 562         //ret = rc632_wait_idle(handle, timer);
 563         ret = rc632_wait_idle_timer(handle);
 564         if (ret < 0)
 565                 return ret;
 566
 567         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
 568         if (ret < 0)
 569                 return ret;
 570
 571         if (rx_avail > *rx_len) {
 572                 //DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
 573         } else if (*rx_len > rx_avail)
 574                 *rx_len = rx_avail;
 575
 576         if (rx_avail == 0) {
 577                 u_int8_t tmp;
 578
 579                 DEBUGP("rx_len == 0\n");
 580
 581                 for (i = 0; i < 1; i++) {
 582                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 583                         DEBUGP_STATUS_FLAG(tmp);
 584                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 585                         DEBUGP_ERROR_FLAG(tmp);
 586                 }
 587
 588                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 589                 return -1;
 590         }
 591
 592         return rc632_fifo_read(handle, *rx_len, rx_buf);
 593         /* FIXME: discard additional bytes in FIFO */
 594 }
 595
 596 #define MAX_WRITE_LEN   16      /* see Sec. 18.6.1.2 of RC632 Spec Rev. 3.2. */
 597
 598 static int
 599 rc632_write_eeprom(struct rfid_asic_handle *handle, u_int16_t addr,
 600                    u_int8_t *data, u_int8_t len)
 601 {
 602         u_int8_t sndbuf[MAX_WRITE_LEN + 2];
 603         u_int8_t reg;
 604         int ret;
 605
 606         if (len > MAX_WRITE_LEN)
 607                 return -EINVAL;
 608         if (addr < 0x10)
 609                 return -EPERM;
 610         if (addr > 0x1ff)
 611                 return -EINVAL;
 612
 613         sndbuf[0] = addr & 0x00ff;      /* LSB */
 614         sndbuf[1] = addr >> 8;          /* MSB */
 615         memcpy(&sndbuf[2], data, len);
 616
 617         ret = rc632_fifo_write(handle, len + 2, sndbuf, 0x03);
 618         if (ret < 0)
 619                 return ret;
 620
 621         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_WRITE_E2);
 622         if (ret < 0)
 623                 return ret;
 624
 625         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &reg);
 626         if (ret < 0)
 627                 return ret;
 628
 629         if (reg & RC632_ERR_FLAG_ACCESS_ERR)
 630                 return -EPERM;
 631
 632         while (1) {
 633                 u_int8_t reg;
 634                 ret = rc632_reg_read(handle, RC632_REG_SECONDARY_STATUS, &reg);
 635                 if (ret < 0)
 636                         return ret;
 637
 638                 if (reg & RC632_SEC_ST_E2_READY) {
 639                         /* the E2Write command must be terminated, See sec. 18.6.1.3 */
 640                         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_IDLE);
 641                         break;
 642                 }
 643         }
 644
 645         return ret;
 646 }
 647
 648 static int
 649 rc632_read_eeprom(struct rfid_asic_handle *handle, u_int16_t addr,
 650                   u_int8_t *buf, u_int8_t len)
 651 {
 652         u_int8_t sndbuf[3];
 653         u_int8_t reg;
 654         int ret;
 655
 656         sndbuf[0] = addr & 0xff;
 657         sndbuf[1] = addr >> 8;
 658         sndbuf[2] = len;
 659
 660         ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
 661         if (ret < 0)
 662                 return ret;
 663
 664         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
 665         if (ret < 0)
 666                 return ret;
 667
 668         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &reg);
 669         if (ret < 0)
 670                 return ret;
 671
 672         if (reg & RC632_ERR_FLAG_ACCESS_ERR)
 673                 return -EPERM;
 674
 675         usleep(20000);
 676
 677         return rc632_fifo_read(handle, len, buf);
 678 }
 679
 680 static int
 681 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
 682 {
 683         u_int8_t sndbuf[2] = { 0x01, 0x02 };
 684         u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
 685         int ret;
 686
 687         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
 688         if (ret < 0)
 689                 return ret;
 690
 691         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
 692         if (ret < 0)
 693                 return ret;
 694
 695         ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
 696         if (ret < 0)
 697                 return ret;
 698
 699         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
 700         if (ret < 0)
 701                 return ret;
 702
 703         usleep(10000);  /* FIXME: no checking for cmd completion? *
 704
 705         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
 706         if (ret < 0)
 707                 return ret;
 708
 709         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
 710         if (ret < 0)
 711                 return ret;
 712
 713         /* FIXME: what to do with crc result? */
 714         return ret;
 715 }
 716
 717
 718 int
 719 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
 720 {
 721         int ret = 0;
 722         u_int8_t i;
 723
 724         for (i = 0; i <= 0x3f; i++)
 725                 ret |= rc632_reg_read(handle, i, &buf[i]);
 726
 727         return ret;
 728 }
 729
 730 /* generic FIFO access functions (if no more efficient ones provided by
 731  * transport driver) */
 732
 733 static int
 734 generic_fifo_write()
 735 {
 736         /* FIXME: implementation (not needed for CM 5121) */
 737         return -1;
 738 }
 739
 740 static int
 741 generic_fifo_read()
 742 {
 743         /* FIXME: implementation (not neded for CM 5121) */
 744         return -1;
 745 }
 746
 747 static int
 748 rc632_init(struct rfid_asic_handle *ah)
 749 {
 750         int ret;
 751
 752         /* switch off rf (make sure PICCs are reset at init time) */
 753         ret = rc632_power(ah, 0);
 754         if (ret < 0)
 755                 return ret;
 756
 757         usleep(10000);
 758
 759         /* switch on rf */
 760         ret = rc632_power(ah, 1);
 761         if (ret < 0)
 762                 return ret;
 763
 764         /* disable register paging */
 765         ret = rc632_reg_write(ah, 0x00, 0x00);
 766         if (ret < 0)
 767                 return ret;
 768
 769         /* set some sane default values */
 770         ret = rc632_reg_write(ah, 0x11, 0x5b);
 771         if (ret < 0)
 772                 return ret;
 773
 774         /* switch off rf */
 775         ret = rc632_rf_power(ah, 0);
 776         if (ret < 0)
 777                 return ret;
 778
 779         usleep(100000);
 780
 781         /* switch on rf */
 782         ret = rc632_rf_power(ah, 1);
 783         if (ret < 0)
 784                 return ret;
 785
 786         return 0;
 787 }
 788
 789 static int
 790 rc632_fini(struct rfid_asic_handle *ah)
 791 {
 792         int ret;
 793
 794         /* switch off rf */
 795         ret = rc632_rf_power(ah, 0);
 796         if (ret < 0)
 797                 return ret;
 798
 799         ret = rc632_power(ah, 0);
 800         if (ret < 0)
 801                 return ret;
 802
 803         return 0;
 804 }
 805
 806 struct rfid_asic_handle *
 807 rc632_open(struct rfid_asic_transport_handle *th)
 808 {
 809         struct rfid_asic_handle *h;
 810
 811         h = malloc_asic_handle(sizeof(*h));
 812         if (!h)
 813                 return NULL;
 814         memset(h, 0, sizeof(*h));
 815
 816         h->asic = (void*)&rc632;
 817         h->rath = th;
 818         h->fc = h->asic->fc;
 819         /* FIXME: this is only cm5121 specific, since the latency
 820          * down to the RC632 FIFO is too long to refill during TX/RX */
 821         h->mtu = h->mru = 64;
 822
 823         if (rc632_init(h) < 0) {
 824                 free_asic_handle(h);
 825                 return NULL;
 826         }
 827
 828         return h;
 829 }
 830
 831 void
 832 rc632_close(struct rfid_asic_handle *h)
 833 {
 834         rc632_fini(h);
 835         free_asic_handle(h);
 836 }
 837
 838 /*
 839  * ISO14443A
 840  */
 841
 842 /* Register file for ISO14443A standard */
 843 static struct register_file iso14443a_script[] = {
 844         {
 845                 .reg    = RC632_REG_TX_CONTROL,
 846                 .val    = RC632_TXCTRL_MOD_SRC_INT |
 847                           RC632_TXCTRL_TX2_INV |
 848                           RC632_TXCTRL_FORCE_100_ASK |
 849                           RC632_TXCTRL_TX2_RF_EN |
 850                           RC632_TXCTRL_TX1_RF_EN,
 851         }, {
 852                 .reg    = RC632_REG_CW_CONDUCTANCE,
 853                 .val    = CM5121_CW_CONDUCTANCE,
 854         }, {
 855                 .reg    = RC632_REG_MOD_CONDUCTANCE,
 856                 .val    = CM5121_MOD_CONDUCTANCE,
 857         }, {
 858                 .reg    = RC632_REG_CODER_CONTROL,
 859                 .val    = (RC632_CDRCTRL_TXCD_14443A |
 860                            RC632_CDRCTRL_RATE_106K),
 861         }, {
 862                 .reg    = RC632_REG_MOD_WIDTH,
 863                 .val    = 0x13,
 864         }, {
 865                 .reg    = RC632_REG_MOD_WIDTH_SOF,
 866                 .val    = 0x3f,
 867         }, {
 868                 .reg    = RC632_REG_TYPE_B_FRAMING,
 869                 .val    = 0x00,
 870         }, {
 871                 .reg    = RC632_REG_RX_CONTROL1,
 872                 .val    = (RC632_RXCTRL1_GAIN_35DB |
 873                            RC632_RXCTRL1_ISO14443 |
 874                            RC632_RXCTRL1_SUBCP_8),
 875         }, {
 876                 .reg    = RC632_REG_DECODER_CONTROL,
 877                 .val    = (RC632_DECCTRL_MANCHESTER |
 878                            RC632_DECCTRL_RXFR_14443A),
 879         }, {
 880                 .reg    = RC632_REG_BIT_PHASE,
 881                 .val    = CM5121_14443A_BITPHASE,
 882         }, {
 883                 .reg    = RC632_REG_RX_THRESHOLD,
 884                 .val    = CM5121_14443A_THRESHOLD,
 885         }, {
 886                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
 887                 .val    = 0x00,
 888         }, {
 889                 .reg    = RC632_REG_RX_CONTROL2,
 890                 .val    = (RC632_RXCTRL2_DECSRC_INT |
 891                            RC632_RXCTRL2_CLK_Q),
 892         }, {
 893                 .reg    = RC632_REG_RX_WAIT,
 894                 //.val  = 0x03, /* default value */
 895                 .val    = 0x06, /* omnikey */
 896         }, {
 897                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
 898                 .val    = (RC632_CR_PARITY_ENABLE |
 899                            RC632_CR_PARITY_ODD),
 900         }, {
 901                 .reg    = RC632_REG_CRC_PRESET_LSB,
 902                 .val    = 0x63,
 903         }, {
 904                 .reg    = RC632_REG_CRC_PRESET_MSB,
 905                 .val    = 0x63,
 906         },
 907 };
 908
 909 static int
 910 rc632_iso14443a_init(struct rfid_asic_handle *handle)
 911 {
 912         int ret;
 913
 914         /* flush fifo (our way) */
 915         ret = rc632_reg_write(handle, RC632_REG_CONTROL,
 916                               RC632_CONTROL_FIFO_FLUSH);
 917
 918         ret = rc632_execute_script(handle, iso14443a_script,
 919                                    ARRAY_SIZE(iso14443a_script));
 920         if (ret < 0)
 921                 return ret;
 922
 923         return 0;
 924 }
 925
 926 static int
 927 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
 928 {
 929
 930 #if 0
 931         ret = rc632_rf_power(handle, 0);
 932         if (ret < 0)
 933                 return ret;
 934 #endif
 935
 936
 937         return 0;
 938 }
 939
 940
 941 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
 942 static int
 943 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
 944                                 u_int8_t cmd,
 945                                 struct iso14443a_atqa *atqa)
 946 {
 947         int ret;
 948         u_int8_t tx_buf[1];
 949         u_int8_t rx_len = 2;
 950         u_int8_t error_flag;
 951
 952         memset(atqa, 0, sizeof(*atqa));
 953
 954         tx_buf[0] = cmd;
 955
 956         /* transfer only 7 bits of last byte in frame */
 957         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
 958         if (ret < 0)
 959                 return ret;
 960
 961         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
 962                                 RC632_CONTROL_CRYPTO1_ON);
 963         if (ret < 0)
 964                 return ret;
 965
 966 #if 0
 967         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
 968                                 (RC632_CR_PARITY_ENABLE |
 969                                  RC632_CR_PARITY_ODD));
 970 #else
 971         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
 972                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
 973
 974 #endif
 975         if (ret < 0)
 976                 return ret;
 977
 978         ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
 979                                 (u_int8_t *)atqa, &rx_len,
 980                                 ISO14443A_FDT_ANTICOL_LAST1, 0);
 981         if (ret < 0) {
 982                 DEBUGP("error during rc632_transceive()\n");
 983                 return ret;
 984         }
 985
 986         /* switch back to normal 8bit last byte */
 987         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
 988         if (ret < 0)
 989                 return ret;
 990
 991         /* determine whether there was a collission */
 992         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
 993         if (ret < 0)
 994                 return ret;
 995
 996         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
 997                 u_int8_t boc;
 998                 /* retrieve bit of collission */
 999                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1000                 if (ret < 0)
1001                         return ret;
1002                 DEBUGP("collision detected in xcv_sf: bit_of_col=%u\n", boc);
1003                 /* FIXME: how to signal this up the stack */
1004         }
1005
1006         if (rx_len != 2) {
1007                 DEBUGP("rx_len(%d) != 2\n", rx_len);
1008                 return -1;
1009         }
1010
1011         return 0;
1012 }
1013
1014 /* transceive regular frame */
1015 static int
1016 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
1017                            unsigned int frametype,
1018                            const u_int8_t *tx_buf, unsigned int tx_len,
1019                            u_int8_t *rx_buf, unsigned int *rx_len,
1020                            u_int64_t timeout, unsigned int flags)
1021 {
1022         int ret;
1023         u_int8_t rxl;
1024         u_int8_t channel_red;
1025
1026         if (*rx_len > 0xff)
1027                 rxl = 0xff;
1028         else
1029                 rxl = *rx_len;
1030
1031         memset(rx_buf, 0, *rx_len);
1032
1033         switch (frametype) {
1034         case RFID_14443A_FRAME_REGULAR:
1035         case RFID_MIFARE_FRAME:
1036                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
1037                                 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
1038                 break;
1039         case RFID_14443B_FRAME_REGULAR:
1040                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
1041                                 |RC632_CR_CRC3309;
1042                 break;
1043 #if 0
1044         case RFID_MIFARE_FRAME:
1045                 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
1046                 break;
1047 #endif
1048         case RFID_15693_FRAME:
1049                 channel_red = RC632_CR_CRC3309 | RC632_CR_RX_CRC_ENABLE
1050                                 | RC632_CR_TX_CRC_ENABLE;
1051                 break;
1052         case RFID_15693_FRAME_ICODE1:
1053                 /* FIXME: implement */
1054         default:
1055                 return -EINVAL;
1056                 break;
1057         }
1058         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1059                               channel_red);
1060         if (ret < 0)
1061                 return ret;
1062         DEBUGP("tx_len=%u\n",tx_len);
1063         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, timeout, 0);
1064         *rx_len = rxl;
1065         if (ret < 0)
1066                 return ret;
1067
1068
1069         return 0;
1070 }
1071
1072 /* transceive anti collission bitframe */
1073 static int
1074 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
1075                                 struct iso14443a_anticol_cmd *acf,
1076                                 unsigned int *bit_of_col)
1077 {
1078         int ret;
1079         u_int8_t rx_buf[64];
1080         u_int8_t rx_len = sizeof(rx_buf);
1081         u_int8_t rx_align = 0, tx_last_bits, tx_bytes, tx_bytes_total;
1082         u_int8_t boc;
1083         u_int8_t error_flag;
1084         *bit_of_col = ISO14443A_BITOFCOL_NONE;
1085         memset(rx_buf, 0, sizeof(rx_buf));
1086
1087         /* disable mifare cryto */
1088         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
1089                                 RC632_CONTROL_CRYPTO1_ON);
1090         if (ret < 0)
1091                 return ret;
1092
1093         /* disable CRC summing */
1094 #if 0
1095         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1096                                 (RC632_CR_PARITY_ENABLE |
1097                                  RC632_CR_PARITY_ODD));
1098 #else
1099         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1100                                 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1101 #endif
1102         if (ret < 0)
1103                 return ret;
1104
1105         tx_last_bits = acf->nvb & 0x07; /* lower nibble indicates bits */
1106         tx_bytes = ( acf->nvb >> 4 ) & 0x07;
1107         if (tx_last_bits) {
1108                 tx_bytes_total = tx_bytes+1;
1109                 rx_align = tx_last_bits & 0x07; /* rx frame complements tx */
1110         }
1111         else
1112                 tx_bytes_total = tx_bytes;
1113
1114         /* set RxAlign and TxLastBits*/
1115         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
1116                                 (rx_align << 4) | (tx_last_bits));
1117         if (ret < 0)
1118                 return ret;
1119
1120         ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes_total,
1121                                 rx_buf, &rx_len, 0x32, 0);
1122         if (ret < 0)
1123                 return ret;
1124
1125         /* bitwise-OR the two halves of the split byte */
1126         acf->uid_bits[tx_bytes-2] = (
1127                   (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
1128                 | rx_buf[0]);
1129
1130         /* copy the rest */
1131         if (rx_len)
1132                 memcpy(&acf->uid_bits[tx_bytes-1], &rx_buf[1], rx_len-1);
1133
1134         /* determine whether there was a collission */
1135         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1136         if (ret < 0)
1137                 return ret;
1138
1139         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1140                 /* retrieve bit of collission */
1141                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1142                 if (ret < 0)
1143                         return ret;
1144
1145                 /* bit of collission relative to start of part 1 of
1146                  * anticollision frame (!) */
1147                 *bit_of_col = 2*8 + boc;
1148         }
1149
1150         return 0;
1151 }
1152
1153 enum rc632_rate {
1154         RC632_RATE_106  = 0x00,
1155         RC632_RATE_212  = 0x01,
1156         RC632_RATE_424  = 0x02,
1157         RC632_RATE_848  = 0x03,
1158 };
1159
1160 struct rx_config {
1161         u_int8_t        subc_pulses;
1162         u_int8_t        rx_coding;
1163         u_int8_t        rx_threshold;
1164         u_int8_t        bpsk_dem_ctrl;
1165 };
1166
1167 struct tx_config {
1168         u_int8_t        rate;
1169         u_int8_t        mod_width;
1170 };
1171
1172 static struct rx_config rx_configs[] = {
1173         {
1174                 .subc_pulses    = RC632_RXCTRL1_SUBCP_8,
1175                 .rx_coding      = RC632_DECCTRL_MANCHESTER,
1176                 .rx_threshold   = 0x88,
1177                 .bpsk_dem_ctrl  = 0x00,
1178         },
1179         {
1180                 .subc_pulses    = RC632_RXCTRL1_SUBCP_4,
1181                 .rx_coding      = RC632_DECCTRL_BPSK,
1182                 .rx_threshold   = 0x50,
1183                 .bpsk_dem_ctrl  = 0x0c,
1184         },
1185         {
1186                 .subc_pulses    = RC632_RXCTRL1_SUBCP_2,
1187                 .rx_coding      = RC632_DECCTRL_BPSK,
1188                 .rx_threshold   = 0x50,
1189                 .bpsk_dem_ctrl  = 0x0c,
1190         },
1191         {
1192                 .subc_pulses    = RC632_RXCTRL1_SUBCP_1,
1193                 .rx_coding      = RC632_DECCTRL_BPSK,
1194                 .rx_threshold   = 0x50,
1195                 .bpsk_dem_ctrl  = 0x0c,
1196         },
1197 };
1198
1199 static struct tx_config tx_configs[] = {
1200         {
1201                 .rate           = RC632_CDRCTRL_RATE_106K,
1202                 .mod_width      = 0x13,
1203         },
1204         {
1205                 .rate           = RC632_CDRCTRL_RATE_212K,
1206                 .mod_width      = 0x07,
1207         },
1208         {
1209                 .rate           = RC632_CDRCTRL_RATE_424K,
1210                 .mod_width      = 0x03,
1211         },
1212         {
1213                 .rate           = RC632_CDRCTRL_RATE_848K,
1214                 .mod_width      = 0x01,
1215         },
1216 };
1217
1218 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
1219                                      unsigned int tx, unsigned int rate)
1220 {
1221         int rc;
1222         u_int8_t reg;
1223
1224
1225         if (!tx) {
1226                 /* Rx */
1227                 if (rate > ARRAY_SIZE(rx_configs))
1228                         return -EINVAL;
1229
1230                 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
1231                                         RC632_RXCTRL1_SUBCP_MASK,
1232                                         rx_configs[rate].subc_pulses);
1233                 if (rc < 0)
1234                         return rc;
1235
1236                 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
1237                                         RC632_DECCTRL_BPSK,
1238                                         rx_configs[rate].rx_coding);
1239                 if (rc < 0)
1240                         return rc;
1241
1242                 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1243                                         rx_configs[rate].rx_threshold);
1244                 if (rc < 0)
1245                         return rc;
1246
1247                 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
1248                         rc = rc632_reg_write(handle,
1249                                              RC632_REG_BPSK_DEM_CONTROL,
1250                                              rx_configs[rate].bpsk_dem_ctrl);
1251                         if (rc < 0)
1252                                 return rc;
1253                 }
1254         } else {
1255                 /* Tx */
1256                 if (rate > ARRAY_SIZE(tx_configs))
1257                         return -EINVAL;
1258
1259                 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
1260                                         RC632_CDRCTRL_RATE_MASK,
1261                                         tx_configs[rate].rate);
1262                 if (rc < 0)
1263                         return rc;
1264
1265                 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
1266                                      tx_configs[rate].mod_width);
1267                 if (rc < 0)
1268                         return rc;
1269         }
1270
1271         return 0;
1272 }
1273
1274 #if 0
1275 static struct register_file iso14443b_script[] = {
1276         {
1277                 .reg    = RC632_REG_TX_CONTROL,
1278                 .val    = (RC632_TXCTRL_TX1_RF_EN |
1279                            RC632_TXCTRL_TX2_RF_EN |
1280                            RC632_TXCTRL_TX2_INV |
1281                            RC632_TXCTRL_MOD_SRC_INT),
1282         }, {
1283                 .reg    = RC632_REG_CW_CONDUCTANCE,
1284                 .val    = 0x3f,
1285         }, {
1286                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1287                 .val    = 0x04,
1288         }, {
1289                 .reg    = RC632_REG_CODER_CONTROL,
1290                 .val    = (RC632_CDRCTRL_TXCD_NRZ |
1291                            RC632_CDRCTRL_RATE_14443B),
1292         }, {
1293                 .reg    = RC632_REG_MOD_WIDTH,
1294                 .val    = 0x13,
1295         }, {
1296                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1297                 .val    = 0x3f,
1298         }, {
1299                 .reg    = RC632_REG_TYPE_B_FRAMING,
1300                 .val    = (RC632_TBFRAMING_SOF_11L_3H |
1301                            (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1302                            RC632_TBFRAMING_EOF_11);
1303         }, {
1304                 .reg    = RC632_REG_RX_CONTROL1,
1305                 .val    = (RC632_RXCTRL1_GAIN_35DB |
1306                            RC632_RXCTRL1_ISO14443,
1307                            RC632_RXCTRL1_SUBCP_8),
1308         }, {
1309                 .reg    = RC632_REG_DECODER_CONTROL,
1310                 .val    = (RC632_DECCTRL_BPSK |
1311                            RC632_DECCTRL_RXFR_14443B),
1312         }, {
1313                 .reg    = RC632_REG_BIT_PHASE,
1314                 .val    = CM5121_14443B_BITPHASE,
1315         }, {
1316                 .reg    = RC632_REG_RX_THRESHOLD,
1317                 .val    = CM5121_14443B_THRESHOLD,
1318         }, {
1319                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1320                 .val    = ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1321                            (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1322                            RC632_BPSKD_FILTER_AMP_DETECT |
1323                            RC632_BPSKD_NO_RX_EOF |
1324                            RC632_BPSKD_NO_RX_EGT),
1325         }, {
1326                 .reg    = RC632_REG_RX_CONTROL2,
1327                 .val    = (RC632_RXCTRL2_AUTO_PD |
1328                            RC632_RXCTRL2_DECSRC_INT),
1329         }, {
1330                 .reg    = RC632_REG_RX_WAIT,
1331                 .val    = 0x03,
1332         }, {
1333                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1334                 .val    = (RC632_CR_TX_CRC_ENABLE |
1335                            RC632_CR_RX_CRC_ENABLE |
1336                            RC632_CR_CRC3309),
1337         }, {
1338                 .reg    = RC632_REG_CRC_PRESET_LSB,
1339                 .val    = 0xff,
1340         }, {
1341                 .reg    = RC632_REG_CRC_PRESET_MSB,
1342                 .val    = 0xff,
1343         },
1344 };
1345 #endif
1346
1347 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
1348 {
1349         int ret;
1350         ENTER();
1351         /* FIXME: some FIFO work */
1352
1353         /* flush fifo (our way) */
1354         ret = rc632_reg_write(handle, RC632_REG_CONTROL,
1355                               RC632_CONTROL_FIFO_FLUSH);
1356         if (ret < 0)
1357                 return ret;
1358
1359         ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
1360                         (RC632_TXCTRL_TX1_RF_EN |
1361                          RC632_TXCTRL_TX2_RF_EN |
1362                          RC632_TXCTRL_TX2_INV |
1363                          RC632_TXCTRL_MOD_SRC_INT));
1364         if (ret < 0)
1365                 return ret;
1366
1367         ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
1368         if (ret < 0)
1369                 return ret;
1370
1371         ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
1372         if (ret < 0)
1373                 return ret;
1374
1375         ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
1376                               (RC632_CDRCTRL_TXCD_NRZ |
1377                                RC632_CDRCTRL_RATE_14443B));
1378         if (ret < 0)
1379                 return ret;
1380
1381         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
1382         if (ret < 0)
1383                 return ret;
1384
1385         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1386         if (ret < 0)
1387                 return ret;
1388
1389         ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
1390                               (RC632_TBFRAMING_SOF_11L_3H |
1391                                (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1392                                RC632_TBFRAMING_EOF_11));
1393         if (ret < 0)
1394                 return ret;
1395
1396         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
1397                               (RC632_RXCTRL1_GAIN_35DB |
1398                                RC632_RXCTRL1_ISO14443 |
1399                                RC632_RXCTRL1_SUBCP_8));
1400         if (ret < 0)
1401                 return ret;
1402
1403         ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
1404                               (RC632_DECCTRL_BPSK |
1405                                RC632_DECCTRL_RXFR_14443B));
1406         if (ret < 0)
1407                 return ret;
1408
1409         ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
1410                                 CM5121_14443B_BITPHASE);
1411         if (ret < 0)
1412                 return ret;
1413
1414         ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1415                                 CM5121_14443B_THRESHOLD);
1416         if (ret < 0)
1417                 return ret;
1418
1419         ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1420                               ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1421                                (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1422                                RC632_BPSKD_FILTER_AMP_DETECT |
1423                                RC632_BPSKD_NO_RX_EOF |
1424                                RC632_BPSKD_NO_RX_EGT));
1425         if (ret < 0)
1426                 return ret;
1427
1428         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1429                               (RC632_RXCTRL2_AUTO_PD |
1430                                RC632_RXCTRL2_DECSRC_INT));
1431         if (ret < 0)
1432                 return ret;
1433
1434         ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1435         if (ret < 0)
1436                 return ret;
1437
1438         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1439                               (RC632_CR_TX_CRC_ENABLE |
1440                                RC632_CR_RX_CRC_ENABLE |
1441                                RC632_CR_CRC3309));
1442         if (ret < 0)
1443                 return ret;
1444
1445         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1446         if (ret < 0)
1447                 return ret;
1448
1449         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1450         if (ret < 0)
1451                 return ret;
1452
1453         return 0;
1454 }
1455
1456
1457
1458 /*
1459  * ISO15693
1460  */
1461
1462 /* Register file for ISO15693 standard */
1463 static struct register_file iso15693_fast_script[] = {
1464         {
1465                 .reg    = RC632_REG_TX_CONTROL,
1466                 .val    = RC632_TXCTRL_MOD_SRC_INT |
1467                           RC632_TXCTRL_TX2_INV |
1468                           RC632_TXCTRL_TX2_RF_EN |
1469                           RC632_TXCTRL_TX1_RF_EN,
1470         }, {
1471                 .reg    = RC632_REG_CW_CONDUCTANCE,
1472                 .val    = 0x3f,
1473         }, {
1474                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1475                 /* FIXME: nxp default for icode1/15693: 0x05 */
1476                 //.val  = 0x02,
1477                 .val    = 0x21, /* omnikey */
1478         }, {
1479                 .reg    = RC632_REG_CODER_CONTROL,
1480                 .val    = RC632_CDRCTRL_TXCD_15693_FAST |
1481                           RC632_CDRCTRL_RATE_15693,
1482         }, {
1483                 .reg    = RC632_REG_MOD_WIDTH,
1484                 .val    = 0x3f,
1485         }, {
1486                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1487                 .val    = 0x3f,
1488         }, {
1489                 .reg    = RC632_REG_TYPE_B_FRAMING,
1490                 .val    = 0x00,
1491         }, {
1492                 .reg    = RC632_REG_RX_CONTROL1,
1493                 .val    = RC632_RXCTRL1_ISO15693 |
1494                           RC632_RXCTRL1_SUBCP_16 |
1495                           RC632_RXCTRL1_GAIN_35DB,
1496         }, {
1497                 /* FIXME: this should always be the case */
1498                 .reg    = RC632_REG_RX_CONTROL2,
1499                 .val    = RC632_RXCTRL2_DECSRC_INT,
1500         }, {
1501                 .reg    = RC632_REG_DECODER_CONTROL,
1502                 .val    = RC632_DECCTRL_MANCHESTER |
1503                           RC632_DECCTRL_RX_INVERT |
1504                           RC632_DECCTRL_ZEROAFTERCOL |
1505                           RC632_DECCTRL_RXFR_15693,
1506         }, {
1507                 .reg    = RC632_REG_BIT_PHASE,
1508                 /* FIXME: nxp default for icode1/15693: 0x54 */
1509                 //.val  = 0x52,
1510                 .val    = 0xd0, /* omnikey */
1511         }, {
1512                 .reg    = RC632_REG_RX_THRESHOLD,
1513                 /* FIXME: nxp default for icode1/15693: 0x68 */
1514                 //.val  = 0x66,
1515                 .val    = 0xed,
1516         }, {
1517                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1518                 .val    = 0x00,
1519         }, {
1520                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1521                 .val    = RC632_CR_RX_CRC_ENABLE |
1522                           RC632_CR_TX_CRC_ENABLE |
1523                           RC632_CR_CRC3309,
1524         }, {
1525                 .reg    = RC632_REG_CRC_PRESET_LSB,
1526                 .val    = 0xff,
1527         }, {
1528                 .reg    = RC632_REG_CRC_PRESET_MSB,
1529                 .val    = 0xff,
1530         },
1531 };
1532
1533 /* Register file for I*Code standard */
1534 static struct register_file icode1_std_script[] = {
1535         {
1536                 .reg    = RC632_REG_TX_CONTROL,
1537                 .val    = RC632_TXCTRL_MOD_SRC_INT |
1538                           RC632_TXCTRL_TX2_INV |
1539                           RC632_TXCTRL_TX2_RF_EN |
1540                           RC632_TXCTRL_TX1_RF_EN,
1541         }, {
1542                 .reg    = RC632_REG_CW_CONDUCTANCE,
1543                 .val    = 0x3f,
1544         }, {
1545                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1546                 /* FIXME: nxp default for icode1/15693: 0x05 */
1547                 .val    = 0x02,
1548         }, {
1549                 .reg    = RC632_REG_CODER_CONTROL,
1550                 .val    = RC632_CDRCTRL_TXCD_ICODE_STD |
1551                           RC632_CDRCTRL_RATE_15693,
1552         }, {
1553                 .reg    = RC632_REG_MOD_WIDTH,
1554                 .val    = 0x3f,
1555         }, {
1556                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1557                 .val    = 0x3f,
1558         }, {
1559                 .reg    = RC632_REG_TYPE_B_FRAMING,
1560                 .val    = 0x00,
1561         }, {
1562                 .reg    = RC632_REG_RX_CONTROL1,
1563                 .val    = RC632_RXCTRL1_ISO15693 |
1564                           RC632_RXCTRL1_SUBCP_16 |
1565                           RC632_RXCTRL1_GAIN_35DB,
1566         }, {
1567                 /* FIXME: this should always be the case */
1568                 .reg    = RC632_REG_RX_CONTROL2,
1569                 .val    = RC632_RXCTRL2_DECSRC_INT,
1570         }, {
1571                 .reg    = RC632_REG_DECODER_CONTROL,
1572                 .val    = RC632_DECCTRL_MANCHESTER |
1573                           RC632_DECCTRL_RXFR_ICODE,
1574         }, {
1575                 .reg    = RC632_REG_BIT_PHASE,
1576                 /* FIXME: nxp default for icode1/15693: 0x54 */
1577                 .val    = 0x52,
1578         }, {
1579                 .reg    = RC632_REG_RX_THRESHOLD,
1580                 /* FIXME: nxp default for icode1/15693: 0x68 */
1581                 .val    = 0x66,
1582         }, {
1583                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1584                 .val    = 0x00,
1585         }, {
1586                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1587                 /* 16bit CRC, no parity, not CRC3309 */
1588                 .val    = RC632_CR_RX_CRC_ENABLE |
1589                           RC632_CR_TX_CRC_ENABLE,
1590         }, {
1591                 .reg    = RC632_REG_CRC_PRESET_LSB,
1592                 .val    = 0xfe,
1593         }, {
1594                 .reg    = RC632_REG_CRC_PRESET_MSB,
1595                 .val    = 0xff,
1596         /* }, {
1597                 .reg    = RC632_REG_INTERRUPT_EN,
1598                 .val    = RC632_INT_IDLE |
1599                           RC632_INT_TIMER |
1600                           RC632_INT_RX |
1601                           RC632_INT_TX, */
1602         }
1603 };
1604
1605 /* incremental changes on top of icode1_std_script */
1606 static struct register_file icode1_fast_patch[] = {
1607         {
1608                 .reg    = RC632_REG_CODER_CONTROL,
1609                 .val    = RC632_CDRCTRL_TXCD_ICODE_FAST |
1610                           RC632_CDRCTRL_RATE_ICODE_FAST,
1611         }, {
1612                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1613                 .val    = 0x73, /* 18.88uS */
1614         },
1615 };
1616
1617
1618 static int
1619 rc632_iso15693_init(struct rfid_asic_handle *h)
1620 {
1621         int ret;
1622
1623         /* flush fifo (our way) */
1624         ret = rc632_reg_write(h, RC632_REG_CONTROL,
1625                               RC632_CONTROL_FIFO_FLUSH);
1626         if (ret < 0)
1627                 return ret;
1628
1629         ret = rc632_execute_script(h, iso15693_fast_script,
1630                                    ARRAY_SIZE(iso15693_fast_script));
1631         if (ret < 0)
1632                 return ret;
1633
1634         return 0;
1635 }
1636
1637 static int
1638 rc632_iso15693_icode1_init(struct rfid_asic_handle *h)
1639 {
1640         int ret;
1641
1642         ret = rc632_execute_script(h, icode1_std_script,
1643                                    ARRAY_SIZE(icode1_std_script));
1644         if (ret < 0)
1645                 return ret;
1646
1647         /* FIXME: how to configure fast/slow properly? */
1648 #if 0
1649         if (fast) {
1650                 ret = rc632_execute_script(h, icode1_fast_patch,
1651                                            ARRAY_SIZE(icode1_fast_patch));
1652                 if (ret < 0)
1653                         return ret;
1654         }
1655 #endif
1656
1657         return 0;
1658 }
1659
1660 static int
1661 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1662 {
1663         int ret;
1664
1665         /* ICL */
1666
1667         ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1668                                                 (RC632_TXCTRL_MOD_SRC_INT |
1669                                                  RC632_TXCTRL_TX2_INV |
1670                                                  RC632_TXCTRL_TX2_RF_EN |
1671                                                  RC632_TXCTRL_TX1_RF_EN));
1672         if (ret < 0)
1673                 return ret;
1674
1675         ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1676         if (ret < 0)
1677                 return ret;
1678
1679         ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1680         if (ret < 0)
1681                 return ret;
1682
1683         ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1684                                                 (RC632_CDRCTRL_RATE_15693 |
1685                                                  RC632_CDRCTRL_TXCD_ICODE_STD |
1686                                                  0x03)); /* FIXME */
1687         if (ret < 0)
1688                 return ret;
1689
1690         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1691         if (ret < 0)
1692                 return ret;
1693
1694         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1695         if (ret < 0)
1696                 return ret;
1697         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1698                                                 (RC632_RXCTRL1_SUBCP_16|
1699                                                  RC632_RXCTRL1_ISO15693|
1700                                                  RC632_RXCTRL1_GAIN_35DB));
1701         if (ret < 0)
1702                 return ret;
1703         ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1704                                                 (RC632_DECCTRL_RX_INVERT|
1705                                                  RC632_DECCTRL_RXFR_15693));
1706         if (ret < 0)
1707                 return ret;
1708
1709         ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1710         if (ret < 0)
1711                 return ret;
1712
1713         ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1714         if (ret < 0)
1715                 return ret;
1716
1717         ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1718         if (ret < 0)
1719                 return ret;
1720
1721         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1722                                                 RC632_RXCTRL2_DECSRC_INT);
1723         if (ret < 0)
1724                 return ret;
1725
1726         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1727         if (ret < 0)
1728                 return ret;
1729
1730         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1731         if (ret < 0)
1732                 return ret;
1733
1734         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1735         if (ret < 0)
1736                 return ret;
1737
1738         return 0;
1739 }
1740
1741 static void uuid_reversecpy(unsigned char* out, unsigned char* in, int len)
1742 {
1743         int i = 0;
1744         while (len > 0) {
1745                 out[i] = in[len];
1746                 len--;
1747                 i++;
1748         }
1749 }
1750
1751 static int
1752 rc632_iso15693_transceive_ac(struct rfid_asic_handle *handle,
1753                              const struct iso15693_anticol_cmd *acf,
1754                              unsigned int acf_len,
1755                              struct iso15693_anticol_resp *resp,
1756                              unsigned int *rx_len, unsigned char *bit_of_col)
1757 {
1758         u_int8_t error_flag, boc;
1759         //u_int8_t rx_len;
1760
1761         int ret, tx_len, mask_len_bytes;
1762         unsigned int rate = ISO15693_T_SLOW;
1763
1764         if (acf->req.flags & RFID_15693_F_RATE_HIGH)
1765                 rate = ISO15693_T_FAST;
1766
1767         DEBUGP("acf = %s\n", rfid_hexdump(acf, acf_len));
1768
1769         ret = rc632_transceive(handle, (u_int8_t *)acf, acf_len,
1770                                (u_int8_t *) resp, rx_len,
1771                                iso15693_timing[rate][ISO15693_T1], 0);
1772         if (ret == -ETIMEDOUT || ret == -EIO)
1773                 return ret;
1774
1775         /* determine whether there was a collission */
1776         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1777         if (ret < 0)
1778                 return ret;
1779         DEBUGP_ERROR_FLAG(error_flag);
1780
1781         //FIXME: check for framing and crc errors...
1782         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1783                 /* retrieve bit of collission */
1784                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1785                 if (ret < 0)
1786                         return ret;
1787                 *bit_of_col = boc;
1788         } else {
1789                 *bit_of_col = 0;
1790                 if (error_flag & RC632_ERR_FLAG_CRC_ERR)
1791                         return -EIO;
1792         }
1793
1794         return 0;
1795
1796 #if 0
1797         *bit_of_col = 0;
1798
1799         mask_len_bytes = (acf->mask_len % 8) ? acf->mask_len/8+1 : acf->mask_len/8;
1800
1801         if (acf->current_slot == 0) {
1802                 /* first call: transmit Inventory frame */
1803                 DEBUGP("first_frame\n");
1804
1805                 tx_len = sizeof(struct iso15693_request) + 1 + mask_len_bytes;
1806
1807                 ret = rc632_transceive(handle, (u_int8_t *)&req, tx_len,
1808                                         (u_int8_t *)&rx_buf, &rx_len, ISO15693_T1, 0);
1809                 acf->current_slot = 1;
1810                 DEBUGP("rc632_transceive ret: %d rx_len: %d\n",ret,rx_len);
1811                 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1812                         return ret;     */
1813
1814         } else {
1815                 /* second++ call: end timeslot with EOFpulse and read */
1816                 DEBUGP("second++_frame\n");
1817                 if ((acf->current_slot > 16) ||
1818                     ((acf->flags & RFID_15693_F5_NSLOTS_1 == 0)
1819                                         && (acf->current_slot > 1))) {
1820
1821                         memset(uuid, 0, ISO15693_UID_LEN);
1822                         return -1;
1823                 }
1824
1825                 /* reset EOF-pulse-bit to 0 */
1826                 ret = rc632_clear_bits(handle, RC632_REG_CODER_CONTROL,
1827                                        RC632_CDRCTRL_15693_EOF_PULSE);
1828                 usleep(50);
1829                 /* generate EOF pulse */
1830                 ret = rc632_set_bits(handle, RC632_REG_CODER_CONTROL,
1831                                      RC632_CDRCTRL_15693_EOF_PULSE);
1832                 if (ret < 0)
1833                         return ret;
1834                 // DEBUGP("waiting for EOF pulse\n");
1835                 // ret = rc632_wait_idle(handle, 10); //wait for idle
1836
1837                 rx_len = sizeof(rx_buf);
1838                 ret = rc632_receive(handle, (u_int8_t*)&rx_buf, &rx_len, ISO15693_T3);
1839                 DEBUGP("rc632_receive ret: %d rx_len: %d\n", ret, rx_len);
1840                 acf->current_slot++;
1841
1842                 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1843                         return ret; */
1844         }
1845
1846         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
1847         DEBUGP_STATUS_FLAG(tmp);
1848
1849         if (ret == -ETIMEDOUT) {
1850                 /* no VICC answer in this timeslot*/
1851                 memset(uuid, 0, ISO15693_UID_LEN);
1852                 return -ETIMEDOUT;
1853         } else {
1854                 /* determine whether there was a collission */
1855                 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1856                 DEBUGP_ERROR_FLAG(error_flag);
1857                 if (ret < 0)
1858                         return ret;
1859
1860                 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1861                         /* retrieve bit of collission */
1862                         ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1863                         if (ret < 0)
1864                                 return ret;
1865                         *bit_of_col = boc;
1866                         memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1867                         // uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1868                         DEBUGP("Collision in slot %d bit %d\n",
1869                                 acf->current_slot,boc);
1870                         return -ECOLLISION;
1871                 } else {
1872                         /* no collision-> retrieve uuid */
1873                         DEBUGP("no collision in slot %d\n", acf->current_slot);
1874                         memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1875                         //uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1876                 }
1877         }
1878
1879         return 0;
1880 #endif
1881 }
1882
1883 struct mifare_authcmd {
1884         u_int8_t auth_cmd;
1885         u_int8_t block_address;
1886         u_int32_t serno;        /* lsb 1 2 msb */
1887 } __attribute__ ((packed));
1888
1889
1890 #define RFID_MIFARE_KEY_LEN 6
1891 #define RFID_MIFARE_KEY_CODED_LEN 12
1892
1893 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1894 static int
1895 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1896 {
1897         int i;
1898         u_int8_t ln;
1899         u_int8_t hn;
1900
1901         for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1902                 ln = key6[i] & 0x0f;
1903                 hn = key6[i] >> 4;
1904                 key12[i * 2 + 1] = (~ln << 4) | ln;
1905                 key12[i * 2] = (~hn << 4) | hn;
1906         }
1907         return 0;
1908 }
1909
1910 static int
1911 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1912 {
1913         u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1914         u_int8_t reg;
1915         int ret;
1916
1917         ret = rc632_mifare_transform_key(key, coded_key);
1918         if (ret < 0)
1919                 return ret;
1920
1921         /* Terminate probably running command */
1922         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1923         if (ret < 0)
1924                 return ret;
1925
1926         ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1927         if (ret < 0)
1928                 return ret;
1929
1930         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1931         if (ret < 0)
1932                 return ret;
1933
1934         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1935         if (ret < 0)
1936                 return ret;
1937
1938         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1939         ret = rc632_wait_idle_timer(h);
1940         if (ret < 0)
1941                 return ret;
1942
1943         ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, &reg);
1944         if (ret < 0)
1945                 return ret;
1946
1947         if (reg & RC632_ERR_FLAG_KEY_ERR)
1948                 return -EINVAL;
1949
1950         return 0;
1951 }
1952
1953 static int
1954 rc632_mifare_set_key_ee(struct rfid_asic_handle *h, unsigned int addr)
1955 {
1956         int ret;
1957         u_int8_t cmd_addr[2];
1958         u_int8_t reg;
1959
1960         if (addr > 0xffff - RFID_MIFARE_KEY_CODED_LEN)
1961                 return -EINVAL;
1962
1963         cmd_addr[0] = addr & 0xff;              /* LSB */
1964         cmd_addr[1] = (addr >> 8) & 0xff;       /* MSB */
1965
1966         /* Terminate probably running command */
1967         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1968         if (ret < 0)
1969                 return ret;
1970
1971         /* Write the key address to the FIFO */
1972         ret = rc632_fifo_write(h, 2, cmd_addr, 0x03);
1973         if (ret < 0)
1974                 return ret;
1975
1976         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY_E2);
1977         if (ret < 0)
1978                 return ret;
1979
1980         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1981         if (ret < 0)
1982                 return ret;
1983
1984         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1985         ret = rc632_wait_idle_timer(h);
1986         if (ret < 0)
1987                 return ret;
1988
1989         ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, &reg);
1990         if (ret < 0)
1991                 return ret;
1992
1993         if (reg & RC632_ERR_FLAG_KEY_ERR)
1994                 return -EINVAL;
1995
1996         return 0;
1997 }
1998
1999 static int
2000 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
2001                   u_int8_t block)
2002 {
2003         int ret;
2004         struct mifare_authcmd acmd;
2005         u_int8_t reg;
2006
2007         if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B) {
2008                 DEBUGP("invalid auth command\n");
2009                 return -EINVAL;
2010         }
2011
2012         /* Initialize acmd */
2013         acmd.block_address = block & 0xff;
2014         acmd.auth_cmd = cmd;
2015         //acmd.serno = htonl(serno);
2016         acmd.serno = serno;
2017
2018 #if 1
2019         /* Clear Rx CRC */
2020         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
2021                                 RC632_CR_RX_CRC_ENABLE);
2022 #else
2023         /* Clear Rx CRC, Set Tx CRC and Odd Parity */
2024         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
2025                                 RC632_CR_TX_CRC_ENABLE | RC632_CR_PARITY_ODD |
2026                                 RC632_CR_PARITY_ENABLE);
2027 #endif
2028         if (ret < 0)
2029                 return ret;
2030
2031         /* Send Authent1 Command */
2032         ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
2033         if (ret < 0)
2034                 return ret;
2035
2036         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
2037         if (ret < 0) {
2038                 DEBUGP("error during AUTHENT1");
2039                 return ret;
2040         }
2041
2042         /* Wait until transmitter is idle */
2043         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
2044         if (ret < 0)
2045                 return ret;
2046
2047         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
2048         ret = rc632_wait_idle_timer(h);
2049         if (ret < 0)
2050                 return ret;
2051
2052         ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, &reg);
2053         if (ret < 0)
2054                 return ret;
2055         if (reg & 0x07) {
2056                 DEBUGP("bitframe?");
2057                 return -EIO;
2058         }
2059
2060         /* Clear Tx CRC */
2061         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
2062                                 RC632_CR_TX_CRC_ENABLE);
2063         if (ret < 0)
2064                 return ret;
2065
2066         /* Wait until transmitter is idle */
2067         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
2068         if (ret < 0)
2069                 return ret;
2070
2071         /* Send Authent2 Command */
2072         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
2073         if (ret < 0)
2074                 return ret;
2075
2076         /* Wait until transmitter is idle */
2077         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
2078         ret = rc632_wait_idle_timer(h);
2079         if (ret < 0)
2080                 return ret;
2081
2082         /* Check whether authentication was successful */
2083         ret = rc632_reg_read(h, RC632_REG_CONTROL, &reg);
2084         if (ret < 0)
2085                 return ret;
2086
2087         if (!(reg & RC632_CONTROL_CRYPTO1_ON)) {
2088                 DEBUGP("authentication not successful");
2089                 return -EACCES;
2090         }
2091
2092         return 0;
2093 }
2094
2095 /* transceive regular frame */
2096 static int
2097 rc632_mifare_transceive(struct rfid_asic_handle *handle,
2098                         const u_int8_t *tx_buf, unsigned int tx_len,
2099                         u_int8_t *rx_buf, unsigned int *rx_len,
2100                         u_int64_t timeout, unsigned int flags)
2101 {
2102         int ret;
2103         u_int8_t rxl = *rx_len & 0xff;
2104
2105         DEBUGP("entered\n");
2106         memset(rx_buf, 0, *rx_len);
2107
2108 #if 1
2109         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
2110                                 (RC632_CR_PARITY_ENABLE |
2111                                  RC632_CR_PARITY_ODD |
2112                                  RC632_CR_TX_CRC_ENABLE |
2113                                  RC632_CR_RX_CRC_ENABLE));
2114 #else
2115         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
2116                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
2117 #endif
2118         if (ret < 0)
2119                 return ret;
2120
2121         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
2122         *rx_len = rxl;
2123         if (ret < 0)
2124                 return ret;
2125
2126
2127         return 0;
2128 }
2129
2130
2131 static int
2132 rc632_layer2_init(struct rfid_asic_handle *h, enum rfid_layer2_id l2)
2133 {
2134         switch (l2) {
2135         case RFID_LAYER2_ISO14443A:
2136                 return rc632_iso14443a_init(h);
2137         case RFID_LAYER2_ISO14443B:
2138                 return rc632_iso14443b_init(h);
2139         case RFID_LAYER2_ISO15693:
2140                 return rc632_iso15693_init(h);
2141         case RFID_LAYER2_ICODE1:
2142                 return rc632_iso15693_icode1_init(h);
2143         default:
2144                 return -EINVAL;
2145         }
2146 }
2147
2148 const struct rfid_asic rc632 = {
2149         .name   = "Philips CL RC632",
2150         .fc     = ISO14443_FREQ_CARRIER,
2151         .priv.rc632 = {
2152                 .fn = {
2153                         .power = &rc632_power,
2154                         .rf_power = &rc632_rf_power,
2155                         .transceive = &rc632_iso14443ab_transceive,
2156                         .init = &rc632_layer2_init,
2157                         .iso14443a = {
2158                                 .transceive_sf = &rc632_iso14443a_transceive_sf,
2159                                 .transceive_acf = &rc632_iso14443a_transceive_acf,
2160                                 .set_speed = &rc632_iso14443a_set_speed,
2161                         },
2162                         .iso15693 = {
2163                                 .transceive_ac = &rc632_iso15693_transceive_ac,
2164                         },
2165                         .mifare_classic = {
2166                                 .setkey = &rc632_mifare_set_key,
2167                                 .setkey_ee = &rc632_mifare_set_key_ee,
2168                                 .auth = &rc632_mifare_auth,
2169                         },
2170                 },
2171         },
2172 };