1 /* Generic Philips CL RC632 Routines
3 * (C) Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <sys/types.h>
28 #include <librfid/rfid.h>
29 #include <librfid/rfid_asic.h>
30 #include <librfid/rfid_asic_rc632.h>
31 #include <librfid/rfid_reader_cm5121.h>
32 #include <librfid/rfid_layer2_iso14443a.h>
33 #include <librfid/rfid_protocol_mifare_classic.h>
35 #include "rfid_iso14443_common.h"
37 //#include "rc632_14443a.h"
40 #define RC632_TMO_AUTH1 14000
42 #define ENTER() DEBUGP("entering\n")
43 struct rfid_asic rc632;
45 /* Register and FIFO Access functions */
47 rc632_reg_write(struct rfid_asic_handle *handle,
51 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
55 rc632_reg_read(struct rfid_asic_handle *handle,
59 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
63 rc632_fifo_write(struct rfid_asic_handle *handle,
68 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
73 rc632_fifo_read(struct rfid_asic_handle *handle,
77 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
82 rc632_set_bits(struct rfid_asic_handle *handle,
89 ret = rc632_reg_read(handle, reg, &tmp);
93 /* if bits are already set, no need to set them again */
94 if ((tmp & val) == val)
97 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
100 rc632_set_bit_mask(struct rfid_asic_handle *handle,
101 u_int8_t reg, u_int8_t mask, u_int8_t val)
106 ret = rc632_reg_read(handle, reg, &tmp);
110 /* if bits are already like we want them, abort */
111 if ((tmp & mask) == val)
114 return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
118 rc632_clear_bits(struct rfid_asic_handle *handle,
125 ret = rc632_reg_read(handle, reg, &tmp);
127 DEBUGP("error during reg_read(%p, %d):%d\n",
131 /* if bits are already cleared, no need to clear them again */
132 if ((tmp & val) == 0)
135 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
139 rc632_turn_on_rf(struct rfid_asic_handle *handle)
142 return rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
146 rc632_turn_off_rf(struct rfid_asic_handle *handle)
149 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
153 rc632_power_up(struct rfid_asic_handle *handle)
156 return rc632_clear_bits(handle, RC632_REG_CONTROL,
157 RC632_CONTROL_POWERDOWN);
161 rc632_power_down(struct rfid_asic_handle *handle)
163 return rc632_set_bits(handle, RC632_REG_CONTROL,
164 RC632_CONTROL_POWERDOWN);
167 /* calculate best 8bit prescaler and divisor for given usec timeout */
168 static int best_prescaler(u_int64_t timeout, u_int8_t *prescaler,
171 u_int8_t best_prescaler, best_divisor, i;
172 int64_t smallest_diff;
174 smallest_diff = 0x7fffffffffffffff;
177 for (i = 0; i < 21; i++) {
178 u_int64_t clk, tmp_div, res;
180 clk = 13560000 / (1 << i);
181 tmp_div = (clk * timeout) / 1000000;
184 if ((tmp_div > 0xff) || (tmp_div > clk))
187 res = 1000000 / (clk / tmp_div);
188 diff = res - timeout;
193 if (diff < smallest_diff) {
195 best_divisor = tmp_div;
196 smallest_diff = diff;
200 *prescaler = best_prescaler;
201 *divisor = best_divisor;
203 DEBUGP("timeout %u usec, prescaler = %u, divisor = %u\n",
204 timeout, best_prescaler, best_divisor);
210 rc632_timer_set(struct rfid_asic_handle *handle,
214 u_int8_t prescaler, divisor;
216 ret = best_prescaler(timeout, &prescaler, &divisor);
218 ret = rc632_reg_write(handle, RC632_REG_TIMER_CLOCK,
223 ret = rc632_reg_write(handle, RC632_REG_TIMER_CONTROL,
224 RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
226 /* clear timer irq bit */
227 ret = rc632_set_bits(handle, RC632_REG_INTERRUPT_RQ, RC632_IRQ_TIMER);
229 ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
234 /* Wait until RC632 is idle or TIMER IRQ has happened */
235 static rc632_wait_idle_timer(struct rfid_asic_handle *handle)
241 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &irq);
242 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &irq);
243 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
247 /* FIXME: currently we're lazy: If we actually received
248 * something even after the timer expired, we accept it */
249 if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
251 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
253 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
258 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
265 /* poll every millisecond */
270 /* Stupid RC632 implementations don't evaluate interrupts but poll the
271 * command register for "status idle" */
273 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
277 #define USLEEP_PER_CYCLE 128
280 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
285 /* FIXME: read second time ?? */
291 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
293 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
296 /* Abort after some timeout */
297 if (cycles > timeout*100/USLEEP_PER_CYCLE) {
302 usleep(USLEEP_PER_CYCLE);
309 rc632_transmit(struct rfid_asic_handle *handle,
315 const u_int8_t *cur_buf = buf;
323 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
327 if (cur_buf == buf) {
328 /* only start transmit first time */
329 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
336 if (cur_buf < buf + len) {
337 cur_len = buf - cur_buf;
345 return rc632_wait_idle(handle, timeout);
349 tcl_toggle_pcb(struct rfid_asic_handle *handle)
351 // FIXME: toggle something between 0x0a and 0x0b
356 rc632_transceive(struct rfid_asic_handle *handle,
357 const u_int8_t *tx_buf,
366 const u_int8_t *cur_tx_buf = tx_buf;
368 DEBUGP("timer = %u\n", timer);
375 ret = rc632_timer_set(handle, timer*10);
379 ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00);
380 /* clear all interrupts */
381 ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
384 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
388 if (cur_tx_buf == tx_buf) {
389 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
390 RC632_CMD_TRANSCEIVE);
395 cur_tx_buf += cur_tx_len;
396 if (cur_tx_buf < tx_buf + tx_len) {
398 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
403 cur_tx_len = 64 - fifo_fill;
404 printf("refilling tx fifo with %u bytes\n", cur_tx_len);
408 } while (cur_tx_len);
411 tcl_toggle_pcb(handle);
413 //ret = rc632_wait_idle_timer(handle);
414 ret = rc632_wait_idle(handle, timer);
418 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
422 if (rx_avail > *rx_len)
423 printf("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
424 else if (*rx_len > rx_avail)
430 DEBUGP("rx_len == 0\n");
432 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
433 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
438 return rc632_fifo_read(handle, *rx_len, rx_buf);
439 /* FIXME: discard addidional bytes in FIFO */
443 rc632_read_eeprom(struct rfid_asic_handle *handle)
445 u_int8_t recvbuf[60];
453 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
457 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
463 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
467 // FIXME: do something with eeprom contents
472 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
474 u_int8_t sndbuf[2] = { 0x01, 0x02 };
475 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
478 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
482 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
486 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
490 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
494 usleep(10000); // FIXME: no checking for cmd completion?
496 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
500 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
504 // FIXME: what to do with crc result?
510 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
515 for (i = 0; i <= 0x3f; i++) {
516 ret = rc632_reg_read(handle, i, &buf[i]);
517 // do we want error checks?
524 /* generic FIFO access functions (if no more efficient ones provided by
525 * transport driver) */
530 // FIXME: implementation (not needed for CM 5121)
537 // FIXME: implementation (not neded for CM 5121)
542 rc632_init(struct rfid_asic_handle *ah)
546 /* switch off rf (make sure PICCs are reset at init time) */
547 ret = rc632_power_down(ah);
554 ret = rc632_power_up(ah);
558 /* disable register paging */
559 ret = rc632_reg_write(ah, 0x00, 0x00);
563 /* set some sane default values */
564 ret = rc632_reg_write(ah, 0x11, 0x5b);
569 ret = rc632_turn_on_rf(ah);
577 rc632_fini(struct rfid_asic_handle *ah)
582 ret = rc632_turn_off_rf(ah);
586 ret = rc632_power_down(ah);
593 struct rfid_asic_handle *
594 rc632_open(struct rfid_asic_transport_handle *th)
596 struct rfid_asic_handle *h;
598 h = malloc(sizeof(*h));
601 memset(h, 0, sizeof(*h));
606 /* FIXME: this is only cm5121 specific, since the latency
607 * down to the RC632 FIFO is too long to refill during TX/RX */
608 h->mtu = h->mru = 64;
610 if (rc632_init(h) < 0) {
619 rc632_close(struct rfid_asic_handle *h)
627 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
629 * (C) 2005 by Harald Welte <laforge@gnumonks.org>
634 rc632_iso14443a_init(struct rfid_asic_handle *handle)
638 // FIXME: some fifo work (drain fifo?)
640 /* flush fifo (our way) */
641 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
643 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
644 (RC632_TXCTRL_TX1_RF_EN |
645 RC632_TXCTRL_TX2_RF_EN |
646 RC632_TXCTRL_TX2_INV |
647 RC632_TXCTRL_FORCE_100_ASK |
648 RC632_TXCTRL_MOD_SRC_INT));
652 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
653 CM5121_CW_CONDUCTANCE);
657 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
658 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
659 CM5121_MOD_CONDUCTANCE);
663 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
664 (RC632_CDRCTRL_TXCD_14443A |
665 RC632_CDRCTRL_RATE_106K));
669 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
673 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
677 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
681 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
682 (RC632_RXCTRL1_GAIN_35DB |
683 RC632_RXCTRL1_ISO14443 |
684 RC632_RXCTRL1_SUBCP_8));
688 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
689 (RC632_DECCTRL_MANCHESTER |
690 RC632_DECCTRL_RXFR_14443A));
694 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
695 CM5121_14443A_BITPHASE);
699 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
700 CM5121_14443A_THRESHOLD);
704 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
708 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
709 (RC632_RXCTRL2_DECSRC_INT |
710 RC632_RXCTRL2_CLK_Q));
714 /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
715 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
719 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
720 (RC632_CR_PARITY_ENABLE |
721 RC632_CR_PARITY_ODD));
725 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
729 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
737 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
741 ret = rc632_turn_off_rf(handle);
751 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
753 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
755 struct iso14443a_atqa *atqa)
761 memset(atqa, 0, sizeof(atqa));
765 /* transfer only 7 bits of last byte in frame */
766 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
770 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
771 RC632_CONTROL_CRYPTO1_ON);
776 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
777 (RC632_CR_PARITY_ENABLE |
778 RC632_CR_PARITY_ODD));
780 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
781 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
787 ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
788 (u_int8_t *)atqa, &rx_len,
789 ISO14443A_FDT_ANTICOL_LAST1, 0);
791 DEBUGP("error during rc632_transceive()\n");
795 /* switch back to normal 8bit last byte */
796 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
801 DEBUGP("rx_len(%d) != 2\n", rx_len);
808 /* transceive regular frame */
810 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
811 unsigned int frametype,
812 const u_int8_t *tx_buf, unsigned int tx_len,
813 u_int8_t *rx_buf, unsigned int *rx_len,
814 u_int64_t timeout, unsigned int flags)
818 u_int8_t channel_red;
825 memset(rx_buf, 0, *rx_len);
828 case RFID_14443A_FRAME_REGULAR:
829 case RFID_MIFARE_FRAME:
830 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
831 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
833 case RFID_14443B_FRAME_REGULAR:
834 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
838 case RFID_MIFARE_FRAME:
839 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
846 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
851 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, timeout, 0);
860 /* transceive anti collission bitframe */
862 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
863 struct iso14443a_anticol_cmd *acf,
864 unsigned int *bit_of_col)
868 u_int8_t rx_len = sizeof(rx_buf);
869 u_int8_t rx_align = 0, tx_last_bits, tx_bytes;
872 *bit_of_col = ISO14443A_BITOFCOL_NONE;
873 memset(rx_buf, 0, sizeof(rx_buf));
875 /* disable mifare cryto */
876 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
877 RC632_CONTROL_CRYPTO1_ON);
881 /* disable CRC summing */
883 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
884 (RC632_CR_PARITY_ENABLE |
885 RC632_CR_PARITY_ODD));
887 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
888 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
893 tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
894 tx_bytes = acf->nvb >> 4;
897 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
900 //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
902 /* set RxAlign and TxLastBits*/
903 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
904 (rx_align << 4) | (tx_last_bits));
908 ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes,
909 rx_buf, &rx_len, 0x32, 0);
913 /* bitwise-OR the two halves of the split byte */
914 acf->uid_bits[tx_bytes-2] = (
915 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
918 memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
920 /* determine whether there was a collission */
921 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
925 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
926 /* retrieve bit of collission */
927 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
931 /* bit of collission relative to start of part 1 of
932 * anticollision frame (!) */
933 *bit_of_col = 2*8 + boc;
940 RC632_RATE_106 = 0x00,
941 RC632_RATE_212 = 0x01,
942 RC632_RATE_424 = 0x02,
943 RC632_RATE_848 = 0x03,
947 u_int8_t subc_pulses;
949 u_int8_t rx_threshold;
950 u_int8_t bpsk_dem_ctrl;
958 static struct rx_config rx_configs[] = {
960 .subc_pulses = RC632_RXCTRL1_SUBCP_8,
961 .rx_coding = RC632_DECCTRL_MANCHESTER,
962 .rx_threshold = 0x88,
963 .bpsk_dem_ctrl = 0x00,
966 .subc_pulses = RC632_RXCTRL1_SUBCP_4,
967 .rx_coding = RC632_DECCTRL_BPSK,
968 .rx_threshold = 0x50,
969 .bpsk_dem_ctrl = 0x0c,
972 .subc_pulses = RC632_RXCTRL1_SUBCP_2,
973 .rx_coding = RC632_DECCTRL_BPSK,
974 .rx_threshold = 0x50,
975 .bpsk_dem_ctrl = 0x0c,
978 .subc_pulses = RC632_RXCTRL1_SUBCP_1,
979 .rx_coding = RC632_DECCTRL_BPSK,
980 .rx_threshold = 0x50,
981 .bpsk_dem_ctrl = 0x0c,
985 static struct tx_config tx_configs[] = {
987 .rate = RC632_CDRCTRL_RATE_106K,
991 .rate = RC632_CDRCTRL_RATE_212K,
995 .rate = RC632_CDRCTRL_RATE_424K,
999 .rate = RC632_CDRCTRL_RATE_848K,
1004 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
1014 if (rate > ARRAY_SIZE(rx_configs))
1017 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
1018 RC632_RXCTRL1_SUBCP_MASK,
1019 rx_configs[rate].subc_pulses);
1023 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
1025 rx_configs[rate].rx_coding);
1029 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1030 rx_configs[rate].rx_threshold);
1034 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
1035 rc = rc632_reg_write(handle,
1036 RC632_REG_BPSK_DEM_CONTROL,
1037 rx_configs[rate].bpsk_dem_ctrl);
1043 if (rate > ARRAY_SIZE(tx_configs))
1046 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
1047 RC632_CDRCTRL_RATE_MASK,
1048 tx_configs[rate].rate);
1052 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
1053 tx_configs[rate].mod_width);
1061 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
1065 // FIXME: some FIFO work
1067 /* flush fifo (our way) */
1068 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
1072 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
1073 (RC632_TXCTRL_TX1_RF_EN |
1074 RC632_TXCTRL_TX2_RF_EN |
1075 RC632_TXCTRL_TX2_INV |
1076 RC632_TXCTRL_MOD_SRC_INT));
1080 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
1084 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
1088 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
1089 (RC632_CDRCTRL_TXCD_NRZ |
1090 RC632_CDRCTRL_RATE_14443B));
1094 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
1098 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1102 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
1103 (RC632_TBFRAMING_SOF_11L_3H |
1104 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1105 RC632_TBFRAMING_EOF_11));
1109 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
1110 (RC632_RXCTRL1_GAIN_35DB |
1111 RC632_RXCTRL1_ISO14443 |
1112 RC632_RXCTRL1_SUBCP_8));
1116 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
1117 (RC632_DECCTRL_BPSK |
1118 RC632_DECCTRL_RXFR_14443B));
1122 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
1123 CM5121_14443B_BITPHASE);
1127 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1128 CM5121_14443B_THRESHOLD);
1132 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1133 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1134 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1135 RC632_BPSKD_FILTER_AMP_DETECT |
1136 RC632_BPSKD_NO_RX_EOF |
1137 RC632_BPSKD_NO_RX_EGT));
1141 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1142 (RC632_RXCTRL2_AUTO_PD |
1143 RC632_RXCTRL2_DECSRC_INT));
1147 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1151 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1152 (RC632_CR_TX_CRC_ENABLE |
1153 RC632_CR_RX_CRC_ENABLE |
1158 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1162 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1170 rc632_iso15693_init(struct rfid_asic_handle *h)
1174 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1175 (RC632_TXCTRL_MOD_SRC_INT |
1176 RC632_TXCTRL_TX2_INV |
1177 RC632_TXCTRL_TX2_RF_EN |
1178 RC632_TXCTRL_TX1_RF_EN));
1182 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1186 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x03);
1190 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1191 (RC632_CDRCTRL_RATE_15693 |
1196 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1200 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1204 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1208 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1209 (RC632_RXCTRL1_SUBCP_16 |
1210 RC632_RXCTRL1_ISO15693 |
1211 RC632_RXCTRL1_GAIN_35DB));
1215 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1216 (RC632_DECCTRL_RXFR_15693 |
1217 RC632_DECCTRL_RX_INVERT));
1221 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xe0);
1225 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1229 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1233 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1234 (RC632_RXCTRL2_AUTO_PD |
1235 RC632_RXCTRL2_DECSRC_INT));
1239 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1241 RC632_CR_RX_CRC_ENABLE |
1242 RC632_CR_TX_CRC_ENABLE));
1246 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xff);
1250 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1258 rc632_iso15693_icode_init(struct rfid_asic_handle *h)
1262 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1263 (RC632_TXCTRL_MOD_SRC_INT |
1264 RC632_TXCTRL_TX2_INV |
1265 RC632_TXCTRL_TX2_RF_EN |
1266 RC632_TXCTRL_TX1_RF_EN));
1270 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1274 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x02);
1278 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL, 0x2c);
1282 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1286 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1290 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1294 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1298 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1, 0x8b); /* FIXME */
1302 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL, 0x00);
1306 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0x52);
1310 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0x66);
1314 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1318 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1319 RC632_RXCTRL2_DECSRC_INT);
1323 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1324 (RC632_CR_RX_CRC_ENABLE |
1325 RC632_CR_TX_CRC_ENABLE));
1326 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xfe);
1330 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1338 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1344 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1345 (RC632_TXCTRL_MOD_SRC_INT |
1346 RC632_TXCTRL_TX2_INV |
1347 RC632_TXCTRL_TX2_RF_EN |
1348 RC632_TXCTRL_TX1_RF_EN));
1352 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1356 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1360 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1361 (RC632_CDRCTRL_RATE_15693 |
1362 RC632_CDRCTRL_TXCD_ICODE_STD |
1367 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1371 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1374 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1375 (RC632_RXCTRL1_SUBCP_16|
1376 RC632_RXCTRL1_ISO15693|
1377 RC632_RXCTRL1_GAIN_35DB));
1380 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1381 (RC632_DECCTRL_RX_INVERT|
1382 RC632_DECCTRL_RXFR_15693));
1386 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1390 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1394 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1398 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1399 RC632_RXCTRL2_DECSRC_INT);
1403 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1407 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1411 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1418 struct mifare_authcmd {
1420 u_int8_t block_address;
1421 u_int32_t serno; /* lsb 1 2 msb */
1422 } __attribute__ ((packed));
1425 #define RFID_MIFARE_KEY_LEN 6
1426 #define RFID_MIFARE_KEY_CODED_LEN 12
1428 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1430 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1436 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1437 ln = key6[i] & 0x0f;
1439 key12[i * 2 + 1] = (~ln << 4) | ln;
1440 key12[i * 2] = (~hn << 4) | hn;
1446 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1448 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1452 ret = rc632_mifare_transform_key(key, coded_key);
1456 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1460 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1464 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1468 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1472 if (reg & RC632_ERR_FLAG_KEY_ERR)
1479 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1483 struct mifare_authcmd acmd;
1486 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B)
1489 /* Initialize acmd */
1490 acmd.block_address = block & 0xff;
1491 acmd.auth_cmd = cmd;
1492 //acmd.serno = htonl(serno);
1496 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1497 RC632_CR_RX_CRC_ENABLE);
1501 /* Send Authent1 Command */
1502 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1506 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1510 /* Wait until transmitter is idle */
1511 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1515 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1522 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1523 RC632_CR_TX_CRC_ENABLE);
1527 /* Send Authent2 Command */
1528 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1532 /* Wait until transmitter is idle */
1533 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1537 /* Check whether authentication was successful */
1538 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1542 if (!(reg & RC632_CONTROL_CRYPTO1_ON))
1549 /* transceive regular frame */
1551 rc632_mifare_transceive(struct rfid_asic_handle *handle,
1552 const u_int8_t *tx_buf, unsigned int tx_len,
1553 u_int8_t *rx_buf, unsigned int *rx_len,
1554 u_int64_t timeout, unsigned int flags)
1557 u_int8_t rxl = *rx_len & 0xff;
1559 DEBUGP("entered\n");
1560 memset(rx_buf, 0, *rx_len);
1563 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1564 (RC632_CR_PARITY_ENABLE |
1565 RC632_CR_PARITY_ODD |
1566 RC632_CR_TX_CRC_ENABLE |
1567 RC632_CR_RX_CRC_ENABLE));
1569 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1570 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1575 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1584 struct rfid_asic rc632 = {
1585 .name = "Philips CL RC632",
1586 .fc = ISO14443_FREQ_CARRIER,
1589 .power_up = &rc632_power_up,
1590 .power_down = &rc632_power_down,
1591 .turn_on_rf = &rc632_turn_on_rf,
1592 .turn_off_rf = &rc632_turn_off_rf,
1593 .transceive = &rc632_iso14443ab_transceive,
1595 .init = &rc632_iso14443a_init,
1596 .transceive_sf = &rc632_iso14443a_transceive_sf,
1597 .transceive_acf = &rc632_iso14443a_transceive_acf,
1598 .set_speed = &rc632_iso14443a_set_speed,
1601 .init = &rc632_iso14443b_init,
1604 .init = &rc632_iso15693_init,
1607 .setkey = &rc632_mifare_set_key,
1608 .auth = &rc632_mifare_auth,