1 /* Generic Philips CL RC632 Routines
3 * (C) Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <sys/types.h>
28 #include <librfid/rfid.h>
29 #include <librfid/rfid_asic.h>
30 #include <librfid/rfid_asic_rc632.h>
31 #include <librfid/rfid_reader_cm5121.h>
32 #include <librfid/rfid_layer2_iso14443a.h>
33 #include <librfid/rfid_protocol_mifare_classic.h>
35 #include "rfid_iso14443_common.h"
37 //#include "rc632_14443a.h"
40 #define RC632_TMO_AUTH1 14000
42 #define ENTER() DEBUGP("entering\n")
43 struct rfid_asic rc632;
45 /* Register and FIFO Access functions */
47 rc632_reg_write(struct rfid_asic_handle *handle,
51 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
55 rc632_reg_read(struct rfid_asic_handle *handle,
59 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
63 rc632_fifo_write(struct rfid_asic_handle *handle,
68 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
73 rc632_fifo_read(struct rfid_asic_handle *handle,
77 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
82 rc632_set_bits(struct rfid_asic_handle *handle,
89 ret = rc632_reg_read(handle, reg, &tmp);
93 /* if bits are already set, no need to set them again */
94 if ((tmp & val) == val)
97 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
100 rc632_set_bit_mask(struct rfid_asic_handle *handle,
101 u_int8_t reg, u_int8_t mask, u_int8_t val)
106 ret = rc632_reg_read(handle, reg, &tmp);
110 /* if bits are already like we want them, abort */
111 if ((tmp & mask) == val)
114 return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
118 rc632_clear_bits(struct rfid_asic_handle *handle,
125 ret = rc632_reg_read(handle, reg, &tmp);
127 DEBUGP("error during reg_read(%p, %d):%d\n",
131 /* if bits are already cleared, no need to clear them again */
132 if ((tmp & val) == 0)
135 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
139 rc632_turn_on_rf(struct rfid_asic_handle *handle)
142 return rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
146 rc632_turn_off_rf(struct rfid_asic_handle *handle)
149 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
153 rc632_power_up(struct rfid_asic_handle *handle)
156 return rc632_clear_bits(handle, RC632_REG_CONTROL,
157 RC632_CONTROL_POWERDOWN);
161 rc632_power_down(struct rfid_asic_handle *handle)
163 return rc632_set_bits(handle, RC632_REG_CONTROL,
164 RC632_CONTROL_POWERDOWN);
167 /* Stupid RC623 implementations don't evaluate interrupts but poll the
168 * command register for "status idle" */
170 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
174 #define USLEEP_PER_CYCLE 128
177 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
182 /* FIXME: read second time ?? */
188 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
190 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
193 /* Abort after some timeout */
194 if (cycles > timeout*100/USLEEP_PER_CYCLE) {
199 usleep(USLEEP_PER_CYCLE);
206 rc632_transmit(struct rfid_asic_handle *handle,
212 const u_int8_t *cur_buf = buf;
220 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
224 if (cur_buf == buf) {
225 /* only start transmit first time */
226 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
233 if (cur_buf < buf + len) {
234 cur_len = buf - cur_buf;
242 return rc632_wait_idle(handle, timeout);
246 tcl_toggle_pcb(struct rfid_asic_handle *handle)
248 // FIXME: toggle something between 0x0a and 0x0b
253 rc632_transceive(struct rfid_asic_handle *handle,
254 const u_int8_t *tx_buf,
262 const u_int8_t *cur_tx_buf = tx_buf;
270 ret = rc632_fifo_write(handle, tx_len, tx_buf, 0x03);
274 if (cur_tx_buf == tx_buf) {
275 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
276 RC632_CMD_TRANSCEIVE);
281 cur_tx_buf += cur_tx_len;
282 if (cur_tx_buf < tx_buf + tx_len) {
284 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
288 cur_tx_len = 64 - fifo_fill;
289 printf("refilling tx fifo with %u bytes\n", cur_tx_len);
293 } while (cur_tx_len);
296 tcl_toggle_pcb(handle);
298 ret = rc632_wait_idle(handle, timer);
302 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, rx_len);
309 DEBUGP("rx_len == 0\n");
311 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
312 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
317 return rc632_fifo_read(handle, *rx_len, rx_buf);
321 rc632_read_eeprom(struct rfid_asic_handle *handle)
323 u_int8_t recvbuf[60];
331 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
335 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
341 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
345 // FIXME: do something with eeprom contents
350 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
352 u_int8_t sndbuf[2] = { 0x01, 0x02 };
353 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
356 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
360 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
364 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
368 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
372 usleep(10000); // FIXME: no checking for cmd completion?
374 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
378 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
382 // FIXME: what to do with crc result?
388 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
393 for (i = 0; i <= 0x3f; i++) {
394 ret = rc632_reg_read(handle, i, &buf[i]);
395 // do we want error checks?
402 /* generic FIFO access functions (if no more efficient ones provided by
403 * transport driver) */
408 // FIXME: implementation (not needed for CM 5121)
415 // FIXME: implementation (not neded for CM 5121)
420 rc632_init(struct rfid_asic_handle *ah)
424 /* switch off rf (make sure PICCs are reset at init time) */
425 ret = rc632_power_down(ah);
432 ret = rc632_power_up(ah);
436 /* disable register paging */
437 ret = rc632_reg_write(ah, 0x00, 0x00);
441 /* set some sane default values */
442 ret = rc632_reg_write(ah, 0x11, 0x5b);
447 ret = rc632_turn_on_rf(ah);
455 rc632_fini(struct rfid_asic_handle *ah)
460 ret = rc632_turn_off_rf(ah);
464 ret = rc632_power_down(ah);
471 struct rfid_asic_handle *
472 rc632_open(struct rfid_asic_transport_handle *th)
474 struct rfid_asic_handle *h;
476 h = malloc(sizeof(*h));
479 memset(h, 0, sizeof(*h));
484 h->mtu = h->mru = 40; /* FIXME */
486 if (rc632_init(h) < 0) {
495 rc632_close(struct rfid_asic_handle *h)
503 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
505 * (C) 2005 by Harald Welte <laforge@gnumonks.org>
510 rc632_iso14443a_init(struct rfid_asic_handle *handle)
514 // FIXME: some fifo work (drain fifo?)
516 /* flush fifo (our way) */
517 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
519 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
520 (RC632_TXCTRL_TX1_RF_EN |
521 RC632_TXCTRL_TX2_RF_EN |
522 RC632_TXCTRL_TX2_INV |
523 RC632_TXCTRL_FORCE_100_ASK |
524 RC632_TXCTRL_MOD_SRC_INT));
528 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
529 CM5121_CW_CONDUCTANCE);
533 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
534 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
535 CM5121_MOD_CONDUCTANCE);
539 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
540 (RC632_CDRCTRL_TXCD_14443A |
541 RC632_CDRCTRL_RATE_106K));
545 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
549 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
553 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
557 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
558 (RC632_RXCTRL1_GAIN_35DB |
559 RC632_RXCTRL1_ISO14443 |
560 RC632_RXCTRL1_SUBCP_8));
564 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
565 (RC632_DECCTRL_MANCHESTER |
566 RC632_DECCTRL_RXFR_14443A));
570 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
571 CM5121_14443A_BITPHASE);
575 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
576 CM5121_14443A_THRESHOLD);
580 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
584 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
585 (RC632_RXCTRL2_DECSRC_INT |
586 RC632_RXCTRL2_CLK_Q));
590 /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
591 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
595 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
596 (RC632_CR_PARITY_ENABLE |
597 RC632_CR_PARITY_ODD));
601 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
605 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
613 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
617 ret = rc632_turn_off_rf(handle);
627 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
629 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
631 struct iso14443a_atqa *atqa)
637 memset(atqa, 0, sizeof(atqa));
641 /* transfer only 7 bits of last byte in frame */
642 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
646 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
647 RC632_CONTROL_CRYPTO1_ON);
652 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
653 (RC632_CR_PARITY_ENABLE |
654 RC632_CR_PARITY_ODD));
656 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
657 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
663 ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
664 (u_int8_t *)atqa, &rx_len, 0x32, 0);
666 DEBUGP("error during rc632_transceive()\n");
670 /* switch back to normal 8bit last byte */
671 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
676 DEBUGP("rx_len(%d) != 2\n", rx_len);
683 /* transceive regular frame */
685 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
686 unsigned int frametype,
687 const u_int8_t *tx_buf, unsigned int tx_len,
688 u_int8_t *rx_buf, unsigned int *rx_len,
689 u_int64_t timeout, unsigned int flags)
692 u_int8_t rxl = *rx_len & 0xff;
693 u_int8_t channel_red;
695 memset(rx_buf, 0, *rx_len);
698 case RFID_14443A_FRAME_REGULAR:
699 case RFID_MIFARE_FRAME:
700 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
701 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
703 case RFID_14443B_FRAME_REGULAR:
704 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
708 case RFID_MIFARE_FRAME:
709 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
716 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
721 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
730 /* transceive anti collission bitframe */
732 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
733 struct iso14443a_anticol_cmd *acf,
734 unsigned int *bit_of_col)
738 u_int8_t rx_len = sizeof(rx_buf);
739 u_int8_t rx_align = 0, tx_last_bits, tx_bytes;
742 *bit_of_col = ISO14443A_BITOFCOL_NONE;
743 memset(rx_buf, 0, sizeof(rx_buf));
745 /* disable mifare cryto */
746 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
747 RC632_CONTROL_CRYPTO1_ON);
751 /* disable CRC summing */
753 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
754 (RC632_CR_PARITY_ENABLE |
755 RC632_CR_PARITY_ODD));
757 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
758 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
763 tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
764 tx_bytes = acf->nvb >> 4;
767 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
770 //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
772 /* set RxAlign and TxLastBits*/
773 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
774 (rx_align << 4) | (tx_last_bits));
778 ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes,
779 rx_buf, &rx_len, 0x32, 0);
783 /* bitwise-OR the two halves of the split byte */
784 acf->uid_bits[tx_bytes-2] = (
785 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
788 memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
790 /* determine whether there was a collission */
791 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
795 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
796 /* retrieve bit of collission */
797 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
801 /* bit of collission relative to start of part 1 of
802 * anticollision frame (!) */
803 *bit_of_col = 2*8 + boc;
810 RC632_RATE_106 = 0x00,
811 RC632_RATE_212 = 0x01,
812 RC632_RATE_424 = 0x02,
813 RC632_RATE_848 = 0x03,
817 u_int8_t subc_pulses;
819 u_int8_t rx_threshold;
820 u_int8_t bpsk_dem_ctrl;
828 static struct rx_config rx_configs[] = {
830 .subc_pulses = RC632_RXCTRL1_SUBCP_8,
831 .rx_coding = RC632_DECCTRL_MANCHESTER,
832 .rx_threshold = 0x88,
833 .bpsk_dem_ctrl = 0x00,
836 .subc_pulses = RC632_RXCTRL1_SUBCP_4,
837 .rx_coding = RC632_DECCTRL_BPSK,
838 .rx_threshold = 0x50,
839 .bpsk_dem_ctrl = 0x0c,
842 .subc_pulses = RC632_RXCTRL1_SUBCP_2,
843 .rx_coding = RC632_DECCTRL_BPSK,
844 .rx_threshold = 0x50,
845 .bpsk_dem_ctrl = 0x0c,
848 .subc_pulses = RC632_RXCTRL1_SUBCP_1,
849 .rx_coding = RC632_DECCTRL_BPSK,
850 .rx_threshold = 0x50,
851 .bpsk_dem_ctrl = 0x0c,
855 static struct tx_config tx_configs[] = {
857 .rate = RC632_CDRCTRL_RATE_106K,
861 .rate = RC632_CDRCTRL_RATE_212K,
865 .rate = RC632_CDRCTRL_RATE_424K,
869 .rate = RC632_CDRCTRL_RATE_848K,
874 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
884 if (rate > ARRAY_SIZE(rx_configs))
887 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
888 RC632_RXCTRL1_SUBCP_MASK,
889 rx_configs[rate].subc_pulses);
893 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
895 rx_configs[rate].rx_coding);
899 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
900 rx_configs[rate].rx_threshold);
904 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
905 rc = rc632_reg_write(handle,
906 RC632_REG_BPSK_DEM_CONTROL,
907 rx_configs[rate].bpsk_dem_ctrl);
913 if (rate > ARRAY_SIZE(tx_configs))
916 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
917 RC632_CDRCTRL_RATE_MASK,
918 tx_configs[rate].rate);
922 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
923 tx_configs[rate].mod_width);
931 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
935 // FIXME: some FIFO work
937 /* flush fifo (our way) */
938 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
942 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
943 (RC632_TXCTRL_TX1_RF_EN |
944 RC632_TXCTRL_TX2_RF_EN |
945 RC632_TXCTRL_TX2_INV |
946 RC632_TXCTRL_MOD_SRC_INT));
950 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
954 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
958 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
959 (RC632_CDRCTRL_TXCD_NRZ |
960 RC632_CDRCTRL_RATE_14443B));
964 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
968 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
972 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
973 (RC632_TBFRAMING_SOF_11L_3H |
974 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
975 RC632_TBFRAMING_EOF_11));
979 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
980 (RC632_RXCTRL1_GAIN_35DB |
981 RC632_RXCTRL1_ISO14443 |
982 RC632_RXCTRL1_SUBCP_8));
986 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
987 (RC632_DECCTRL_BPSK |
988 RC632_DECCTRL_RXFR_14443B));
992 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
993 CM5121_14443B_BITPHASE);
997 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
998 CM5121_14443B_THRESHOLD);
1002 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1003 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1004 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1005 RC632_BPSKD_FILTER_AMP_DETECT |
1006 RC632_BPSKD_NO_RX_EOF |
1007 RC632_BPSKD_NO_RX_EGT));
1011 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1012 (RC632_RXCTRL2_AUTO_PD |
1013 RC632_RXCTRL2_DECSRC_INT));
1017 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1021 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1022 (RC632_CR_TX_CRC_ENABLE |
1023 RC632_CR_RX_CRC_ENABLE |
1028 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1032 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1040 rc632_iso15693_init(struct rfid_asic_handle *h)
1044 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1045 (RC632_TXCTRL_MOD_SRC_INT |
1046 RC632_TXCTRL_TX2_INV |
1047 RC632_TXCTRL_TX2_RF_EN |
1048 RC632_TXCTRL_TX1_RF_EN));
1052 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1056 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x03);
1060 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1061 (RC632_CDRCTRL_RATE_15693 |
1066 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1070 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1074 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1078 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1079 (RC632_RXCTRL1_SUBCP_16 |
1080 RC632_RXCTRL1_ISO15693 |
1081 RC632_RXCTRL1_GAIN_35DB));
1085 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1086 (RC632_DECCTRL_RXFR_15693 |
1087 RC632_DECCTRL_RX_INVERT));
1091 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xe0);
1095 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1099 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1103 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1104 (RC632_RXCTRL2_AUTO_PD |
1105 RC632_RXCTRL2_DECSRC_INT));
1109 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1111 RC632_CR_RX_CRC_ENABLE |
1112 RC632_CR_TX_CRC_ENABLE));
1116 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xff);
1120 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1128 rc632_iso15693_icode_init(struct rfid_asic_handle *h)
1132 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1133 (RC632_TXCTRL_MOD_SRC_INT |
1134 RC632_TXCTRL_TX2_INV |
1135 RC632_TXCTRL_TX2_RF_EN |
1136 RC632_TXCTRL_TX1_RF_EN));
1140 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1144 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x02);
1148 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL, 0x2c);
1152 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1156 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1160 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1164 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1168 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1, 0x8b); /* FIXME */
1172 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL, 0x00);
1176 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0x52);
1180 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0x66);
1184 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1188 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1189 RC632_RXCTRL2_DECSRC_INT);
1193 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1194 (RC632_CR_RX_CRC_ENABLE |
1195 RC632_CR_TX_CRC_ENABLE));
1196 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xfe);
1200 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1208 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1214 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1215 (RC632_TXCTRL_MOD_SRC_INT |
1216 RC632_TXCTRL_TX2_INV |
1217 RC632_TXCTRL_TX2_RF_EN |
1218 RC632_TXCTRL_TX1_RF_EN));
1222 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1226 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1230 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1231 (RC632_CDRCTRL_RATE_15693 |
1232 RC632_CDRCTRL_TXCD_ICODE_STD |
1237 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1241 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1244 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1245 (RC632_RXCTRL1_SUBCP_16|
1246 RC632_RXCTRL1_ISO15693|
1247 RC632_RXCTRL1_GAIN_35DB));
1250 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1251 (RC632_DECCTRL_RX_INVERT|
1252 RC632_DECCTRL_RXFR_15693));
1256 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1260 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1264 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1268 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1269 RC632_RXCTRL2_DECSRC_INT);
1273 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1277 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1281 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1288 struct mifare_authcmd {
1290 u_int8_t block_address;
1291 u_int32_t serno; /* lsb 1 2 msb */
1292 } __attribute__ ((packed));
1295 #define RFID_MIFARE_KEY_LEN 6
1296 #define RFID_MIFARE_KEY_CODED_LEN 12
1298 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1300 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1306 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1307 ln = key6[i] & 0x0f;
1309 key12[i * 2 + 1] = (~ln << 4) | ln;
1310 key12[i * 2] = (~hn << 4) | hn;
1316 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1318 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1322 ret = rc632_mifare_transform_key(key, coded_key);
1326 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1330 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1334 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1338 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1342 if (reg & RC632_ERR_FLAG_KEY_ERR)
1349 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1353 struct mifare_authcmd acmd;
1356 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B)
1359 /* Initialize acmd */
1360 acmd.block_address = block & 0xff;
1361 acmd.auth_cmd = cmd;
1362 //acmd.serno = htonl(serno);
1366 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1367 RC632_CR_RX_CRC_ENABLE);
1371 /* Send Authent1 Command */
1372 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1376 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1380 /* Wait until transmitter is idle */
1381 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1385 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1392 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1393 RC632_CR_TX_CRC_ENABLE);
1397 /* Send Authent2 Command */
1398 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1402 /* Wait until transmitter is idle */
1403 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1407 /* Check whether authentication was successful */
1408 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1412 if (!(reg & RC632_CONTROL_CRYPTO1_ON))
1419 /* transceive regular frame */
1421 rc632_mifare_transceive(struct rfid_asic_handle *handle,
1422 const u_int8_t *tx_buf, unsigned int tx_len,
1423 u_int8_t *rx_buf, unsigned int *rx_len,
1424 u_int64_t timeout, unsigned int flags)
1427 u_int8_t rxl = *rx_len & 0xff;
1429 DEBUGP("entered\n");
1430 memset(rx_buf, 0, *rx_len);
1433 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1434 (RC632_CR_PARITY_ENABLE |
1435 RC632_CR_PARITY_ODD |
1436 RC632_CR_TX_CRC_ENABLE |
1437 RC632_CR_RX_CRC_ENABLE));
1439 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1440 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1445 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1454 struct rfid_asic rc632 = {
1455 .name = "Philips CL RC632",
1456 .fc = ISO14443_FREQ_CARRIER,
1459 .power_up = &rc632_power_up,
1460 .power_down = &rc632_power_down,
1461 .turn_on_rf = &rc632_turn_on_rf,
1462 .turn_off_rf = &rc632_turn_off_rf,
1463 .transceive = &rc632_iso14443ab_transceive,
1465 .init = &rc632_iso14443a_init,
1466 .transceive_sf = &rc632_iso14443a_transceive_sf,
1467 .transceive_acf = &rc632_iso14443a_transceive_acf,
1468 .set_speed = &rc632_iso14443a_set_speed,
1471 .init = &rc632_iso14443b_init,
1474 .init = &rc632_iso15693_init,
1477 .setkey = &rc632_mifare_set_key,
1478 .auth = &rc632_mifare_auth,