1 /* Generic Philips CL RC632 Routines
3 * (C) Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <sys/types.h>
28 #include <librfid/rfid.h>
29 #include <librfid/rfid_asic.h>
30 #include <librfid/rfid_asic_rc632.h>
31 #include <librfid/rfid_reader_cm5121.h>
32 #include <librfid/rfid_layer2_iso14443a.h>
33 #include <librfid/rfid_protocol_mifare_classic.h>
35 #include "rfid_iso14443_common.h"
37 //#include "rc632_14443a.h"
40 #define RC632_TMO_AUTH1 14000
42 #define ENTER() DEBUGP("entering\n")
43 struct rfid_asic rc632;
45 /* Register and FIFO Access functions */
47 rc632_reg_write(struct rfid_asic_handle *handle,
51 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
55 rc632_reg_read(struct rfid_asic_handle *handle,
59 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
63 rc632_fifo_write(struct rfid_asic_handle *handle,
68 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
73 rc632_fifo_read(struct rfid_asic_handle *handle,
77 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
82 rc632_set_bits(struct rfid_asic_handle *handle,
89 ret = rc632_reg_read(handle, reg, &tmp);
93 /* if bits are already set, no need to set them again */
94 if ((tmp & val) == val)
97 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
100 rc632_set_bit_mask(struct rfid_asic_handle *handle,
101 u_int8_t reg, u_int8_t mask, u_int8_t val)
106 ret = rc632_reg_read(handle, reg, &tmp);
110 /* if bits are already like we want them, abort */
111 if ((tmp & mask) == val)
114 return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
118 rc632_clear_bits(struct rfid_asic_handle *handle,
125 ret = rc632_reg_read(handle, reg, &tmp);
127 DEBUGP("error during reg_read(%p, %d):%d\n",
131 /* if bits are already cleared, no need to clear them again */
132 if ((tmp & val) == 0)
135 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
139 rc632_turn_on_rf(struct rfid_asic_handle *handle)
142 return rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
146 rc632_turn_off_rf(struct rfid_asic_handle *handle)
149 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
153 rc632_power_up(struct rfid_asic_handle *handle)
156 return rc632_clear_bits(handle, RC632_REG_CONTROL,
157 RC632_CONTROL_POWERDOWN);
161 rc632_power_down(struct rfid_asic_handle *handle)
163 return rc632_set_bits(handle, RC632_REG_CONTROL,
164 RC632_CONTROL_POWERDOWN);
167 /* Stupid RC623 implementations don't evaluate interrupts but poll the
168 * command register for "status idle" */
170 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
174 #define USLEEP_PER_CYCLE 128
177 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
182 /* FIXME: read second time ?? */
188 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
190 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
193 /* Abort after some timeout */
194 if (cycles > timeout*10/USLEEP_PER_CYCLE) {
199 usleep(USLEEP_PER_CYCLE);
206 rc632_transmit(struct rfid_asic_handle *handle,
213 ret = rc632_fifo_write(handle, len, buf, 0x03);
217 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_TRANSMIT);
221 return rc632_wait_idle(handle, timeout);
225 tcl_toggle_pcb(struct rfid_asic_handle *handle)
227 // FIXME: toggle something between 0x0a and 0x0b
232 rc632_transcieve(struct rfid_asic_handle *handle,
233 const u_int8_t *tx_buf,
242 ret = rc632_fifo_write(handle, tx_len, tx_buf, 0x03);
246 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_TRANSCIEVE);
251 tcl_toggle_pcb(handle);
253 ret = rc632_wait_idle(handle, timer);
257 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, rx_len);
264 DEBUGP("rx_len == 0\n");
266 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
267 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
272 return rc632_fifo_read(handle, *rx_len, rx_buf);
276 rc632_read_eeprom(struct rfid_asic_handle *handle)
278 u_int8_t recvbuf[60];
286 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
290 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
296 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
300 // FIXME: do something with eeprom contents
305 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
307 u_int8_t sndbuf[2] = { 0x01, 0x02 };
308 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
311 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
315 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
319 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
323 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
327 usleep(10000); // FIXME: no checking for cmd completion?
329 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
333 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
337 // FIXME: what to do with crc result?
343 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
348 for (i = 0; i <= 0x3f; i++) {
349 ret = rc632_reg_read(handle, i, &buf[i]);
350 // do we want error checks?
357 /* generic FIFO access functions (if no more efficient ones provided by
358 * transport driver) */
363 // FIXME: implementation (not needed for CM 5121)
370 // FIXME: implementation (not neded for CM 5121)
375 rc632_init(struct rfid_asic_handle *ah)
379 /* switch off rf (make sure PICCs are reset at init time) */
380 ret = rc632_power_down(ah);
387 ret = rc632_power_up(ah);
391 /* disable register paging */
392 ret = rc632_reg_write(ah, 0x00, 0x00);
396 /* set some sane default values */
397 ret = rc632_reg_write(ah, 0x11, 0x5b);
402 ret = rc632_turn_on_rf(ah);
410 rc632_fini(struct rfid_asic_handle *ah)
415 ret = rc632_turn_off_rf(ah);
419 ret = rc632_power_down(ah);
426 struct rfid_asic_handle *
427 rc632_open(struct rfid_asic_transport_handle *th)
429 struct rfid_asic_handle *h;
431 h = malloc(sizeof(*h));
434 memset(h, 0, sizeof(*h));
439 h->mtu = h->mru = 40; /* FIXME */
441 if (rc632_init(h) < 0) {
450 rc632_close(struct rfid_asic_handle *h)
458 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
460 * (C) 2005 by Harald Welte <laforge@gnumonks.org>
465 rc632_iso14443a_init(struct rfid_asic_handle *handle)
469 // FIXME: some fifo work (drain fifo?)
471 /* flush fifo (our way) */
472 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
474 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
475 (RC632_TXCTRL_TX1_RF_EN |
476 RC632_TXCTRL_TX2_RF_EN |
477 RC632_TXCTRL_TX2_INV |
478 RC632_TXCTRL_FORCE_100_ASK |
479 RC632_TXCTRL_MOD_SRC_INT));
483 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
484 CM5121_CW_CONDUCTANCE);
488 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
489 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
490 CM5121_MOD_CONDUCTANCE);
494 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
495 (RC632_CDRCTRL_TXCD_14443A |
496 RC632_CDRCTRL_RATE_106K));
500 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
504 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
508 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
512 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
513 (RC632_RXCTRL1_GAIN_35DB |
514 RC632_RXCTRL1_ISO14443 |
515 RC632_RXCTRL1_SUBCP_8));
519 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
520 (RC632_DECCTRL_MANCHESTER |
521 RC632_DECCTRL_RXFR_14443A));
525 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
526 CM5121_14443A_BITPHASE);
530 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
531 CM5121_14443A_THRESHOLD);
535 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
539 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
540 (RC632_RXCTRL2_DECSRC_INT |
541 RC632_RXCTRL2_CLK_Q));
545 /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
546 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
550 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
551 (RC632_CR_PARITY_ENABLE |
552 RC632_CR_PARITY_ODD));
556 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
560 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
568 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
572 ret = rc632_turn_off_rf(handle);
582 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
584 rc632_iso14443a_transcieve_sf(struct rfid_asic_handle *handle,
586 struct iso14443a_atqa *atqa)
592 memset(atqa, 0, sizeof(atqa));
596 /* transfer only 7 bits of last byte in frame */
597 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
601 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
602 RC632_CONTROL_CRYPTO1_ON);
607 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
608 (RC632_CR_PARITY_ENABLE |
609 RC632_CR_PARITY_ODD));
611 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
612 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
618 ret = rc632_transcieve(handle, tx_buf, sizeof(tx_buf),
619 (u_int8_t *)atqa, &rx_len, 0x32, 0);
621 DEBUGP("error during rc632_transcieve()\n");
625 /* switch back to normal 8bit last byte */
626 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
631 DEBUGP("rx_len(%d) != 2\n", rx_len);
638 /* transcieve regular frame */
640 rc632_iso14443ab_transcieve(struct rfid_asic_handle *handle,
641 unsigned int frametype,
642 const u_int8_t *tx_buf, unsigned int tx_len,
643 u_int8_t *rx_buf, unsigned int *rx_len,
644 u_int64_t timeout, unsigned int flags)
647 u_int8_t rxl = *rx_len & 0xff;
648 u_int8_t channel_red;
650 memset(rx_buf, 0, *rx_len);
653 case RFID_14443A_FRAME_REGULAR:
654 case RFID_MIFARE_FRAME:
655 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
656 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
658 case RFID_14443B_FRAME_REGULAR:
659 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
663 case RFID_MIFARE_FRAME:
664 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
671 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
676 ret = rc632_transcieve(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
685 /* transcieve anti collission bitframe */
687 rc632_iso14443a_transcieve_acf(struct rfid_asic_handle *handle,
688 struct iso14443a_anticol_cmd *acf,
689 unsigned int *bit_of_col)
693 u_int8_t rx_len = sizeof(rx_buf);
694 u_int8_t rx_align = 0, tx_last_bits, tx_bytes;
697 *bit_of_col = ISO14443A_BITOFCOL_NONE;
698 memset(rx_buf, 0, sizeof(rx_buf));
700 /* disable mifare cryto */
701 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
702 RC632_CONTROL_CRYPTO1_ON);
706 /* disable CRC summing */
708 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
709 (RC632_CR_PARITY_ENABLE |
710 RC632_CR_PARITY_ODD));
712 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
713 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
718 tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
719 tx_bytes = acf->nvb >> 4;
722 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
725 //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
727 /* set RxAlign and TxLastBits*/
728 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
729 (rx_align << 4) | (tx_last_bits));
733 ret = rc632_transcieve(handle, (u_int8_t *)acf, tx_bytes,
734 rx_buf, &rx_len, 0x32, 0);
738 /* bitwise-OR the two halves of the split byte */
739 acf->uid_bits[tx_bytes-2] = (
740 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
743 memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
745 /* determine whether there was a collission */
746 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
750 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
751 /* retrieve bit of collission */
752 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
756 /* bit of collission relative to start of part 1 of
757 * anticollision frame (!) */
758 *bit_of_col = 2*8 + boc;
765 RC632_RATE_106 = 0x00,
766 RC632_RATE_212 = 0x01,
767 RC632_RATE_424 = 0x02,
768 RC632_RATE_848 = 0x03,
772 u_int8_t subc_pulses;
774 u_int8_t rx_threshold;
775 u_int8_t bpsk_dem_ctrl;
783 static struct rx_config rx_configs[] = {
785 .subc_pulses = RC632_RXCTRL1_SUBCP_8,
786 .rx_coding = RC632_DECCTRL_MANCHESTER,
787 .rx_threshold = 0x88,
788 .bpsk_dem_ctrl = 0x00,
791 .subc_pulses = RC632_RXCTRL1_SUBCP_4,
792 .rx_coding = RC632_DECCTRL_BPSK,
793 .rx_threshold = 0x50,
794 .bpsk_dem_ctrl = 0x0c,
797 .subc_pulses = RC632_RXCTRL1_SUBCP_2,
798 .rx_coding = RC632_DECCTRL_BPSK,
799 .rx_threshold = 0x50,
800 .bpsk_dem_ctrl = 0x0c,
803 .subc_pulses = RC632_RXCTRL1_SUBCP_1,
804 .rx_coding = RC632_DECCTRL_BPSK,
805 .rx_threshold = 0x50,
806 .bpsk_dem_ctrl = 0x0c,
810 static struct tx_config tx_configs[] = {
812 .rate = RC632_CDRCTRL_RATE_106K,
816 .rate = RC632_CDRCTRL_RATE_212K,
820 .rate = RC632_CDRCTRL_RATE_424K,
824 .rate = RC632_CDRCTRL_RATE_848K,
829 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
839 if (rate > ARRAY_SIZE(rx_configs))
842 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
843 RC632_RXCTRL1_SUBCP_MASK,
844 rx_configs[rate].subc_pulses);
848 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
850 rx_configs[rate].rx_coding);
854 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
855 rx_configs[rate].rx_threshold);
859 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
860 rc = rc632_reg_write(handle,
861 RC632_REG_BPSK_DEM_CONTROL,
862 rx_configs[rate].bpsk_dem_ctrl);
868 if (rate > ARRAY_SIZE(tx_configs))
871 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
872 RC632_CDRCTRL_RATE_MASK,
873 tx_configs[rate].rate);
877 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
878 tx_configs[rate].mod_width);
886 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
890 // FIXME: some FIFO work
892 /* flush fifo (our way) */
893 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
897 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
898 (RC632_TXCTRL_TX1_RF_EN |
899 RC632_TXCTRL_TX2_RF_EN |
900 RC632_TXCTRL_TX2_INV |
901 RC632_TXCTRL_MOD_SRC_INT));
905 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
909 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
913 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
914 (RC632_CDRCTRL_TXCD_NRZ |
915 RC632_CDRCTRL_RATE_14443B));
919 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
923 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
927 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
928 (RC632_TBFRAMING_SOF_11L_3H |
929 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
930 RC632_TBFRAMING_EOF_11));
934 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
935 (RC632_RXCTRL1_GAIN_35DB |
936 RC632_RXCTRL1_ISO14443 |
937 RC632_RXCTRL1_SUBCP_8));
941 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
942 (RC632_DECCTRL_BPSK |
943 RC632_DECCTRL_RXFR_14443B));
947 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
948 CM5121_14443B_BITPHASE);
952 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
953 CM5121_14443B_THRESHOLD);
957 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
958 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
959 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
960 RC632_BPSKD_FILTER_AMP_DETECT |
961 RC632_BPSKD_NO_RX_EOF |
962 RC632_BPSKD_NO_RX_EGT));
966 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
967 (RC632_RXCTRL2_AUTO_PD |
968 RC632_RXCTRL2_DECSRC_INT));
972 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
976 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
977 (RC632_CR_TX_CRC_ENABLE |
978 RC632_CR_RX_CRC_ENABLE |
983 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
987 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
995 rc632_iso15693_init(struct rfid_asic_handle *h)
999 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1000 (RC632_TXCTRL_MOD_SRC_INT |
1001 RC632_TXCTRL_TX2_INV |
1002 RC632_TXCTRL_TX2_RF_EN |
1003 RC632_TXCTRL_TX1_RF_EN));
1007 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1011 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x03);
1015 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1016 (RC632_CDRCTRL_RATE_15693 |
1021 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1025 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1029 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1033 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1034 (RC632_RXCTRL1_SUBCP_16 |
1035 RC632_RXCTRL1_ISO15693 |
1036 RC632_RXCTRL1_GAIN_35DB));
1040 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1041 (RC632_DECCTRL_RXFR_15693 |
1042 RC632_DECCTRL_RX_INVERT));
1046 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xe0);
1050 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1054 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1058 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1059 (RC632_RXCTRL2_AUTO_PD |
1060 RC632_RXCTRL2_DECSRC_INT));
1064 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1066 RC632_CR_RX_CRC_ENABLE |
1067 RC632_CR_TX_CRC_ENABLE));
1071 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xff);
1075 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1083 rc632_iso15693_icode_init(struct rfid_asic_handle *h)
1087 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1088 (RC632_TXCTRL_MOD_SRC_INT |
1089 RC632_TXCTRL_TX2_INV |
1090 RC632_TXCTRL_TX2_RF_EN |
1091 RC632_TXCTRL_TX1_RF_EN));
1095 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1099 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x02);
1103 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL, 0x2c);
1107 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1111 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1115 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1119 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1123 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1, 0x8b); /* FIXME */
1127 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL, 0x00);
1131 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0x52);
1135 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0x66);
1139 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1143 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1144 RC632_RXCTRL2_DECSRC_INT);
1148 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1149 (RC632_CR_RX_CRC_ENABLE |
1150 RC632_CR_TX_CRC_ENABLE));
1151 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xfe);
1155 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1163 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1169 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1170 (RC632_TXCTRL_MOD_SRC_INT |
1171 RC632_TXCTRL_TX2_INV |
1172 RC632_TXCTRL_TX2_RF_EN |
1173 RC632_TXCTRL_TX1_RF_EN));
1177 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1181 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1185 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1186 (RC632_CDRCTRL_RATE_15693 |
1187 RC632_CDRCTRL_TXCD_ICODE_STD |
1192 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1196 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1199 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1200 (RC632_RXCTRL1_SUBCP_16|
1201 RC632_RXCTRL1_ISO15693|
1202 RC632_RXCTRL1_GAIN_35DB));
1205 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1206 (RC632_DECCTRL_RX_INVERT|
1207 RC632_DECCTRL_RXFR_15693));
1211 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1215 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1219 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1223 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1224 RC632_RXCTRL2_DECSRC_INT);
1228 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1232 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1236 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1243 struct mifare_authcmd {
1245 u_int8_t block_address;
1246 u_int32_t serno; /* lsb 1 2 msb */
1247 } __attribute__ ((packed));
1250 #define RFID_MIFARE_KEY_LEN 6
1251 #define RFID_MIFARE_KEY_CODED_LEN 12
1253 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1255 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1261 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1262 ln = key6[i] & 0x0f;
1264 key12[i * 2 + 1] = (~ln << 4) | ln;
1265 key12[i * 2] = (~hn << 4) | hn;
1271 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1273 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1277 ret = rc632_mifare_transform_key(key, coded_key);
1281 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1285 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1289 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1293 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1297 if (reg & RC632_ERR_FLAG_KEY_ERR)
1304 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1308 struct mifare_authcmd acmd;
1311 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B)
1314 /* Initialize acmd */
1315 acmd.block_address = block & 0xff;
1316 acmd.auth_cmd = cmd;
1317 //acmd.serno = htonl(serno);
1321 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1322 RC632_CR_RX_CRC_ENABLE);
1326 /* Send Authent1 Command */
1327 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1331 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1335 /* Wait until transmitter is idle */
1336 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1340 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1347 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1348 RC632_CR_TX_CRC_ENABLE);
1352 /* Send Authent2 Command */
1353 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1357 /* Wait until transmitter is idle */
1358 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1362 /* Check whether authentication was successful */
1363 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1367 if (!(reg & RC632_CONTROL_CRYPTO1_ON))
1374 /* transcieve regular frame */
1376 rc632_mifare_transcieve(struct rfid_asic_handle *handle,
1377 const u_int8_t *tx_buf, unsigned int tx_len,
1378 u_int8_t *rx_buf, unsigned int *rx_len,
1379 u_int64_t timeout, unsigned int flags)
1382 u_int8_t rxl = *rx_len & 0xff;
1384 DEBUGP("entered\n");
1385 memset(rx_buf, 0, *rx_len);
1388 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1389 (RC632_CR_PARITY_ENABLE |
1390 RC632_CR_PARITY_ODD |
1391 RC632_CR_TX_CRC_ENABLE |
1392 RC632_CR_RX_CRC_ENABLE));
1394 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1395 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1400 ret = rc632_transcieve(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1409 struct rfid_asic rc632 = {
1410 .name = "Philips CL RC632",
1411 .fc = ISO14443_FREQ_CARRIER,
1414 .power_up = &rc632_power_up,
1415 .power_down = &rc632_power_down,
1416 .turn_on_rf = &rc632_turn_on_rf,
1417 .turn_off_rf = &rc632_turn_off_rf,
1418 .transcieve = &rc632_iso14443ab_transcieve,
1420 .init = &rc632_iso14443a_init,
1421 .transcieve_sf = &rc632_iso14443a_transcieve_sf,
1422 .transcieve_acf = &rc632_iso14443a_transcieve_acf,
1423 .set_speed = &rc632_iso14443a_set_speed,
1426 .init = &rc632_iso14443b_init,
1429 .init = &rc632_iso15693_init,
1432 .setkey = &rc632_mifare_set_key,
1433 .auth = &rc632_mifare_auth,