git.rot13.org Git - librfid/blob - src/rfid_asic_rc632.c

   1 /* Generic Philips CL RC632 Routines
   2  *
   3  * (C) 2005-2008 Harald Welte <laforge@gnumonks.org>
   4  *
   5  */
   6
   7 /*
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License version 2
  10  *  as published by the Free Software Foundation
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
  20  */
  21
  22 #include <unistd.h>
  23 #include <stdlib.h>
  24 #include <string.h>
  25 #include <errno.h>
  26 #include <limits.h>
  27 #include <sys/types.h>
  28
  29 #include <librfid/rfid.h>
  30 #include <librfid/rfid_asic.h>
  31 #include <librfid/rfid_asic_rc632.h>
  32 #include <librfid/rfid_reader_cm5121.h>
  33 #include <librfid/rfid_layer2_iso14443a.h>
  34 #include <librfid/rfid_layer2_iso15693.h>
  35 #include <librfid/rfid_protocol_mifare_classic.h>
  36
  37 #include "rfid_iso14443_common.h"
  38 #include "rc632.h"
  39
  40 #ifdef  __MINGW32__
  41 #include "usleep.h"
  42 #endif/*__MINGW32__*/
  43
  44 #define RC632_TMO_AUTH1 140
  45
  46 #define TIMER_RELAX_FACTOR      10
  47
  48 #define ENTER()         DEBUGP("entering\n")
  49 const struct rfid_asic rc632;
  50
  51 struct register_file {
  52         u_int8_t reg;
  53         u_int8_t val;
  54 };
  55
  56 /* Register and FIFO Access functions */
  57 static int
  58 rc632_reg_write(struct rfid_asic_handle *handle,
  59                 u_int8_t reg,
  60                 u_int8_t val)
  61 {
  62         return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
  63 }
  64
  65 static int
  66 rc632_reg_read(struct rfid_asic_handle *handle,
  67                u_int8_t reg,
  68                u_int8_t *val)
  69 {
  70         return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
  71 }
  72
  73 static int
  74 rc632_fifo_write(struct rfid_asic_handle *handle,
  75                  u_int8_t len,
  76                  const u_int8_t *buf,
  77                  u_int8_t flags)
  78 {
  79         return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
  80                                                            len, buf, flags);
  81 }
  82
  83 static int
  84 rc632_fifo_read(struct rfid_asic_handle *handle,
  85                 u_int8_t len,
  86                 u_int8_t *buf)
  87 {
  88         return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
  89 }
  90
  91
  92 static int
  93 rc632_set_bits(struct rfid_asic_handle *handle,
  94                 u_int8_t reg,
  95                 u_int8_t val)
  96 {
  97         int ret;
  98         u_int8_t tmp;
  99
 100         ret = rc632_reg_read(handle, reg, &tmp);
 101         if (ret < 0)
 102                 return -1;
 103
 104         /* if bits are already set, no need to set them again */
 105         if ((tmp & val) == val)
 106                 return 0;
 107
 108         return rc632_reg_write(handle, reg, (tmp|val)&0xff);
 109 }
 110 static int
 111 rc632_set_bit_mask(struct rfid_asic_handle *handle,
 112                    u_int8_t reg, u_int8_t mask, u_int8_t val)
 113 {
 114         int ret;
 115         u_int8_t tmp;
 116
 117         ret = rc632_reg_read(handle, reg, &tmp);
 118         if (ret < 0)
 119                 return ret;
 120
 121         /* if bits are already like we want them, abort */
 122         if ((tmp & mask) == val)
 123                 return 0;
 124
 125         return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
 126 }
 127
 128 static int
 129 rc632_clear_bits(struct rfid_asic_handle *handle,
 130                  u_int8_t reg,
 131                  u_int8_t val)
 132 {
 133         int ret;
 134         u_int8_t tmp;
 135
 136         ret = rc632_reg_read(handle, reg, &tmp);
 137         if (ret < 0) {
 138                 DEBUGP("error during reg_read(%p, %d):%d\n",
 139                         handle, reg, ret);
 140                 return -1;
 141         }
 142         /* if bits are already cleared, no need to clear them again */
 143         if ((tmp & val) == 0)
 144                 return 0;
 145
 146         return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
 147 }
 148
 149 static int
 150 rc632_clear_irqs(struct rfid_asic_handle *handle, u_int8_t bits)
 151 {
 152         return rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, (~RC632_INT_SET)&bits);
 153 }
 154
 155 static int
 156 rc632_rf_power(struct rfid_asic_handle *handle, int on)
 157 {
 158         ENTER();
 159         if (on)
 160                 return rc632_set_bits(handle, RC632_REG_TX_CONTROL,
 161                                       RC632_TXCTRL_TX1_RF_EN|
 162                                       RC632_TXCTRL_TX2_RF_EN);
 163         else
 164                 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL,
 165                                         RC632_TXCTRL_TX1_RF_EN|
 166                                         RC632_TXCTRL_TX2_RF_EN);
 167 }
 168
 169 static int
 170 rc632_power(struct rfid_asic_handle *handle, int on)
 171 {
 172         ENTER();
 173         if (on)
 174                 return rc632_clear_bits(handle, RC632_REG_CONTROL,
 175                                         RC632_CONTROL_POWERDOWN);
 176         else
 177                 return rc632_set_bits(handle, RC632_REG_CONTROL,
 178                                       RC632_CONTROL_POWERDOWN);
 179 }
 180
 181 static int
 182 rc632_execute_script(struct rfid_asic_handle *h, struct register_file *f,
 183                      int len)
 184 {
 185         int i, ret;
 186
 187         for (i = 0; i < len; i++) {
 188                 ret = rc632_reg_write(h, f[i].reg, f[i].val);
 189                 if (ret < 0)
 190                         return ret;
 191         }
 192
 193         return 0;
 194 }
 195
 196 /* calculate best 8bit prescaler and divisor for given usec timeout */
 197 static int best_prescaler(u_int64_t timeout, u_int8_t *prescaler,
 198                           u_int8_t *divisor)
 199 {
 200         u_int8_t best_prescaler, best_divisor, i;
 201         int64_t smallest_diff;
 202
 203         smallest_diff = LLONG_MAX;
 204         best_prescaler = 0;
 205
 206         for (i = 0; i < 21; i++) {
 207                 u_int64_t clk, tmp_div, res;
 208                 int64_t diff;
 209                 clk = 13560000 / (1 << i);
 210                 tmp_div = (clk * timeout) / 1000000;
 211                 tmp_div++;
 212
 213                 if ((tmp_div > 0xff) || (tmp_div > clk))
 214                         continue;
 215
 216                 res = 1000000 / (clk / tmp_div);
 217                 diff = res - timeout;
 218
 219                 if (diff < 0)
 220                         continue;
 221
 222                 if (diff < smallest_diff) {
 223                         best_prescaler = i;
 224                         best_divisor = tmp_div;
 225                         smallest_diff = diff;
 226                 }
 227         }
 228
 229         *prescaler = best_prescaler;
 230         *divisor = best_divisor;
 231
 232         DEBUGP("timeout %u usec, prescaler = %u, divisor = %u\n",
 233                 timeout, best_prescaler, best_divisor);
 234
 235         return 0;
 236 }
 237
 238 static int
 239 rc632_timer_set(struct rfid_asic_handle *handle,
 240                 u_int64_t timeout)
 241 {
 242         int ret;
 243         u_int8_t prescaler, divisor;
 244
 245         timeout *= TIMER_RELAX_FACTOR;
 246
 247         ret = best_prescaler(timeout, &prescaler, &divisor);
 248
 249         ret = rc632_reg_write(handle, RC632_REG_TIMER_CLOCK,
 250                               prescaler & 0x1f);
 251         if (ret < 0)
 252                 return ret;
 253
 254         ret = rc632_reg_write(handle, RC632_REG_TIMER_CONTROL,
 255                               RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
 256
 257         /* clear timer irq bit */
 258         ret = rc632_set_bits(handle, RC632_REG_INTERRUPT_RQ, RC632_IRQ_TIMER);
 259
 260         ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
 261
 262         return ret;
 263 }
 264
 265 /* Wait until RC632 is idle or TIMER IRQ has happened */
 266 static int rc632_wait_idle_timer(struct rfid_asic_handle *handle)
 267 {
 268         int ret;
 269         u_int8_t stat, irq, cmd;
 270
 271         while (1) {
 272                 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &stat);
 273                 DEBUGP_STATUS_FLAG(stat);
 274                 if (stat & RC632_STAT_ERR) {
 275                         u_int8_t err;
 276                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &err);
 277                         DEBUGP_ERROR_FLAG(err);
 278                         if (err & (RC632_ERR_FLAG_COL_ERR |
 279                                    RC632_ERR_FLAG_PARITY_ERR |
 280                                    RC632_ERR_FLAG_FRAMING_ERR |
 281                                    RC632_ERR_FLAG_CRC_ERR))
 282                                 return -EIO;
 283                 }
 284                 if (stat & RC632_STAT_IRQ) {
 285                         ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
 286                         if (ret < 0)
 287                                 return ret;
 288                         DEBUGP_INTERRUPT_FLAG(irq);
 289
 290                         if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
 291                                 DEBUGP("timer expired before RX!!\n");
 292                                 return -ETIMEDOUT;
 293                         }
 294                 }
 295
 296                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 297                 if (ret < 0)
 298                         return ret;
 299
 300                 if (cmd == 0)
 301                         return 0;
 302
 303                 /* poll every millisecond */
 304                 usleep(1000);
 305         }
 306 }
 307
 308 /* Stupid RC632 implementations don't evaluate interrupts but poll the
 309  * command register for "status idle" */
 310 static int
 311 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
 312 {
 313         u_int8_t cmd = 0xff;
 314         int ret, cycles = 0;
 315 #define USLEEP_PER_CYCLE        128
 316
 317         timeout *= TIMER_RELAX_FACTOR;
 318
 319         while (cmd != 0) {
 320                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 321                 if (ret < 0)
 322                         return ret;
 323
 324                 {
 325                         u_int8_t foo;
 326                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
 327                         DEBUGP_STATUS_FLAG(foo);
 328                         /* check if Error has occured (ERR flag set) */
 329                         if (foo & RC632_STAT_ERR) {
 330                                 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
 331                                 DEBUGP_ERROR_FLAG(foo);
 332                         }
 333                         /* check if IRQ has occurred (IRQ flag set)*/
 334                         if (foo & RC632_STAT_IRQ) {
 335                                 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &foo);
 336                                 DEBUGP_INTERRUPT_FLAG(foo);
 337                                 /* clear all interrupts */
 338                                 rc632_clear_irqs(handle, 0xff);
 339                         }
 340                 }
 341                 if (cmd == 0) {
 342                         /* FIXME: read second time ?? */
 343                         DEBUGP("cmd == 0 (IDLE)\n");
 344                         return 0;
 345                 }
 346
 347                 /* Abort after some timeout */
 348                 if (cycles > timeout/USLEEP_PER_CYCLE) {
 349                         DEBUGP("timeout...\n");
 350                         return -ETIMEDOUT;
 351                 }
 352
 353                 cycles++;
 354                 usleep(USLEEP_PER_CYCLE);
 355         }
 356
 357         return 0;
 358 }
 359
 360 static int
 361 rc632_transmit(struct rfid_asic_handle *handle,
 362                 const u_int8_t *buf,
 363                 u_int8_t len,
 364                 u_int64_t timeout)
 365 {
 366         int ret, cur_len;
 367         const u_int8_t *cur_buf = buf;
 368
 369         DEBUGP("timeout=%u, tx_len=%u\n", timeout, len);
 370
 371         if (len > 64)
 372                 cur_len = 64;
 373         else
 374                 cur_len = len;
 375
 376         do {
 377                 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
 378                 if (ret < 0)
 379                         return ret;
 380
 381                 if (cur_buf == buf)  {
 382                         /* only start transmit first time */
 383                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 384                                               RC632_CMD_TRANSMIT);
 385                         if (ret < 0)
 386                                 return ret;
 387                 }
 388
 389                 cur_buf += cur_len;
 390                 if (cur_buf < buf + len) {
 391                         cur_len = buf - cur_buf;
 392                         if (cur_len > 64)
 393                                 cur_len = 64;
 394                 } else
 395                         cur_len = 0;
 396
 397         } while (cur_len);
 398
 399         return rc632_wait_idle(handle, timeout);
 400 }
 401
 402 static int
 403 tcl_toggle_pcb(struct rfid_asic_handle *handle)
 404 {
 405         /* FIXME: toggle something between 0x0a and 0x0b */
 406         return 0;
 407 }
 408
 409 static int
 410 rc632_transceive(struct rfid_asic_handle *handle,
 411                  const u_int8_t *tx_buf,
 412                  u_int8_t tx_len,
 413                  u_int8_t *rx_buf,
 414                  u_int8_t *rx_len,
 415                  u_int64_t timer,
 416                  unsigned int toggle)
 417 {
 418         int ret, cur_tx_len, i;
 419         u_int8_t rx_avail;
 420         const u_int8_t *cur_tx_buf = tx_buf;
 421
 422         DEBUGP("timeout=%u, rx_len=%u, tx_len=%u\n", timer, *rx_len, tx_len);
 423
 424         if (tx_len > 64)
 425                 cur_tx_len = 64;
 426         else
 427                 cur_tx_len = tx_len;
 428
 429
 430         ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00);
 431         /* clear all interrupts */
 432         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
 433         ret = rc632_reg_write(handle, RC632_REG_ERROR_FLAG, 0xff);
 434
 435         { u_int8_t tmp;
 436         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 437         DEBUGP_STATUS_FLAG(tmp);
 438         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 439         DEBUGP_STATUS_FLAG(tmp);
 440         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 441         DEBUGP_STATUS_FLAG(tmp);
 442         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 443         DEBUGP_ERROR_FLAG(tmp);
 444         }
 445
 446         ret = rc632_timer_set(handle, timer);
 447         if (ret < 0)
 448                 return ret;
 449
 450         do {
 451                 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
 452                 if (ret < 0)
 453                         return ret;
 454
 455                 if (cur_tx_buf == tx_buf) {
 456                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 457                                               RC632_CMD_TRANSCEIVE);
 458                         if (ret < 0)
 459                                 return ret;
 460                 }
 461
 462                 cur_tx_buf += cur_tx_len;
 463                 if (cur_tx_buf < tx_buf + tx_len) {
 464                         u_int8_t fifo_fill;
 465                         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
 466                                              &fifo_fill);
 467                         if (ret < 0)
 468                                 return ret;
 469
 470                         cur_tx_len = 64 - fifo_fill;
 471                 } else
 472                         cur_tx_len = 0;
 473
 474         } while (cur_tx_len);
 475
 476         if (toggle == 1)
 477                 tcl_toggle_pcb(handle);
 478
 479         ret = rc632_wait_idle_timer(handle);
 480         //ret = rc632_wait_idle(handle, timer);
 481
 482         DEBUGP("rc632_wait_idle >> ret=%d %s\n",ret,(ret==-ETIMEDOUT)?"ETIMEDOUT":"");
 483         if (ret < 0)
 484                 return ret;
 485
 486         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
 487         if (ret < 0)
 488                 return ret;
 489
 490         if (rx_avail > *rx_len)
 491                 DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
 492         else if (*rx_len > rx_avail)
 493                 *rx_len = rx_avail;
 494
 495         DEBUGP("rx_len == %d\n",*rx_len);
 496
 497         if (rx_avail == 0) {
 498                 u_int8_t tmp;
 499
 500                 for (i = 0; i < 1; i++){
 501                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 502                         DEBUGP_STATUS_FLAG(tmp);
 503                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 504                         DEBUGP_ERROR_FLAG(tmp);
 505                 }
 506                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 507
 508                 //return 0;
 509                 return -1;
 510         }
 511
 512         return rc632_fifo_read(handle, *rx_len, rx_buf);
 513         /* FIXME: discard addidional bytes in FIFO */
 514 }
 515
 516
 517 static int
 518 rc632_receive(struct rfid_asic_handle *handle,
 519                  u_int8_t *rx_buf,
 520                  u_int8_t *rx_len,
 521                  u_int64_t timer)
 522 {
 523         int ret, cur_tx_len, i;
 524         u_int8_t rx_avail;
 525
 526         DEBUGP("timeout=%u, rx_len=%u\n", timer, *rx_len);
 527         ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00); /* IDLE */
 528         /* clear all interrupts */
 529         ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
 530
 531         ret = rc632_timer_set(handle, timer);
 532         if (ret < 0)
 533                 return ret;
 534
 535         ret = rc632_reg_write(handle, RC632_REG_COMMAND,RC632_CMD_RECEIVE);
 536         if (ret < 0)
 537                 return ret;
 538
 539         /* the timer cannot start in hardware based on the command we just
 540          * sent. this means that our timing will always be quite a bit more lax,
 541          * i.e. we'll always wait for a bit longer than the specs ask us to. */
 542         ret = rc632_set_bits(handle, RC632_REG_CONTROL,
 543                              RC632_CONTROL_TIMER_START);
 544         if (ret < 0)
 545                 return ret;
 546
 547         //ret = rc632_wait_idle(handle, timer);
 548         ret = rc632_wait_idle_timer(handle);
 549         if (ret < 0)
 550                 return ret;
 551
 552         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
 553         if (ret < 0)
 554                 return ret;
 555
 556         if (rx_avail > *rx_len) {
 557                 //DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
 558         } else if (*rx_len > rx_avail)
 559                 *rx_len = rx_avail;
 560
 561         if (rx_avail == 0) {
 562                 u_int8_t tmp;
 563
 564                 DEBUGP("rx_len == 0\n");
 565
 566                 for (i = 0; i < 1; i++) {
 567                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
 568                         DEBUGP_STATUS_FLAG(tmp);
 569                         rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 570                         DEBUGP_ERROR_FLAG(tmp);
 571                 }
 572
 573                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 574                 return -1;
 575         }
 576
 577         return rc632_fifo_read(handle, *rx_len, rx_buf);
 578         /* FIXME: discard additional bytes in FIFO */
 579 }
 580
 581 static int
 582 rc632_read_eeprom(struct rfid_asic_handle *handle)
 583 {
 584         u_int8_t recvbuf[60];
 585         u_int8_t sndbuf[3];
 586         int ret;
 587
 588         sndbuf[0] = 0x00;
 589         sndbuf[1] = 0x00;
 590         sndbuf[2] = 0x3c;
 591
 592         ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
 593         if (ret < 0)
 594                 return ret;
 595
 596         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
 597         if (ret < 0)
 598                 return ret;
 599
 600         usleep(20000);
 601
 602         ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
 603         if (ret < 0)
 604                 return ret;
 605
 606         /* FIXME: do something with eeprom contents */
 607         return ret;
 608 }
 609
 610 static int
 611 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
 612 {
 613         u_int8_t sndbuf[2] = { 0x01, 0x02 };
 614         u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
 615         int ret;
 616
 617         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
 618         if (ret < 0)
 619                 return ret;
 620
 621         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
 622         if (ret < 0)
 623                 return ret;
 624
 625         ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
 626         if (ret < 0)
 627                 return ret;
 628
 629         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
 630         if (ret < 0)
 631                 return ret;
 632
 633         usleep(10000);  /* FIXME: no checking for cmd completion? *
 634
 635         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
 636         if (ret < 0)
 637                 return ret;
 638
 639         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
 640         if (ret < 0)
 641                 return ret;
 642
 643         /* FIXME: what to do with crc result? */
 644         return ret;
 645 }
 646
 647
 648 int
 649 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
 650 {
 651         int ret = 0;
 652         u_int8_t i;
 653
 654         for (i = 0; i <= 0x3f; i++)
 655                 ret |= rc632_reg_read(handle, i, &buf[i]);
 656
 657         return ret;
 658 }
 659
 660 /* generic FIFO access functions (if no more efficient ones provided by
 661  * transport driver) */
 662
 663 static int
 664 generic_fifo_write()
 665 {
 666         /* FIXME: implementation (not needed for CM 5121) */
 667         return -1;
 668 }
 669
 670 static int
 671 generic_fifo_read()
 672 {
 673         /* FIXME: implementation (not neded for CM 5121) */
 674         return -1;
 675 }
 676
 677 static int
 678 rc632_init(struct rfid_asic_handle *ah)
 679 {
 680         int ret;
 681
 682         /* switch off rf (make sure PICCs are reset at init time) */
 683         ret = rc632_power(ah, 0);
 684         if (ret < 0)
 685                 return ret;
 686
 687         usleep(10000);
 688
 689         /* switch on rf */
 690         ret = rc632_power(ah, 1);
 691         if (ret < 0)
 692                 return ret;
 693
 694         /* disable register paging */
 695         ret = rc632_reg_write(ah, 0x00, 0x00);
 696         if (ret < 0)
 697                 return ret;
 698
 699         /* set some sane default values */
 700         ret = rc632_reg_write(ah, 0x11, 0x5b);
 701         if (ret < 0)
 702                 return ret;
 703
 704         /* switch off rf */
 705         ret = rc632_rf_power(ah, 0);
 706         if (ret < 0)
 707                 return ret;
 708
 709         usleep(100000);
 710
 711         /* switch on rf */
 712         ret = rc632_rf_power(ah, 1);
 713         if (ret < 0)
 714                 return ret;
 715
 716         return 0;
 717 }
 718
 719 static int
 720 rc632_fini(struct rfid_asic_handle *ah)
 721 {
 722         int ret;
 723
 724         /* switch off rf */
 725         ret = rc632_rf_power(ah, 0);
 726         if (ret < 0)
 727                 return ret;
 728
 729         ret = rc632_power(ah, 0);
 730         if (ret < 0)
 731                 return ret;
 732
 733         return 0;
 734 }
 735
 736 struct rfid_asic_handle *
 737 rc632_open(struct rfid_asic_transport_handle *th)
 738 {
 739         struct rfid_asic_handle *h;
 740
 741         h = malloc_asic_handle(sizeof(*h));
 742         if (!h)
 743                 return NULL;
 744         memset(h, 0, sizeof(*h));
 745
 746         h->asic = (void*)&rc632;
 747         h->rath = th;
 748         h->fc = h->asic->fc;
 749         /* FIXME: this is only cm5121 specific, since the latency
 750          * down to the RC632 FIFO is too long to refill during TX/RX */
 751         h->mtu = h->mru = 64;
 752
 753         if (rc632_init(h) < 0) {
 754                 free_asic_handle(h);
 755                 return NULL;
 756         }
 757
 758         return h;
 759 }
 760
 761 void
 762 rc632_close(struct rfid_asic_handle *h)
 763 {
 764         rc632_fini(h);
 765         free_asic_handle(h);
 766 }
 767
 768 /*
 769  * ISO14443A
 770  */
 771
 772 /* Register file for ISO14443A standard */
 773 static struct register_file iso14443a_script[] = {
 774         {
 775                 .reg    = RC632_REG_TX_CONTROL,
 776                 .val    = RC632_TXCTRL_MOD_SRC_INT |
 777                           RC632_TXCTRL_TX2_INV |
 778                           RC632_TXCTRL_FORCE_100_ASK |
 779                           RC632_TXCTRL_TX2_RF_EN |
 780                           RC632_TXCTRL_TX1_RF_EN,
 781         }, {
 782                 .reg    = RC632_REG_CW_CONDUCTANCE,
 783                 .val    = CM5121_CW_CONDUCTANCE,
 784         }, {
 785                 .reg    = RC632_REG_MOD_CONDUCTANCE,
 786                 .val    = CM5121_MOD_CONDUCTANCE,
 787         }, {
 788                 .reg    = RC632_REG_CODER_CONTROL,
 789                 .val    = (RC632_CDRCTRL_TXCD_14443A |
 790                            RC632_CDRCTRL_RATE_106K),
 791         }, {
 792                 .reg    = RC632_REG_MOD_WIDTH,
 793                 .val    = 0x13,
 794         }, {
 795                 .reg    = RC632_REG_MOD_WIDTH_SOF,
 796                 .val    = 0x3f,
 797         }, {
 798                 .reg    = RC632_REG_TYPE_B_FRAMING,
 799                 .val    = 0x00,
 800         }, {
 801                 .reg    = RC632_REG_RX_CONTROL1,
 802                 .val    = (RC632_RXCTRL1_GAIN_35DB |
 803                            RC632_RXCTRL1_ISO14443 |
 804                            RC632_RXCTRL1_SUBCP_8),
 805         }, {
 806                 .reg    = RC632_REG_DECODER_CONTROL,
 807                 .val    = (RC632_DECCTRL_MANCHESTER |
 808                            RC632_DECCTRL_RXFR_14443A),
 809         }, {
 810                 .reg    = RC632_REG_BIT_PHASE,
 811                 .val    = CM5121_14443A_BITPHASE,
 812         }, {
 813                 .reg    = RC632_REG_RX_THRESHOLD,
 814                 .val    = CM5121_14443A_THRESHOLD,
 815         }, {
 816                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
 817                 .val    = 0x00,
 818         }, {
 819                 .reg    = RC632_REG_RX_CONTROL2,
 820                 .val    = (RC632_RXCTRL2_DECSRC_INT |
 821                            RC632_RXCTRL2_CLK_Q),
 822         }, {
 823                 .reg    = RC632_REG_RX_WAIT,
 824                 //.val  = 0x03, /* default value */
 825                 .val    = 0x06, /* omnikey */
 826         }, {
 827                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
 828                 .val    = (RC632_CR_PARITY_ENABLE |
 829                            RC632_CR_PARITY_ODD),
 830         }, {
 831                 .reg    = RC632_REG_CRC_PRESET_LSB,
 832                 .val    = 0x63,
 833         }, {
 834                 .reg    = RC632_REG_CRC_PRESET_MSB,
 835                 .val    = 0x63,
 836         },
 837 };
 838
 839 static int
 840 rc632_iso14443a_init(struct rfid_asic_handle *handle)
 841 {
 842         int ret;
 843
 844         /* flush fifo (our way) */
 845         ret = rc632_reg_write(handle, RC632_REG_CONTROL,
 846                               RC632_CONTROL_FIFO_FLUSH);
 847
 848         ret = rc632_execute_script(handle, iso14443a_script,
 849                                    ARRAY_SIZE(iso14443a_script));
 850         if (ret < 0)
 851                 return ret;
 852
 853         return 0;
 854 }
 855
 856 static int
 857 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
 858 {
 859
 860 #if 0
 861         ret = rc632_rf_power(handle, 0);
 862         if (ret < 0)
 863                 return ret;
 864 #endif
 865
 866
 867         return 0;
 868 }
 869
 870
 871 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
 872 static int
 873 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
 874                                 u_int8_t cmd,
 875                                 struct iso14443a_atqa *atqa)
 876 {
 877         int ret;
 878         u_int8_t tx_buf[1];
 879         u_int8_t rx_len = 2;
 880         u_int8_t error_flag;
 881
 882         memset(atqa, 0, sizeof(*atqa));
 883
 884         tx_buf[0] = cmd;
 885
 886         /* transfer only 7 bits of last byte in frame */
 887         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
 888         if (ret < 0)
 889                 return ret;
 890
 891         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
 892                                 RC632_CONTROL_CRYPTO1_ON);
 893         if (ret < 0)
 894                 return ret;
 895
 896 #if 0
 897         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
 898                                 (RC632_CR_PARITY_ENABLE |
 899                                  RC632_CR_PARITY_ODD));
 900 #else
 901         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
 902                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
 903
 904 #endif
 905         if (ret < 0)
 906                 return ret;
 907
 908         ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
 909                                 (u_int8_t *)atqa, &rx_len,
 910                                 ISO14443A_FDT_ANTICOL_LAST1, 0);
 911         if (ret < 0) {
 912                 DEBUGP("error during rc632_transceive()\n");
 913                 return ret;
 914         }
 915
 916         /* switch back to normal 8bit last byte */
 917         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
 918         if (ret < 0)
 919                 return ret;
 920
 921         /* determine whether there was a collission */
 922         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
 923         if (ret < 0)
 924                 return ret;
 925
 926         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
 927                 u_int8_t boc;
 928                 /* retrieve bit of collission */
 929                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
 930                 if (ret < 0)
 931                         return ret;
 932                 DEBUGP("collision detected in xcv_sf: bit_of_col=%u\n", boc);
 933                 /* FIXME: how to signal this up the stack */
 934         }
 935
 936         if (rx_len != 2) {
 937                 DEBUGP("rx_len(%d) != 2\n", rx_len);
 938                 return -1;
 939         }
 940
 941         return 0;
 942 }
 943
 944 /* transceive regular frame */
 945 static int
 946 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
 947                            unsigned int frametype,
 948                            const u_int8_t *tx_buf, unsigned int tx_len,
 949                            u_int8_t *rx_buf, unsigned int *rx_len,
 950                            u_int64_t timeout, unsigned int flags)
 951 {
 952         int ret;
 953         u_int8_t rxl;
 954         u_int8_t channel_red;
 955
 956         if (*rx_len > 0xff)
 957                 rxl = 0xff;
 958         else
 959                 rxl = *rx_len;
 960
 961         memset(rx_buf, 0, *rx_len);
 962
 963         switch (frametype) {
 964         case RFID_14443A_FRAME_REGULAR:
 965         case RFID_MIFARE_FRAME:
 966                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
 967                                 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
 968                 break;
 969         case RFID_14443B_FRAME_REGULAR:
 970                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
 971                                 |RC632_CR_CRC3309;
 972                 break;
 973 #if 0
 974         case RFID_MIFARE_FRAME:
 975                 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
 976                 break;
 977 #endif
 978         case RFID_15693_FRAME:
 979                 channel_red = RC632_CR_CRC3309 | RC632_CR_RX_CRC_ENABLE
 980                                 | RC632_CR_TX_CRC_ENABLE;
 981                 break;
 982         case RFID_15693_FRAME_ICODE1:
 983                 /* FIXME: implement */
 984         default:
 985                 return -EINVAL;
 986                 break;
 987         }
 988         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
 989                               channel_red);
 990         if (ret < 0)
 991                 return ret;
 992         DEBUGP("tx_len=%u\n",tx_len);
 993         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, timeout, 0);
 994         *rx_len = rxl;
 995         if (ret < 0)
 996                 return ret;
 997
 998
 999         return 0;
1000 }
1001
1002 /* transceive anti collission bitframe */
1003 static int
1004 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
1005                                 struct iso14443a_anticol_cmd *acf,
1006                                 unsigned int *bit_of_col)
1007 {
1008         int ret;
1009         u_int8_t rx_buf[64];
1010         u_int8_t rx_len = sizeof(rx_buf);
1011         u_int8_t rx_align = 0, tx_last_bits, tx_bytes, tx_bytes_total;
1012         u_int8_t boc;
1013         u_int8_t error_flag;
1014         *bit_of_col = ISO14443A_BITOFCOL_NONE;
1015         memset(rx_buf, 0, sizeof(rx_buf));
1016
1017         /* disable mifare cryto */
1018         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
1019                                 RC632_CONTROL_CRYPTO1_ON);
1020         if (ret < 0)
1021                 return ret;
1022
1023         /* disable CRC summing */
1024 #if 0
1025         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1026                                 (RC632_CR_PARITY_ENABLE |
1027                                  RC632_CR_PARITY_ODD));
1028 #else
1029         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1030                                 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1031 #endif
1032         if (ret < 0)
1033                 return ret;
1034
1035         tx_last_bits = acf->nvb & 0x07; /* lower nibble indicates bits */
1036         tx_bytes = ( acf->nvb >> 4 ) & 0x07;
1037         if (tx_last_bits) {
1038                 tx_bytes_total = tx_bytes+1;
1039                 rx_align = tx_last_bits & 0x07; /* rx frame complements tx */
1040         }
1041         else
1042                 tx_bytes_total = tx_bytes;
1043
1044         /* set RxAlign and TxLastBits*/
1045         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
1046                                 (rx_align << 4) | (tx_last_bits));
1047         if (ret < 0)
1048                 return ret;
1049
1050         ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes_total,
1051                                 rx_buf, &rx_len, 0x32, 0);
1052         if (ret < 0)
1053                 return ret;
1054
1055         /* bitwise-OR the two halves of the split byte */
1056         acf->uid_bits[tx_bytes-2] = (
1057                   (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
1058                 | rx_buf[0]);
1059
1060         /* copy the rest */
1061         if (rx_len)
1062                 memcpy(&acf->uid_bits[tx_bytes-1], &rx_buf[1], rx_len-1);
1063
1064         /* determine whether there was a collission */
1065         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1066         if (ret < 0)
1067                 return ret;
1068
1069         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1070                 /* retrieve bit of collission */
1071                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1072                 if (ret < 0)
1073                         return ret;
1074
1075                 /* bit of collission relative to start of part 1 of
1076                  * anticollision frame (!) */
1077                 *bit_of_col = 2*8 + boc;
1078         }
1079
1080         return 0;
1081 }
1082
1083 enum rc632_rate {
1084         RC632_RATE_106  = 0x00,
1085         RC632_RATE_212  = 0x01,
1086         RC632_RATE_424  = 0x02,
1087         RC632_RATE_848  = 0x03,
1088 };
1089
1090 struct rx_config {
1091         u_int8_t        subc_pulses;
1092         u_int8_t        rx_coding;
1093         u_int8_t        rx_threshold;
1094         u_int8_t        bpsk_dem_ctrl;
1095 };
1096
1097 struct tx_config {
1098         u_int8_t        rate;
1099         u_int8_t        mod_width;
1100 };
1101
1102 static struct rx_config rx_configs[] = {
1103         {
1104                 .subc_pulses    = RC632_RXCTRL1_SUBCP_8,
1105                 .rx_coding      = RC632_DECCTRL_MANCHESTER,
1106                 .rx_threshold   = 0x88,
1107                 .bpsk_dem_ctrl  = 0x00,
1108         },
1109         {
1110                 .subc_pulses    = RC632_RXCTRL1_SUBCP_4,
1111                 .rx_coding      = RC632_DECCTRL_BPSK,
1112                 .rx_threshold   = 0x50,
1113                 .bpsk_dem_ctrl  = 0x0c,
1114         },
1115         {
1116                 .subc_pulses    = RC632_RXCTRL1_SUBCP_2,
1117                 .rx_coding      = RC632_DECCTRL_BPSK,
1118                 .rx_threshold   = 0x50,
1119                 .bpsk_dem_ctrl  = 0x0c,
1120         },
1121         {
1122                 .subc_pulses    = RC632_RXCTRL1_SUBCP_1,
1123                 .rx_coding      = RC632_DECCTRL_BPSK,
1124                 .rx_threshold   = 0x50,
1125                 .bpsk_dem_ctrl  = 0x0c,
1126         },
1127 };
1128
1129 static struct tx_config tx_configs[] = {
1130         {
1131                 .rate           = RC632_CDRCTRL_RATE_106K,
1132                 .mod_width      = 0x13,
1133         },
1134         {
1135                 .rate           = RC632_CDRCTRL_RATE_212K,
1136                 .mod_width      = 0x07,
1137         },
1138         {
1139                 .rate           = RC632_CDRCTRL_RATE_424K,
1140                 .mod_width      = 0x03,
1141         },
1142         {
1143                 .rate           = RC632_CDRCTRL_RATE_848K,
1144                 .mod_width      = 0x01,
1145         },
1146 };
1147
1148 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
1149                                      unsigned int tx, unsigned int rate)
1150 {
1151         int rc;
1152         u_int8_t reg;
1153
1154
1155         if (!tx) {
1156                 /* Rx */
1157                 if (rate > ARRAY_SIZE(rx_configs))
1158                         return -EINVAL;
1159
1160                 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
1161                                         RC632_RXCTRL1_SUBCP_MASK,
1162                                         rx_configs[rate].subc_pulses);
1163                 if (rc < 0)
1164                         return rc;
1165
1166                 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
1167                                         RC632_DECCTRL_BPSK,
1168                                         rx_configs[rate].rx_coding);
1169                 if (rc < 0)
1170                         return rc;
1171
1172                 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1173                                         rx_configs[rate].rx_threshold);
1174                 if (rc < 0)
1175                         return rc;
1176
1177                 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
1178                         rc = rc632_reg_write(handle,
1179                                              RC632_REG_BPSK_DEM_CONTROL,
1180                                              rx_configs[rate].bpsk_dem_ctrl);
1181                         if (rc < 0)
1182                                 return rc;
1183                 }
1184         } else {
1185                 /* Tx */
1186                 if (rate > ARRAY_SIZE(tx_configs))
1187                         return -EINVAL;
1188
1189                 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
1190                                         RC632_CDRCTRL_RATE_MASK,
1191                                         tx_configs[rate].rate);
1192                 if (rc < 0)
1193                         return rc;
1194
1195                 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
1196                                      tx_configs[rate].mod_width);
1197                 if (rc < 0)
1198                         return rc;
1199         }
1200
1201         return 0;
1202 }
1203
1204 #if 0
1205 static struct register_file iso14443b_script[] = {
1206         {
1207                 .reg    = RC632_REG_TX_CONTROL,
1208                 .val    = (RC632_TXCTRL_TX1_RF_EN |
1209                            RC632_TXCTRL_TX2_RF_EN |
1210                            RC632_TXCTRL_TX2_INV |
1211                            RC632_TXCTRL_MOD_SRC_INT),
1212         }, {
1213                 .reg    = RC632_REG_CW_CONDUCTANCE,
1214                 .val    = 0x3f,
1215         }, {
1216                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1217                 .val    = 0x04,
1218         }, {
1219                 .reg    = RC632_REG_CODER_CONTROL,
1220                 .val    = (RC632_CDRCTRL_TXCD_NRZ |
1221                            RC632_CDRCTRL_RATE_14443B),
1222         }, {
1223                 .reg    = RC632_REG_MOD_WIDTH,
1224                 .val    = 0x13,
1225         }, {
1226                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1227                 .val    = 0x3f,
1228         }, {
1229                 .reg    = RC632_REG_TYPE_B_FRAMING,
1230                 .val    = (RC632_TBFRAMING_SOF_11L_3H |
1231                            (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1232                            RC632_TBFRAMING_EOF_11);
1233         }, {
1234                 .reg    = RC632_REG_RX_CONTROL1,
1235                 .val    = (RC632_RXCTRL1_GAIN_35DB |
1236                            RC632_RXCTRL1_ISO14443,
1237                            RC632_RXCTRL1_SUBCP_8),
1238         }, {
1239                 .reg    = RC632_REG_DECODER_CONTROL,
1240                 .val    = (RC632_DECCTRL_BPSK |
1241                            RC632_DECCTRL_RXFR_14443B),
1242         }, {
1243                 .reg    = RC632_REG_BIT_PHASE,
1244                 .val    = CM5121_14443B_BITPHASE,
1245         }, {
1246                 .reg    = RC632_REG_RX_THRESHOLD,
1247                 .val    = CM5121_14443B_THRESHOLD,
1248         }, {
1249                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1250                 .val    = ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1251                            (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1252                            RC632_BPSKD_FILTER_AMP_DETECT |
1253                            RC632_BPSKD_NO_RX_EOF |
1254                            RC632_BPSKD_NO_RX_EGT),
1255         }, {
1256                 .reg    = RC632_REG_RX_CONTROL2,
1257                 .val    = (RC632_RXCTRL2_AUTO_PD |
1258                            RC632_RXCTRL2_DECSRC_INT),
1259         }, {
1260                 .reg    = RC632_REG_RX_WAIT,
1261                 .val    = 0x03,
1262         }, {
1263                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1264                 .val    = (RC632_CR_TX_CRC_ENABLE |
1265                            RC632_CR_RX_CRC_ENABLE |
1266                            RC632_CR_CRC3309),
1267         }, {
1268                 .reg    = RC632_REG_CRC_PRESET_LSB,
1269                 .val    = 0xff,
1270         }, {
1271                 .reg    = RC632_REG_CRC_PRESET_MSB,
1272                 .val    = 0xff,
1273         },
1274 };
1275 #endif
1276
1277 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
1278 {
1279         int ret;
1280         ENTER();
1281         /* FIXME: some FIFO work */
1282
1283         /* flush fifo (our way) */
1284         ret = rc632_reg_write(handle, RC632_REG_CONTROL,
1285                               RC632_CONTROL_FIFO_FLUSH);
1286         if (ret < 0)
1287                 return ret;
1288
1289         ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
1290                         (RC632_TXCTRL_TX1_RF_EN |
1291                          RC632_TXCTRL_TX2_RF_EN |
1292                          RC632_TXCTRL_TX2_INV |
1293                          RC632_TXCTRL_MOD_SRC_INT));
1294         if (ret < 0)
1295                 return ret;
1296
1297         ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
1298         if (ret < 0)
1299                 return ret;
1300
1301         ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
1302         if (ret < 0)
1303                 return ret;
1304
1305         ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
1306                               (RC632_CDRCTRL_TXCD_NRZ |
1307                                RC632_CDRCTRL_RATE_14443B));
1308         if (ret < 0)
1309                 return ret;
1310
1311         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
1312         if (ret < 0)
1313                 return ret;
1314
1315         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1316         if (ret < 0)
1317                 return ret;
1318
1319         ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
1320                               (RC632_TBFRAMING_SOF_11L_3H |
1321                                (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1322                                RC632_TBFRAMING_EOF_11));
1323         if (ret < 0)
1324                 return ret;
1325
1326         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
1327                               (RC632_RXCTRL1_GAIN_35DB |
1328                                RC632_RXCTRL1_ISO14443 |
1329                                RC632_RXCTRL1_SUBCP_8));
1330         if (ret < 0)
1331                 return ret;
1332
1333         ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
1334                               (RC632_DECCTRL_BPSK |
1335                                RC632_DECCTRL_RXFR_14443B));
1336         if (ret < 0)
1337                 return ret;
1338
1339         ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
1340                                 CM5121_14443B_BITPHASE);
1341         if (ret < 0)
1342                 return ret;
1343
1344         ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1345                                 CM5121_14443B_THRESHOLD);
1346         if (ret < 0)
1347                 return ret;
1348
1349         ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1350                               ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1351                                (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1352                                RC632_BPSKD_FILTER_AMP_DETECT |
1353                                RC632_BPSKD_NO_RX_EOF |
1354                                RC632_BPSKD_NO_RX_EGT));
1355         if (ret < 0)
1356                 return ret;
1357
1358         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1359                               (RC632_RXCTRL2_AUTO_PD |
1360                                RC632_RXCTRL2_DECSRC_INT));
1361         if (ret < 0)
1362                 return ret;
1363
1364         ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1365         if (ret < 0)
1366                 return ret;
1367
1368         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1369                               (RC632_CR_TX_CRC_ENABLE |
1370                                RC632_CR_RX_CRC_ENABLE |
1371                                RC632_CR_CRC3309));
1372         if (ret < 0)
1373                 return ret;
1374
1375         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1376         if (ret < 0)
1377                 return ret;
1378
1379         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1380         if (ret < 0)
1381                 return ret;
1382
1383         return 0;
1384 }
1385
1386
1387
1388 /*
1389  * ISO15693
1390  */
1391
1392 /* Register file for ISO15693 standard */
1393 static struct register_file iso15693_fast_script[] = {
1394         {
1395                 .reg    = RC632_REG_TX_CONTROL,
1396                 .val    = RC632_TXCTRL_MOD_SRC_INT |
1397                           RC632_TXCTRL_TX2_INV |
1398                           RC632_TXCTRL_TX2_RF_EN |
1399                           RC632_TXCTRL_TX1_RF_EN,
1400         }, {
1401                 .reg    = RC632_REG_CW_CONDUCTANCE,
1402                 .val    = 0x3f,
1403         }, {
1404                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1405                 /* FIXME: nxp default for icode1/15693: 0x05 */
1406                 //.val  = 0x02,
1407                 .val    = 0x21, /* omnikey */
1408         }, {
1409                 .reg    = RC632_REG_CODER_CONTROL,
1410                 .val    = RC632_CDRCTRL_TXCD_15693_FAST |
1411                           RC632_CDRCTRL_RATE_15693,
1412         }, {
1413                 .reg    = RC632_REG_MOD_WIDTH,
1414                 .val    = 0x3f,
1415         }, {
1416                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1417                 .val    = 0x3f,
1418         }, {
1419                 .reg    = RC632_REG_TYPE_B_FRAMING,
1420                 .val    = 0x00,
1421         }, {
1422                 .reg    = RC632_REG_RX_CONTROL1,
1423                 .val    = RC632_RXCTRL1_ISO15693 |
1424                           RC632_RXCTRL1_SUBCP_16 |
1425                           RC632_RXCTRL1_GAIN_35DB,
1426         }, {
1427                 /* FIXME: this should always be the case */
1428                 .reg    = RC632_REG_RX_CONTROL2,
1429                 .val    = RC632_RXCTRL2_DECSRC_INT,
1430         }, {
1431                 .reg    = RC632_REG_DECODER_CONTROL,
1432                 .val    = RC632_DECCTRL_MANCHESTER |
1433                           RC632_DECCTRL_RX_INVERT |
1434                           RC632_DECCTRL_ZEROAFTERCOL |
1435                           RC632_DECCTRL_RXFR_15693,
1436         }, {
1437                 .reg    = RC632_REG_BIT_PHASE,
1438                 /* FIXME: nxp default for icode1/15693: 0x54 */
1439                 //.val  = 0x52,
1440                 .val    = 0xd0, /* omnikey */
1441         }, {
1442                 .reg    = RC632_REG_RX_THRESHOLD,
1443                 /* FIXME: nxp default for icode1/15693: 0x68 */
1444                 //.val  = 0x66,
1445                 .val    = 0xed,
1446         }, {
1447                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1448                 .val    = 0x00,
1449         }, {
1450                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1451                 .val    = RC632_CR_RX_CRC_ENABLE |
1452                           RC632_CR_TX_CRC_ENABLE |
1453                           RC632_CR_CRC3309,
1454         }, {
1455                 .reg    = RC632_REG_CRC_PRESET_LSB,
1456                 .val    = 0xff,
1457         }, {
1458                 .reg    = RC632_REG_CRC_PRESET_MSB,
1459                 .val    = 0xff,
1460         },
1461 };
1462
1463 /* Register file for I*Code standard */
1464 static struct register_file icode1_std_script[] = {
1465         {
1466                 .reg    = RC632_REG_TX_CONTROL,
1467                 .val    = RC632_TXCTRL_MOD_SRC_INT |
1468                           RC632_TXCTRL_TX2_INV |
1469                           RC632_TXCTRL_TX2_RF_EN |
1470                           RC632_TXCTRL_TX1_RF_EN,
1471         }, {
1472                 .reg    = RC632_REG_CW_CONDUCTANCE,
1473                 .val    = 0x3f,
1474         }, {
1475                 .reg    = RC632_REG_MOD_CONDUCTANCE,
1476                 /* FIXME: nxp default for icode1/15693: 0x05 */
1477                 .val    = 0x02,
1478         }, {
1479                 .reg    = RC632_REG_CODER_CONTROL,
1480                 .val    = RC632_CDRCTRL_TXCD_ICODE_STD |
1481                           RC632_CDRCTRL_RATE_15693,
1482         }, {
1483                 .reg    = RC632_REG_MOD_WIDTH,
1484                 .val    = 0x3f,
1485         }, {
1486                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1487                 .val    = 0x3f,
1488         }, {
1489                 .reg    = RC632_REG_TYPE_B_FRAMING,
1490                 .val    = 0x00,
1491         }, {
1492                 .reg    = RC632_REG_RX_CONTROL1,
1493                 .val    = RC632_RXCTRL1_ISO15693 |
1494                           RC632_RXCTRL1_SUBCP_16 |
1495                           RC632_RXCTRL1_GAIN_35DB,
1496         }, {
1497                 /* FIXME: this should always be the case */
1498                 .reg    = RC632_REG_RX_CONTROL2,
1499                 .val    = RC632_RXCTRL2_DECSRC_INT,
1500         }, {
1501                 .reg    = RC632_REG_DECODER_CONTROL,
1502                 .val    = RC632_DECCTRL_MANCHESTER |
1503                           RC632_DECCTRL_RXFR_ICODE,
1504         }, {
1505                 .reg    = RC632_REG_BIT_PHASE,
1506                 /* FIXME: nxp default for icode1/15693: 0x54 */
1507                 .val    = 0x52,
1508         }, {
1509                 .reg    = RC632_REG_RX_THRESHOLD,
1510                 /* FIXME: nxp default for icode1/15693: 0x68 */
1511                 .val    = 0x66,
1512         }, {
1513                 .reg    = RC632_REG_BPSK_DEM_CONTROL,
1514                 .val    = 0x00,
1515         }, {
1516                 .reg    = RC632_REG_CHANNEL_REDUNDANCY,
1517                 /* 16bit CRC, no parity, not CRC3309 */
1518                 .val    = RC632_CR_RX_CRC_ENABLE |
1519                           RC632_CR_TX_CRC_ENABLE,
1520         }, {
1521                 .reg    = RC632_REG_CRC_PRESET_LSB,
1522                 .val    = 0xfe,
1523         }, {
1524                 .reg    = RC632_REG_CRC_PRESET_MSB,
1525                 .val    = 0xff,
1526         }
1527 };
1528
1529 /* incremental changes on top of icode1_std_script */
1530 static struct register_file icode1_fast_patch[] = {
1531         {
1532                 .reg    = RC632_REG_CODER_CONTROL,
1533                 .val    = RC632_CDRCTRL_TXCD_ICODE_FAST |
1534                           RC632_CDRCTRL_RATE_ICODE_FAST,
1535         }, {
1536                 .reg    = RC632_REG_MOD_WIDTH_SOF,
1537                 .val    = 0x73, /* 18.88uS */
1538         },
1539 };
1540
1541
1542 static int
1543 rc632_iso15693_init(struct rfid_asic_handle *h)
1544 {
1545         int ret;
1546
1547         /* flush fifo (our way) */
1548         ret = rc632_reg_write(h, RC632_REG_CONTROL,
1549                               RC632_CONTROL_FIFO_FLUSH);
1550         if (ret < 0)
1551                 return ret;
1552
1553         ret = rc632_execute_script(h, iso15693_fast_script,
1554                                    ARRAY_SIZE(iso15693_fast_script));
1555         if (ret < 0)
1556                 return ret;
1557
1558         return 0;
1559 }
1560
1561 static int
1562 rc632_iso15693_icode1_init(struct rfid_asic_handle *h)
1563 {
1564         int ret;
1565
1566         ret = rc632_execute_script(h, icode1_std_script,
1567                                    ARRAY_SIZE(icode1_std_script));
1568         if (ret < 0)
1569                 return ret;
1570
1571         /* FIXME: how to configure fast/slow properly? */
1572 #if 0
1573         if (fast) {
1574                 ret = rc632_execute_script(h, icode1_fast_patch,
1575                                            ARRAY_SIZE(icode1_fast_patch));
1576                 if (ret < 0)
1577                         return ret;
1578         }
1579 #endif
1580
1581         return 0;
1582 }
1583
1584 static int
1585 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1586 {
1587         int ret;
1588
1589         /* ICL */
1590
1591         ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1592                                                 (RC632_TXCTRL_MOD_SRC_INT |
1593                                                  RC632_TXCTRL_TX2_INV |
1594                                                  RC632_TXCTRL_TX2_RF_EN |
1595                                                  RC632_TXCTRL_TX1_RF_EN));
1596         if (ret < 0)
1597                 return ret;
1598
1599         ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1600         if (ret < 0)
1601                 return ret;
1602
1603         ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1604         if (ret < 0)
1605                 return ret;
1606
1607         ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1608                                                 (RC632_CDRCTRL_RATE_15693 |
1609                                                  RC632_CDRCTRL_TXCD_ICODE_STD |
1610                                                  0x03)); /* FIXME */
1611         if (ret < 0)
1612                 return ret;
1613
1614         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1615         if (ret < 0)
1616                 return ret;
1617
1618         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1619         if (ret < 0)
1620                 return ret;
1621         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1622                                                 (RC632_RXCTRL1_SUBCP_16|
1623                                                  RC632_RXCTRL1_ISO15693|
1624                                                  RC632_RXCTRL1_GAIN_35DB));
1625         if (ret < 0)
1626                 return ret;
1627         ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1628                                                 (RC632_DECCTRL_RX_INVERT|
1629                                                  RC632_DECCTRL_RXFR_15693));
1630         if (ret < 0)
1631                 return ret;
1632
1633         ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1634         if (ret < 0)
1635                 return ret;
1636
1637         ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1638         if (ret < 0)
1639                 return ret;
1640
1641         ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1642         if (ret < 0)
1643                 return ret;
1644
1645         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1646                                                 RC632_RXCTRL2_DECSRC_INT);
1647         if (ret < 0)
1648                 return ret;
1649
1650         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1651         if (ret < 0)
1652                 return ret;
1653
1654         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1655         if (ret < 0)
1656                 return ret;
1657
1658         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1659         if (ret < 0)
1660                 return ret;
1661
1662         return 0;
1663 }
1664
1665 static void uuid_reversecpy(unsigned char* out, unsigned char* in, int len)
1666 {
1667         int i = 0;
1668         while (len > 0) {
1669                 out[i] = in[len];
1670                 len--;
1671                 i++;
1672         }
1673 }
1674
1675 static int
1676 rc632_iso15693_transceive_ac(struct rfid_asic_handle *handle,
1677                              const struct iso15693_anticol_cmd *acf,
1678                              unsigned int acf_len,
1679                              struct iso15693_anticol_resp *resp,
1680                              unsigned int *rx_len, char *bit_of_col)
1681 {
1682         u_int8_t error_flag, boc;
1683         //u_int8_t rx_len;
1684
1685         int ret, tx_len, mask_len_bytes;
1686         unsigned int rate = ISO15693_T_SLOW;
1687
1688         if (acf->req.flags & RFID_15693_F_RATE_HIGH)
1689                 rate = ISO15693_T_FAST;
1690
1691         DEBUGP("acf = %s\n", rfid_hexdump(acf, acf_len));
1692
1693         ret = rc632_transceive(handle, (u_int8_t *)acf, acf_len,
1694                                (u_int8_t *) resp, rx_len,
1695                                iso15693_timing[rate][ISO15693_T1], 0);
1696         if (ret == -ETIMEDOUT)
1697                 return ret;
1698
1699         /* determine whether there was a collission */
1700         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1701         if (ret < 0)
1702                 return ret;
1703         DEBUGP_ERROR_FLAG(error_flag);
1704
1705         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1706                 /* retrieve bit of collission */
1707                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1708                 if (ret < 0)
1709                         return ret;
1710                 *bit_of_col = boc;
1711         }
1712
1713         return 0;
1714
1715 #if 0
1716         *bit_of_col = 0;
1717
1718         mask_len_bytes = (acf->mask_len % 8) ? acf->mask_len/8+1 : acf->mask_len/8;
1719
1720         if (acf->current_slot == 0) {
1721                 /* first call: transmit Inventory frame */
1722                 DEBUGP("first_frame\n");
1723
1724                 tx_len = sizeof(struct iso15693_request) + 1 + mask_len_bytes;
1725
1726                 ret = rc632_transceive(handle, (u_int8_t *)&req, tx_len,
1727                                         (u_int8_t *)&rx_buf, &rx_len, ISO15693_T1, 0);
1728                 acf->current_slot = 1;
1729                 DEBUGP("rc632_transceive ret: %d rx_len: %d\n",ret,rx_len);
1730                 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1731                         return ret;     */
1732
1733         } else {
1734                 /* second++ call: end timeslot with EOFpulse and read */
1735                 DEBUGP("second++_frame\n");
1736                 if ((acf->current_slot > 16) ||
1737                     ((acf->flags & RFID_15693_F5_NSLOTS_1 == 0)
1738                                         && (acf->current_slot > 1))) {
1739
1740                         memset(uuid, 0, ISO15693_UID_LEN);
1741                         return -1;
1742                 }
1743
1744                 /* reset EOF-pulse-bit to 0 */
1745                 ret = rc632_clear_bits(handle, RC632_REG_CODER_CONTROL,
1746                                        RC632_CDRCTRL_15693_EOF_PULSE);
1747                 usleep(50);
1748                 /* generate EOF pulse */
1749                 ret = rc632_set_bits(handle, RC632_REG_CODER_CONTROL,
1750                                      RC632_CDRCTRL_15693_EOF_PULSE);
1751                 if (ret < 0)
1752                         return ret;
1753                 // DEBUGP("waiting for EOF pulse\n");
1754                 // ret = rc632_wait_idle(handle, 10); //wait for idle
1755
1756                 rx_len = sizeof(rx_buf);
1757                 ret = rc632_receive(handle, (u_int8_t*)&rx_buf, &rx_len, ISO15693_T3);
1758                 DEBUGP("rc632_receive ret: %d rx_len: %d\n", ret, rx_len);
1759                 acf->current_slot++;
1760
1761                 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1762                         return ret; */
1763         }
1764
1765         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
1766         DEBUGP_STATUS_FLAG(tmp);
1767
1768         if (ret == -ETIMEDOUT) {
1769                 /* no VICC answer in this timeslot*/
1770                 memset(uuid, 0, ISO15693_UID_LEN);
1771                 return -ETIMEDOUT;
1772         } else {
1773                 /* determine whether there was a collission */
1774                 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1775                 DEBUGP_ERROR_FLAG(error_flag);
1776                 if (ret < 0)
1777                         return ret;
1778
1779                 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1780                         /* retrieve bit of collission */
1781                         ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1782                         if (ret < 0)
1783                                 return ret;
1784                         *bit_of_col = boc;
1785                         memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1786                         // uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1787                         DEBUGP("Collision in slot %d bit %d\n",
1788                                 acf->current_slot,boc);
1789                         return -ECOLLISION;
1790                 } else {
1791                         /* no collision-> retrieve uuid */
1792                         DEBUGP("no collision in slot %d\n", acf->current_slot);
1793                         memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1794                         //uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1795                 }
1796         }
1797
1798         return 0;
1799 #endif
1800 }
1801
1802 struct mifare_authcmd {
1803         u_int8_t auth_cmd;
1804         u_int8_t block_address;
1805         u_int32_t serno;        /* lsb 1 2 msb */
1806 } __attribute__ ((packed));
1807
1808
1809 #define RFID_MIFARE_KEY_LEN 6
1810 #define RFID_MIFARE_KEY_CODED_LEN 12
1811
1812 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1813 static int
1814 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1815 {
1816         int i;
1817         u_int8_t ln;
1818         u_int8_t hn;
1819
1820         for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1821                 ln = key6[i] & 0x0f;
1822                 hn = key6[i] >> 4;
1823                 key12[i * 2 + 1] = (~ln << 4) | ln;
1824                 key12[i * 2] = (~hn << 4) | hn;
1825         }
1826         return 0;
1827 }
1828
1829 static int
1830 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1831 {
1832         u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1833         u_int8_t reg;
1834         int ret;
1835
1836         ret = rc632_mifare_transform_key(key, coded_key);
1837         if (ret < 0)
1838                 return ret;
1839
1840         /* Terminate probably running command */
1841         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1842         if (ret < 0)
1843                 return ret;
1844
1845         ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1846         if (ret < 0)
1847                 return ret;
1848
1849         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1850         if (ret < 0)
1851                 return ret;
1852
1853         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1854         if (ret < 0)
1855                 return ret;
1856
1857         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1858         ret = rc632_wait_idle_timer(h);
1859         if (ret < 0)
1860                 return ret;
1861
1862         ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, &reg);
1863         if (ret < 0)
1864                 return ret;
1865
1866         if (reg & RC632_ERR_FLAG_KEY_ERR)
1867                 return -EINVAL;
1868
1869         return 0;
1870 }
1871
1872 static int
1873 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1874                   u_int8_t block)
1875 {
1876         int ret;
1877         struct mifare_authcmd acmd;
1878         u_int8_t reg;
1879
1880         if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B) {
1881                 DEBUGP("invalid auth command\n");
1882                 return -EINVAL;
1883         }
1884
1885         /* Initialize acmd */
1886         acmd.block_address = block & 0xff;
1887         acmd.auth_cmd = cmd;
1888         //acmd.serno = htonl(serno);
1889         acmd.serno = serno;
1890
1891 #if 1
1892         /* Clear Rx CRC */
1893         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1894                                 RC632_CR_RX_CRC_ENABLE);
1895 #else
1896         /* Clear Rx CRC, Set Tx CRC and Odd Parity */
1897         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1898                                 RC632_CR_TX_CRC_ENABLE | RC632_CR_PARITY_ODD |
1899                                 RC632_CR_PARITY_ENABLE);
1900 #endif
1901         if (ret < 0)
1902                 return ret;
1903
1904         /* Send Authent1 Command */
1905         ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1906         if (ret < 0)
1907                 return ret;
1908
1909         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1910         if (ret < 0) {
1911                 DEBUGP("error during AUTHENT1");
1912                 return ret;
1913         }
1914
1915         /* Wait until transmitter is idle */
1916         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1917         if (ret < 0)
1918                 return ret;
1919
1920         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1921         ret = rc632_wait_idle_timer(h);
1922         if (ret < 0)
1923                 return ret;
1924
1925         ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, &reg);
1926         if (ret < 0)
1927                 return ret;
1928         if (reg & 0x07) {
1929                 DEBUGP("bitframe?");
1930                 return -EIO;
1931         }
1932
1933         /* Clear Tx CRC */
1934         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1935                                 RC632_CR_TX_CRC_ENABLE);
1936         if (ret < 0)
1937                 return ret;
1938
1939         /* Wait until transmitter is idle */
1940         ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1941         if (ret < 0)
1942                 return ret;
1943
1944         /* Send Authent2 Command */
1945         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1946         if (ret < 0)
1947                 return ret;
1948
1949         /* Wait until transmitter is idle */
1950         //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1951         ret = rc632_wait_idle_timer(h);
1952         if (ret < 0)
1953                 return ret;
1954
1955         /* Check whether authentication was successful */
1956         ret = rc632_reg_read(h, RC632_REG_CONTROL, &reg);
1957         if (ret < 0)
1958                 return ret;
1959
1960         if (!(reg & RC632_CONTROL_CRYPTO1_ON)) {
1961                 DEBUGP("authentication not successful");
1962                 return -EACCES;
1963         }
1964
1965         return 0;
1966 }
1967
1968 /* transceive regular frame */
1969 static int
1970 rc632_mifare_transceive(struct rfid_asic_handle *handle,
1971                         const u_int8_t *tx_buf, unsigned int tx_len,
1972                         u_int8_t *rx_buf, unsigned int *rx_len,
1973                         u_int64_t timeout, unsigned int flags)
1974 {
1975         int ret;
1976         u_int8_t rxl = *rx_len & 0xff;
1977
1978         DEBUGP("entered\n");
1979         memset(rx_buf, 0, *rx_len);
1980
1981 #if 1
1982         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1983                                 (RC632_CR_PARITY_ENABLE |
1984                                  RC632_CR_PARITY_ODD |
1985                                  RC632_CR_TX_CRC_ENABLE |
1986                                  RC632_CR_RX_CRC_ENABLE));
1987 #else
1988         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1989                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1990 #endif
1991         if (ret < 0)
1992                 return ret;
1993
1994         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1995         *rx_len = rxl;
1996         if (ret < 0)
1997                 return ret;
1998
1999
2000         return 0;
2001 }
2002
2003
2004 static int
2005 rc632_layer2_init(struct rfid_asic_handle *h, enum rfid_layer2_id l2)
2006 {
2007         switch (l2) {
2008         case RFID_LAYER2_ISO14443A:
2009                 return rc632_iso14443a_init(h);
2010         case RFID_LAYER2_ISO14443B:
2011                 return rc632_iso14443b_init(h);
2012         case RFID_LAYER2_ISO15693:
2013                 return rc632_iso15693_init(h);
2014         case RFID_LAYER2_ICODE1:
2015                 return rc632_iso15693_icode1_init(h);
2016         default:
2017                 return -EINVAL;
2018         }
2019 }
2020
2021 const struct rfid_asic rc632 = {
2022         .name   = "Philips CL RC632",
2023         .fc     = ISO14443_FREQ_CARRIER,
2024         .priv.rc632 = {
2025                 .fn = {
2026                         .power = &rc632_power,
2027                         .rf_power = &rc632_rf_power,
2028                         .transceive = &rc632_iso14443ab_transceive,
2029                         .init = &rc632_layer2_init,
2030                         .iso14443a = {
2031                                 .transceive_sf = &rc632_iso14443a_transceive_sf,
2032                                 .transceive_acf = &rc632_iso14443a_transceive_acf,
2033                                 .set_speed = &rc632_iso14443a_set_speed,
2034                         },
2035                         .iso15693 = {
2036                                 .transceive_ac = &rc632_iso15693_transceive_ac,
2037                         },
2038                         .mifare_classic = {
2039                                 .setkey = &rc632_mifare_set_key,
2040                                 .auth = &rc632_mifare_auth,
2041                         },
2042                 },
2043         },
2044 };