1 /* Generic Philips CL RC632 Routines
3 * (C) Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <sys/types.h>
28 #include <librfid/rfid.h>
29 #include <librfid/rfid_asic.h>
30 #include <librfid/rfid_asic_rc632.h>
31 #include <librfid/rfid_reader_cm5121.h>
32 #include <librfid/rfid_layer2_iso14443a.h>
33 #include <librfid/rfid_protocol_mifare_classic.h>
35 #include "rfid_iso14443_common.h"
37 //#include "rc632_14443a.h"
40 #define RC632_TMO_AUTH1 14000
42 #define ENTER() DEBUGP("entering\n")
43 struct rfid_asic rc632;
45 /* Register and FIFO Access functions */
47 rc632_reg_write(struct rfid_asic_handle *handle,
51 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
55 rc632_reg_read(struct rfid_asic_handle *handle,
59 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
63 rc632_fifo_write(struct rfid_asic_handle *handle,
68 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
73 rc632_fifo_read(struct rfid_asic_handle *handle,
77 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
82 rc632_set_bits(struct rfid_asic_handle *handle,
89 ret = rc632_reg_read(handle, reg, &tmp);
93 /* if bits are already set, no need to set them again */
94 if ((tmp & val) == val)
97 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
100 rc632_set_bit_mask(struct rfid_asic_handle *handle,
101 u_int8_t reg, u_int8_t mask, u_int8_t val)
106 ret = rc632_reg_read(handle, reg, &tmp);
110 /* if bits are already like we want them, abort */
111 if ((tmp & mask) == val)
114 return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
118 rc632_clear_bits(struct rfid_asic_handle *handle,
125 ret = rc632_reg_read(handle, reg, &tmp);
127 DEBUGP("error during reg_read(%p, %d):%d\n",
131 /* if bits are already cleared, no need to clear them again */
132 if ((tmp & val) == 0)
135 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
139 rc632_turn_on_rf(struct rfid_asic_handle *handle)
142 return rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
146 rc632_turn_off_rf(struct rfid_asic_handle *handle)
149 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
153 rc632_power_up(struct rfid_asic_handle *handle)
156 return rc632_clear_bits(handle, RC632_REG_CONTROL,
157 RC632_CONTROL_POWERDOWN);
161 rc632_power_down(struct rfid_asic_handle *handle)
163 return rc632_set_bits(handle, RC632_REG_CONTROL,
164 RC632_CONTROL_POWERDOWN);
167 /* calculate best 8bit prescaler and divisor for given usec timeout */
168 static int best_prescaler(u_int64_t timeout, u_int8_t *prescaler,
171 u_int8_t best_prescaler, best_divisor, i;
172 int64_t smallest_diff;
174 smallest_diff = 0x7fffffffffffffff;
177 for (i = 0; i < 21; i++) {
178 u_int64_t clk, tmp_div, res;
180 clk = 13560000 / (1 << i);
181 tmp_div = (clk * timeout) / 1000000;
184 if ((tmp_div > 0xff) || (tmp_div > clk))
187 res = 1000000 / (clk / tmp_div);
188 diff = res - timeout;
193 if (diff < smallest_diff) {
195 best_divisor = tmp_div;
196 smallest_diff = diff;
200 *prescaler = best_prescaler;
201 *divisor = best_divisor;
203 DEBUGP("timeout %u usec, prescaler = %u, divisor = %u\n",
204 timeout, best_prescaler, best_divisor);
210 rc632_timer_set(struct rfid_asic_handle *handle,
214 u_int8_t prescaler, divisor;
216 ret = best_prescaler(timeout, &prescaler, &divisor);
218 ret = rc632_reg_write(handle, RC632_REG_TIMER_CLOCK,
223 ret = rc632_reg_write(handle, RC632_REG_TIMER_CONTROL,
224 RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
226 /* clear timer irq bit */
227 ret = rc632_set_bits(handle, RC632_REG_INTERRUPT_RQ, RC632_IRQ_TIMER);
229 ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
234 /* Wait until RC632 is idle or TIMER IRQ has happened */
235 static rc632_wait_idle_timer(struct rfid_asic_handle *handle)
241 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &irq);
242 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &irq);
243 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
247 /* FIXME: currently we're lazy: If we actually received
248 * something even after the timer expired, we accept it */
249 if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
251 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
253 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
258 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
265 /* poll every millisecond */
270 /* Stupid RC632 implementations don't evaluate interrupts but poll the
271 * command register for "status idle" */
273 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
277 #define USLEEP_PER_CYCLE 128
280 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
285 /* FIXME: read second time ?? */
291 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
293 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
296 /* Abort after some timeout */
297 if (cycles > timeout*100/USLEEP_PER_CYCLE) {
302 usleep(USLEEP_PER_CYCLE);
309 rc632_transmit(struct rfid_asic_handle *handle,
315 const u_int8_t *cur_buf = buf;
323 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
327 if (cur_buf == buf) {
328 /* only start transmit first time */
329 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
336 if (cur_buf < buf + len) {
337 cur_len = buf - cur_buf;
345 return rc632_wait_idle(handle, timeout);
349 tcl_toggle_pcb(struct rfid_asic_handle *handle)
351 // FIXME: toggle something between 0x0a and 0x0b
356 rc632_transceive(struct rfid_asic_handle *handle,
357 const u_int8_t *tx_buf,
365 const u_int8_t *cur_tx_buf = tx_buf;
367 DEBUGP("timer = %u\n", timer);
374 ret = rc632_timer_set(handle, timer*10);
378 ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00);
379 /* clear all interrupts */
380 ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
383 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
387 if (cur_tx_buf == tx_buf) {
388 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
389 RC632_CMD_TRANSCEIVE);
394 cur_tx_buf += cur_tx_len;
395 if (cur_tx_buf < tx_buf + tx_len) {
397 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
402 cur_tx_len = 64 - fifo_fill;
403 printf("refilling tx fifo with %u bytes\n", cur_tx_len);
407 } while (cur_tx_len);
410 tcl_toggle_pcb(handle);
412 //ret = rc632_wait_idle_timer(handle);
413 ret = rc632_wait_idle(handle, timer);
417 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, rx_len);
424 DEBUGP("rx_len == 0\n");
426 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
427 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
432 return rc632_fifo_read(handle, *rx_len, rx_buf);
436 rc632_read_eeprom(struct rfid_asic_handle *handle)
438 u_int8_t recvbuf[60];
446 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
450 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
456 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
460 // FIXME: do something with eeprom contents
465 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
467 u_int8_t sndbuf[2] = { 0x01, 0x02 };
468 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
471 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
475 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
479 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
483 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
487 usleep(10000); // FIXME: no checking for cmd completion?
489 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
493 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
497 // FIXME: what to do with crc result?
503 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
508 for (i = 0; i <= 0x3f; i++) {
509 ret = rc632_reg_read(handle, i, &buf[i]);
510 // do we want error checks?
517 /* generic FIFO access functions (if no more efficient ones provided by
518 * transport driver) */
523 // FIXME: implementation (not needed for CM 5121)
530 // FIXME: implementation (not neded for CM 5121)
535 rc632_init(struct rfid_asic_handle *ah)
539 /* switch off rf (make sure PICCs are reset at init time) */
540 ret = rc632_power_down(ah);
547 ret = rc632_power_up(ah);
551 /* disable register paging */
552 ret = rc632_reg_write(ah, 0x00, 0x00);
556 /* set some sane default values */
557 ret = rc632_reg_write(ah, 0x11, 0x5b);
562 ret = rc632_turn_on_rf(ah);
570 rc632_fini(struct rfid_asic_handle *ah)
575 ret = rc632_turn_off_rf(ah);
579 ret = rc632_power_down(ah);
586 struct rfid_asic_handle *
587 rc632_open(struct rfid_asic_transport_handle *th)
589 struct rfid_asic_handle *h;
591 h = malloc(sizeof(*h));
594 memset(h, 0, sizeof(*h));
599 /* FIXME: this is only cm5121 specific, since the latency
600 * down to the RC632 FIFO is too long to refill during TX/RX */
601 h->mtu = h->mru = 64;
603 if (rc632_init(h) < 0) {
612 rc632_close(struct rfid_asic_handle *h)
620 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
622 * (C) 2005 by Harald Welte <laforge@gnumonks.org>
627 rc632_iso14443a_init(struct rfid_asic_handle *handle)
631 // FIXME: some fifo work (drain fifo?)
633 /* flush fifo (our way) */
634 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
636 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
637 (RC632_TXCTRL_TX1_RF_EN |
638 RC632_TXCTRL_TX2_RF_EN |
639 RC632_TXCTRL_TX2_INV |
640 RC632_TXCTRL_FORCE_100_ASK |
641 RC632_TXCTRL_MOD_SRC_INT));
645 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
646 CM5121_CW_CONDUCTANCE);
650 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
651 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
652 CM5121_MOD_CONDUCTANCE);
656 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
657 (RC632_CDRCTRL_TXCD_14443A |
658 RC632_CDRCTRL_RATE_106K));
662 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
666 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
670 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
674 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
675 (RC632_RXCTRL1_GAIN_35DB |
676 RC632_RXCTRL1_ISO14443 |
677 RC632_RXCTRL1_SUBCP_8));
681 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
682 (RC632_DECCTRL_MANCHESTER |
683 RC632_DECCTRL_RXFR_14443A));
687 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
688 CM5121_14443A_BITPHASE);
692 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
693 CM5121_14443A_THRESHOLD);
697 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
701 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
702 (RC632_RXCTRL2_DECSRC_INT |
703 RC632_RXCTRL2_CLK_Q));
707 /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
708 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
712 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
713 (RC632_CR_PARITY_ENABLE |
714 RC632_CR_PARITY_ODD));
718 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
722 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
730 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
734 ret = rc632_turn_off_rf(handle);
744 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
746 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
748 struct iso14443a_atqa *atqa)
754 memset(atqa, 0, sizeof(atqa));
758 /* transfer only 7 bits of last byte in frame */
759 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
763 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
764 RC632_CONTROL_CRYPTO1_ON);
769 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
770 (RC632_CR_PARITY_ENABLE |
771 RC632_CR_PARITY_ODD));
773 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
774 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
780 ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
781 (u_int8_t *)atqa, &rx_len,
782 ISO14443A_FDT_ANTICOL_LAST1, 0);
784 DEBUGP("error during rc632_transceive()\n");
788 /* switch back to normal 8bit last byte */
789 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
794 DEBUGP("rx_len(%d) != 2\n", rx_len);
801 /* transceive regular frame */
803 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
804 unsigned int frametype,
805 const u_int8_t *tx_buf, unsigned int tx_len,
806 u_int8_t *rx_buf, unsigned int *rx_len,
807 u_int64_t timeout, unsigned int flags)
810 u_int8_t rxl = *rx_len & 0xff;
811 u_int8_t channel_red;
813 memset(rx_buf, 0, *rx_len);
816 case RFID_14443A_FRAME_REGULAR:
817 case RFID_MIFARE_FRAME:
818 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
819 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
821 case RFID_14443B_FRAME_REGULAR:
822 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
826 case RFID_MIFARE_FRAME:
827 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
834 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
839 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, timeout, 0);
848 /* transceive anti collission bitframe */
850 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
851 struct iso14443a_anticol_cmd *acf,
852 unsigned int *bit_of_col)
856 u_int8_t rx_len = sizeof(rx_buf);
857 u_int8_t rx_align = 0, tx_last_bits, tx_bytes;
860 *bit_of_col = ISO14443A_BITOFCOL_NONE;
861 memset(rx_buf, 0, sizeof(rx_buf));
863 /* disable mifare cryto */
864 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
865 RC632_CONTROL_CRYPTO1_ON);
869 /* disable CRC summing */
871 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
872 (RC632_CR_PARITY_ENABLE |
873 RC632_CR_PARITY_ODD));
875 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
876 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
881 tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
882 tx_bytes = acf->nvb >> 4;
885 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
888 //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
890 /* set RxAlign and TxLastBits*/
891 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
892 (rx_align << 4) | (tx_last_bits));
896 ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes,
897 rx_buf, &rx_len, 0x32, 0);
901 /* bitwise-OR the two halves of the split byte */
902 acf->uid_bits[tx_bytes-2] = (
903 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
906 memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
908 /* determine whether there was a collission */
909 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
913 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
914 /* retrieve bit of collission */
915 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
919 /* bit of collission relative to start of part 1 of
920 * anticollision frame (!) */
921 *bit_of_col = 2*8 + boc;
928 RC632_RATE_106 = 0x00,
929 RC632_RATE_212 = 0x01,
930 RC632_RATE_424 = 0x02,
931 RC632_RATE_848 = 0x03,
935 u_int8_t subc_pulses;
937 u_int8_t rx_threshold;
938 u_int8_t bpsk_dem_ctrl;
946 static struct rx_config rx_configs[] = {
948 .subc_pulses = RC632_RXCTRL1_SUBCP_8,
949 .rx_coding = RC632_DECCTRL_MANCHESTER,
950 .rx_threshold = 0x88,
951 .bpsk_dem_ctrl = 0x00,
954 .subc_pulses = RC632_RXCTRL1_SUBCP_4,
955 .rx_coding = RC632_DECCTRL_BPSK,
956 .rx_threshold = 0x50,
957 .bpsk_dem_ctrl = 0x0c,
960 .subc_pulses = RC632_RXCTRL1_SUBCP_2,
961 .rx_coding = RC632_DECCTRL_BPSK,
962 .rx_threshold = 0x50,
963 .bpsk_dem_ctrl = 0x0c,
966 .subc_pulses = RC632_RXCTRL1_SUBCP_1,
967 .rx_coding = RC632_DECCTRL_BPSK,
968 .rx_threshold = 0x50,
969 .bpsk_dem_ctrl = 0x0c,
973 static struct tx_config tx_configs[] = {
975 .rate = RC632_CDRCTRL_RATE_106K,
979 .rate = RC632_CDRCTRL_RATE_212K,
983 .rate = RC632_CDRCTRL_RATE_424K,
987 .rate = RC632_CDRCTRL_RATE_848K,
992 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
1002 if (rate > ARRAY_SIZE(rx_configs))
1005 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
1006 RC632_RXCTRL1_SUBCP_MASK,
1007 rx_configs[rate].subc_pulses);
1011 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
1013 rx_configs[rate].rx_coding);
1017 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1018 rx_configs[rate].rx_threshold);
1022 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
1023 rc = rc632_reg_write(handle,
1024 RC632_REG_BPSK_DEM_CONTROL,
1025 rx_configs[rate].bpsk_dem_ctrl);
1031 if (rate > ARRAY_SIZE(tx_configs))
1034 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
1035 RC632_CDRCTRL_RATE_MASK,
1036 tx_configs[rate].rate);
1040 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
1041 tx_configs[rate].mod_width);
1049 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
1053 // FIXME: some FIFO work
1055 /* flush fifo (our way) */
1056 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
1060 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
1061 (RC632_TXCTRL_TX1_RF_EN |
1062 RC632_TXCTRL_TX2_RF_EN |
1063 RC632_TXCTRL_TX2_INV |
1064 RC632_TXCTRL_MOD_SRC_INT));
1068 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
1072 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
1076 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
1077 (RC632_CDRCTRL_TXCD_NRZ |
1078 RC632_CDRCTRL_RATE_14443B));
1082 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
1086 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1090 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
1091 (RC632_TBFRAMING_SOF_11L_3H |
1092 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1093 RC632_TBFRAMING_EOF_11));
1097 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
1098 (RC632_RXCTRL1_GAIN_35DB |
1099 RC632_RXCTRL1_ISO14443 |
1100 RC632_RXCTRL1_SUBCP_8));
1104 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
1105 (RC632_DECCTRL_BPSK |
1106 RC632_DECCTRL_RXFR_14443B));
1110 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
1111 CM5121_14443B_BITPHASE);
1115 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1116 CM5121_14443B_THRESHOLD);
1120 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1121 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1122 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1123 RC632_BPSKD_FILTER_AMP_DETECT |
1124 RC632_BPSKD_NO_RX_EOF |
1125 RC632_BPSKD_NO_RX_EGT));
1129 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1130 (RC632_RXCTRL2_AUTO_PD |
1131 RC632_RXCTRL2_DECSRC_INT));
1135 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1139 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1140 (RC632_CR_TX_CRC_ENABLE |
1141 RC632_CR_RX_CRC_ENABLE |
1146 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1150 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1158 rc632_iso15693_init(struct rfid_asic_handle *h)
1162 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1163 (RC632_TXCTRL_MOD_SRC_INT |
1164 RC632_TXCTRL_TX2_INV |
1165 RC632_TXCTRL_TX2_RF_EN |
1166 RC632_TXCTRL_TX1_RF_EN));
1170 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1174 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x03);
1178 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1179 (RC632_CDRCTRL_RATE_15693 |
1184 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1188 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1192 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1196 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1197 (RC632_RXCTRL1_SUBCP_16 |
1198 RC632_RXCTRL1_ISO15693 |
1199 RC632_RXCTRL1_GAIN_35DB));
1203 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1204 (RC632_DECCTRL_RXFR_15693 |
1205 RC632_DECCTRL_RX_INVERT));
1209 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xe0);
1213 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1217 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1221 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1222 (RC632_RXCTRL2_AUTO_PD |
1223 RC632_RXCTRL2_DECSRC_INT));
1227 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1229 RC632_CR_RX_CRC_ENABLE |
1230 RC632_CR_TX_CRC_ENABLE));
1234 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xff);
1238 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1246 rc632_iso15693_icode_init(struct rfid_asic_handle *h)
1250 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1251 (RC632_TXCTRL_MOD_SRC_INT |
1252 RC632_TXCTRL_TX2_INV |
1253 RC632_TXCTRL_TX2_RF_EN |
1254 RC632_TXCTRL_TX1_RF_EN));
1258 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1262 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x02);
1266 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL, 0x2c);
1270 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1274 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1278 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1282 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1286 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1, 0x8b); /* FIXME */
1290 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL, 0x00);
1294 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0x52);
1298 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0x66);
1302 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1306 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1307 RC632_RXCTRL2_DECSRC_INT);
1311 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1312 (RC632_CR_RX_CRC_ENABLE |
1313 RC632_CR_TX_CRC_ENABLE));
1314 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xfe);
1318 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1326 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1332 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1333 (RC632_TXCTRL_MOD_SRC_INT |
1334 RC632_TXCTRL_TX2_INV |
1335 RC632_TXCTRL_TX2_RF_EN |
1336 RC632_TXCTRL_TX1_RF_EN));
1340 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1344 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1348 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1349 (RC632_CDRCTRL_RATE_15693 |
1350 RC632_CDRCTRL_TXCD_ICODE_STD |
1355 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1359 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1362 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1363 (RC632_RXCTRL1_SUBCP_16|
1364 RC632_RXCTRL1_ISO15693|
1365 RC632_RXCTRL1_GAIN_35DB));
1368 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1369 (RC632_DECCTRL_RX_INVERT|
1370 RC632_DECCTRL_RXFR_15693));
1374 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1378 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1382 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1386 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1387 RC632_RXCTRL2_DECSRC_INT);
1391 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1395 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1399 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1406 struct mifare_authcmd {
1408 u_int8_t block_address;
1409 u_int32_t serno; /* lsb 1 2 msb */
1410 } __attribute__ ((packed));
1413 #define RFID_MIFARE_KEY_LEN 6
1414 #define RFID_MIFARE_KEY_CODED_LEN 12
1416 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1418 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1424 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1425 ln = key6[i] & 0x0f;
1427 key12[i * 2 + 1] = (~ln << 4) | ln;
1428 key12[i * 2] = (~hn << 4) | hn;
1434 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1436 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1440 ret = rc632_mifare_transform_key(key, coded_key);
1444 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1448 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1452 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1456 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1460 if (reg & RC632_ERR_FLAG_KEY_ERR)
1467 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1471 struct mifare_authcmd acmd;
1474 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B)
1477 /* Initialize acmd */
1478 acmd.block_address = block & 0xff;
1479 acmd.auth_cmd = cmd;
1480 //acmd.serno = htonl(serno);
1484 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1485 RC632_CR_RX_CRC_ENABLE);
1489 /* Send Authent1 Command */
1490 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1494 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1498 /* Wait until transmitter is idle */
1499 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1503 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1510 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1511 RC632_CR_TX_CRC_ENABLE);
1515 /* Send Authent2 Command */
1516 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1520 /* Wait until transmitter is idle */
1521 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1525 /* Check whether authentication was successful */
1526 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1530 if (!(reg & RC632_CONTROL_CRYPTO1_ON))
1537 /* transceive regular frame */
1539 rc632_mifare_transceive(struct rfid_asic_handle *handle,
1540 const u_int8_t *tx_buf, unsigned int tx_len,
1541 u_int8_t *rx_buf, unsigned int *rx_len,
1542 u_int64_t timeout, unsigned int flags)
1545 u_int8_t rxl = *rx_len & 0xff;
1547 DEBUGP("entered\n");
1548 memset(rx_buf, 0, *rx_len);
1551 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1552 (RC632_CR_PARITY_ENABLE |
1553 RC632_CR_PARITY_ODD |
1554 RC632_CR_TX_CRC_ENABLE |
1555 RC632_CR_RX_CRC_ENABLE));
1557 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1558 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1563 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1572 struct rfid_asic rc632 = {
1573 .name = "Philips CL RC632",
1574 .fc = ISO14443_FREQ_CARRIER,
1577 .power_up = &rc632_power_up,
1578 .power_down = &rc632_power_down,
1579 .turn_on_rf = &rc632_turn_on_rf,
1580 .turn_off_rf = &rc632_turn_off_rf,
1581 .transceive = &rc632_iso14443ab_transceive,
1583 .init = &rc632_iso14443a_init,
1584 .transceive_sf = &rc632_iso14443a_transceive_sf,
1585 .transceive_acf = &rc632_iso14443a_transceive_acf,
1586 .set_speed = &rc632_iso14443a_set_speed,
1589 .init = &rc632_iso14443b_init,
1592 .init = &rc632_iso15693_init,
1595 .setkey = &rc632_mifare_set_key,
1596 .auth = &rc632_mifare_auth,