git.rot13.org Git - librfid/blob - src/rfid_asic_rc632.c

   1 /* Generic Philips CL RC632 Routines
   2  *
   3  * (C) Harald Welte <laforge@gnumonks.org>
   4  *
   5  */
   6
   7 /*
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License version 2
  10  *  as published by the Free Software Foundation
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include <unistd.h>
  23 #include <stdlib.h>
  24 #include <string.h>
  25 #include <errno.h>
  26 #include <sys/types.h>
  27
  28 #include <librfid/rfid.h>
  29 #include <librfid/rfid_asic.h>
  30 #include <librfid/rfid_asic_rc632.h>
  31 #include <librfid/rfid_reader_cm5121.h>
  32 #include <librfid/rfid_layer2_iso14443a.h>
  33 #include <librfid/rfid_protocol_mifare_classic.h>
  34
  35 #include "rfid_iso14443_common.h"
  36 #include "rc632.h"
  37 //#include "rc632_14443a.h"
  38
  39
  40 #define RC632_TMO_AUTH1 14000
  41
  42 #define ENTER()         DEBUGP("entering\n")
  43 struct rfid_asic rc632;
  44
  45 /* Register and FIFO Access functions */
  46 static int
  47 rc632_reg_write(struct rfid_asic_handle *handle,
  48                 u_int8_t reg,
  49                 u_int8_t val)
  50 {
  51         return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
  52 }
  53
  54 static int
  55 rc632_reg_read(struct rfid_asic_handle *handle,
  56                u_int8_t reg,
  57                u_int8_t *val)
  58 {
  59         return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
  60 }
  61
  62 static int
  63 rc632_fifo_write(struct rfid_asic_handle *handle,
  64                  u_int8_t len,
  65                  const u_int8_t *buf,
  66                  u_int8_t flags)
  67 {
  68         return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
  69                                                            len, buf, flags);
  70 }
  71
  72 static int
  73 rc632_fifo_read(struct rfid_asic_handle *handle,
  74                 u_int8_t len,
  75                 u_int8_t *buf)
  76 {
  77         return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
  78 }
  79
  80
  81 static int
  82 rc632_set_bits(struct rfid_asic_handle *handle,
  83                 u_int8_t reg,
  84                 u_int8_t val)
  85 {
  86         int ret;
  87         u_int8_t tmp;
  88
  89         ret = rc632_reg_read(handle, reg, &tmp);
  90         if (ret < 0)
  91                 return -1;
  92
  93         /* if bits are already set, no need to set them again */
  94         if ((tmp & val) == val)
  95                 return 0;
  96
  97         return rc632_reg_write(handle, reg, (tmp|val)&0xff);
  98 }
  99 static int
 100 rc632_set_bit_mask(struct rfid_asic_handle *handle,
 101                    u_int8_t reg, u_int8_t mask, u_int8_t val)
 102 {
 103         int ret;
 104         u_int8_t tmp;
 105
 106         ret = rc632_reg_read(handle, reg, &tmp);
 107         if (ret < 0)
 108                 return ret;
 109
 110         /* if bits are already like we want them, abort */
 111         if ((tmp & mask) == val)
 112                 return 0;
 113
 114         return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
 115 }
 116
 117 static int
 118 rc632_clear_bits(struct rfid_asic_handle *handle,
 119                  u_int8_t reg,
 120                  u_int8_t val)
 121 {
 122         int ret;
 123         u_int8_t tmp;
 124
 125         ret = rc632_reg_read(handle, reg, &tmp);
 126         if (ret < 0) {
 127                 DEBUGP("error during reg_read(%p, %d):%d\n",
 128                         handle, reg, ret);
 129                 return -1;
 130         }
 131         /* if bits are already cleared, no need to clear them again */
 132         if ((tmp & val) == 0)
 133                 return 0;
 134
 135         return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
 136 }
 137
 138 static int
 139 rc632_turn_on_rf(struct rfid_asic_handle *handle)
 140 {
 141         ENTER();
 142         return rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
 143 }
 144
 145 static int
 146 rc632_turn_off_rf(struct rfid_asic_handle *handle)
 147 {
 148         ENTER();
 149         return rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
 150 }
 151
 152 static int
 153 rc632_power_up(struct rfid_asic_handle *handle)
 154 {
 155         ENTER();
 156         return rc632_clear_bits(handle, RC632_REG_CONTROL,
 157                                 RC632_CONTROL_POWERDOWN);
 158 }
 159
 160 static int
 161 rc632_power_down(struct rfid_asic_handle *handle)
 162 {
 163         return rc632_set_bits(handle, RC632_REG_CONTROL,
 164                               RC632_CONTROL_POWERDOWN);
 165 }
 166
 167 /* Stupid RC623 implementations don't evaluate interrupts but poll the
 168  * command register for "status idle" */
 169 static int
 170 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
 171 {
 172         u_int8_t cmd = 0xff;
 173         int ret, cycles = 0;
 174 #define USLEEP_PER_CYCLE        128
 175
 176         while (cmd != 0) {
 177                 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
 178                 if (ret < 0)
 179                         return ret;
 180
 181                 if (cmd == 0) {
 182                         /* FIXME: read second time ?? */
 183                         return 0;
 184                 }
 185
 186                 {
 187                         u_int8_t foo;
 188                         rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
 189                         if (foo & 0x04)
 190                                 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
 191                 }
 192
 193                 /* Abort after some timeout */
 194                 if (cycles > timeout*100/USLEEP_PER_CYCLE) {
 195                         return -ETIMEDOUT;
 196                 }
 197
 198                 cycles++;
 199                 usleep(USLEEP_PER_CYCLE);
 200         }
 201
 202         return 0;
 203 }
 204
 205 static int
 206 rc632_transmit(struct rfid_asic_handle *handle,
 207                 const u_int8_t *buf,
 208                 u_int8_t len,
 209                 u_int64_t timeout)
 210 {
 211         int ret, cur_len;
 212         const u_int8_t *cur_buf = buf;
 213
 214         if (len > 64)
 215                 cur_len = 64;
 216         else
 217                 cur_len = len;
 218
 219         do {
 220                 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
 221                 if (ret < 0)
 222                         return ret;
 223
 224                 if (cur_buf == buf)  {
 225                         /* only start transmit first time */
 226                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 227                                               RC632_CMD_TRANSMIT);
 228                         if (ret < 0)
 229                                 return ret;
 230                 }
 231
 232                 cur_buf += cur_len;
 233                 if (cur_buf < buf + len) {
 234                         cur_len = buf - cur_buf;
 235                         if (cur_len > 64)
 236                                 cur_len = 64;
 237                 } else
 238                         cur_len = 0;
 239
 240         } while (cur_len);
 241
 242         return rc632_wait_idle(handle, timeout);
 243 }
 244
 245 static int
 246 tcl_toggle_pcb(struct rfid_asic_handle *handle)
 247 {
 248         // FIXME: toggle something between 0x0a and 0x0b
 249         return 0;
 250 }
 251
 252 static int
 253 rc632_transceive(struct rfid_asic_handle *handle,
 254                  const u_int8_t *tx_buf,
 255                  u_int8_t tx_len,
 256                  u_int8_t *rx_buf,
 257                  u_int8_t *rx_len,
 258                  unsigned int timer,
 259                  unsigned int toggle)
 260 {
 261         int ret, cur_tx_len;
 262         const u_int8_t *cur_tx_buf = tx_buf;
 263
 264         if (tx_len > 64)
 265                 cur_tx_len = 64;
 266         else
 267                 cur_tx_len = tx_len;
 268
 269         do {
 270                 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
 271                 if (ret < 0)
 272                         return ret;
 273
 274                 if (cur_tx_buf == tx_buf) {
 275                         ret = rc632_reg_write(handle, RC632_REG_COMMAND,
 276                                               RC632_CMD_TRANSCEIVE);
 277                         if (ret < 0)
 278                                 return ret;
 279                 }
 280
 281                 cur_tx_buf += cur_tx_len;
 282                 if (cur_tx_buf < tx_buf + tx_len) {
 283                         u_int8_t fifo_fill;
 284                         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
 285                                              &fifo_fill);
 286                         if (ret < 0)
 287                                 return ret;
 288
 289                         cur_tx_len = 64 - fifo_fill;
 290                         printf("refilling tx fifo with %u bytes\n", cur_tx_len);
 291                 } else
 292                         cur_tx_len = 0;
 293
 294         } while (cur_tx_len);
 295
 296         if (toggle == 1)
 297                 tcl_toggle_pcb(handle);
 298
 299         ret = rc632_wait_idle(handle, timer);
 300         if (ret < 0)
 301                 return ret;
 302
 303         ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, rx_len);
 304         if (ret < 0)
 305                 return ret;
 306
 307         if (*rx_len == 0) {
 308                 u_int8_t tmp;
 309
 310                 DEBUGP("rx_len == 0\n");
 311
 312                 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
 313                 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
 314
 315                 return -1;
 316         }
 317
 318         return rc632_fifo_read(handle, *rx_len, rx_buf);
 319 }
 320
 321 static int
 322 rc632_read_eeprom(struct rfid_asic_handle *handle)
 323 {
 324         u_int8_t recvbuf[60];
 325         u_int8_t sndbuf[3];
 326         int ret;
 327
 328         sndbuf[0] = 0x00;
 329         sndbuf[1] = 0x00;
 330         sndbuf[2] = 0x3c;
 331
 332         ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
 333         if (ret < 0)
 334                 return ret;
 335
 336         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
 337         if (ret < 0)
 338                 return ret;
 339
 340         usleep(20000);
 341
 342         ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
 343         if (ret < 0)
 344                 return ret;
 345
 346         // FIXME: do something with eeprom contents
 347         return ret;
 348 }
 349
 350 static int
 351 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
 352 {
 353         u_int8_t sndbuf[2] = { 0x01, 0x02 };
 354         u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
 355         int ret;
 356
 357         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
 358         if (ret < 0)
 359                 return ret;
 360
 361         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
 362         if (ret < 0)
 363                 return ret;
 364
 365         ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
 366         if (ret < 0)
 367                 return ret;
 368
 369         ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
 370         if (ret < 0)
 371                 return ret;
 372
 373         usleep(10000);  // FIXME: no checking for cmd completion?
 374
 375         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
 376         if (ret < 0)
 377                 return ret;
 378
 379         ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
 380         if (ret < 0)
 381                 return ret;
 382
 383         // FIXME: what to do with crc result?
 384         return ret;
 385 }
 386
 387
 388 int
 389 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
 390 {
 391         int ret;
 392         u_int8_t i;
 393
 394         for (i = 0; i <= 0x3f; i++) {
 395                 ret = rc632_reg_read(handle, i, &buf[i]);
 396                 // do we want error checks?
 397         }
 398         return 0;
 399 }
 400
 401
 402
 403 /* generic FIFO access functions (if no more efficient ones provided by
 404  * transport driver) */
 405
 406 static int
 407 generic_fifo_write()
 408 {
 409         // FIXME: implementation (not needed for CM 5121)
 410         return -1;
 411 }
 412
 413 static int
 414 generic_fifo_read()
 415 {
 416         // FIXME: implementation (not neded for CM 5121)
 417         return -1;
 418 }
 419
 420 static int
 421 rc632_init(struct rfid_asic_handle *ah)
 422 {
 423         int ret;
 424
 425         /* switch off rf (make sure PICCs are reset at init time) */
 426         ret = rc632_power_down(ah);
 427         if (ret < 0)
 428                 return ret;
 429
 430         usleep(10000);
 431
 432         /* switch on rf */
 433         ret = rc632_power_up(ah);
 434         if (ret < 0)
 435                 return ret;
 436
 437         /* disable register paging */
 438         ret = rc632_reg_write(ah, 0x00, 0x00);
 439         if (ret < 0)
 440                 return ret;
 441
 442         /* set some sane default values */
 443         ret = rc632_reg_write(ah, 0x11, 0x5b);
 444         if (ret < 0)
 445                 return ret;
 446
 447         /* switch on rf */
 448         ret = rc632_turn_on_rf(ah);
 449         if (ret < 0)
 450                 return ret;
 451
 452         return 0;
 453 }
 454
 455 static int
 456 rc632_fini(struct rfid_asic_handle *ah)
 457 {
 458         int ret;
 459
 460         /* switch off rf */
 461         ret = rc632_turn_off_rf(ah);
 462         if (ret < 0)
 463                 return ret;
 464
 465         ret = rc632_power_down(ah);
 466         if (ret < 0)
 467                 return ret;
 468
 469         return 0;
 470 }
 471
 472 struct rfid_asic_handle *
 473 rc632_open(struct rfid_asic_transport_handle *th)
 474 {
 475         struct rfid_asic_handle *h;
 476
 477         h = malloc(sizeof(*h));
 478         if (!h)
 479                 return NULL;
 480         memset(h, 0, sizeof(*h));
 481
 482         h->asic = &rc632;
 483         h->rath = th;
 484         h->fc = h->asic->fc;
 485         /* FIXME: this is only cm5121 specific, since the latency
 486          * down to the RC632 FIFO is too long to refill during TX/RX */
 487         h->mtu = h->mru = 64;
 488
 489         if (rc632_init(h) < 0) {
 490                 free(h);
 491                 return NULL;
 492         }
 493
 494         return h;
 495 }
 496
 497 void
 498 rc632_close(struct rfid_asic_handle *h)
 499 {
 500         rc632_fini(h);
 501         free(h);
 502 }
 503
 504
 505 /*
 506  * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
 507  *
 508  * (C) 2005 by Harald Welte <laforge@gnumonks.org>
 509  *
 510  */
 511
 512 static int
 513 rc632_iso14443a_init(struct rfid_asic_handle *handle)
 514 {
 515         int ret;
 516
 517         // FIXME: some fifo work (drain fifo?)
 518
 519         /* flush fifo (our way) */
 520         ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
 521
 522         ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
 523                         (RC632_TXCTRL_TX1_RF_EN |
 524                          RC632_TXCTRL_TX2_RF_EN |
 525                          RC632_TXCTRL_TX2_INV |
 526                          RC632_TXCTRL_FORCE_100_ASK |
 527                          RC632_TXCTRL_MOD_SRC_INT));
 528         if (ret < 0)
 529                 return ret;
 530
 531         ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
 532                                 CM5121_CW_CONDUCTANCE);
 533         if (ret < 0)
 534                 return ret;
 535
 536         /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
 537         ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
 538                                 CM5121_MOD_CONDUCTANCE);
 539         if (ret < 0)
 540                 return ret;
 541
 542         ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
 543                                 (RC632_CDRCTRL_TXCD_14443A |
 544                                  RC632_CDRCTRL_RATE_106K));
 545         if (ret < 0)
 546                 return ret;
 547
 548         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
 549         if (ret < 0)
 550                 return ret;
 551
 552         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
 553         if (ret < 0)
 554                 return ret;
 555
 556         ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
 557         if (ret < 0)
 558                 return ret;
 559
 560         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
 561                               (RC632_RXCTRL1_GAIN_35DB |
 562                                RC632_RXCTRL1_ISO14443 |
 563                                RC632_RXCTRL1_SUBCP_8));
 564         if (ret < 0)
 565                 return ret;
 566
 567         ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
 568                               (RC632_DECCTRL_MANCHESTER |
 569                                RC632_DECCTRL_RXFR_14443A));
 570         if (ret < 0)
 571                 return ret;
 572
 573         ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
 574                                 CM5121_14443A_BITPHASE);
 575         if (ret < 0)
 576                 return ret;
 577
 578         ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
 579                                 CM5121_14443A_THRESHOLD);
 580         if (ret < 0)
 581                 return ret;
 582
 583         ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
 584         if (ret < 0)
 585                 return ret;
 586
 587         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
 588                               (RC632_RXCTRL2_DECSRC_INT |
 589                                RC632_RXCTRL2_CLK_Q));
 590         if (ret < 0)
 591                 return ret;
 592
 593         /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
 594         ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
 595         if (ret < 0)
 596                 return ret;
 597
 598         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
 599                               (RC632_CR_PARITY_ENABLE |
 600                                RC632_CR_PARITY_ODD));
 601         if (ret < 0)
 602                 return ret;
 603
 604         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
 605         if (ret < 0)
 606                 return ret;
 607
 608         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
 609         if (ret < 0)
 610                 return ret;
 611
 612         return 0;
 613 }
 614
 615 static int
 616 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
 617 {
 618
 619 #if 0
 620         ret = rc632_turn_off_rf(handle);
 621         if (ret < 0)
 622                 return ret;
 623 #endif
 624
 625
 626         return 0;
 627 }
 628
 629
 630 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
 631 static int
 632 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
 633                                 u_int8_t cmd,
 634                                 struct iso14443a_atqa *atqa)
 635 {
 636         int ret;
 637         u_int8_t tx_buf[1];
 638         u_int8_t rx_len = 2;
 639
 640         memset(atqa, 0, sizeof(atqa));
 641
 642         tx_buf[0] = cmd;
 643
 644         /* transfer only 7 bits of last byte in frame */
 645         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
 646         if (ret < 0)
 647                 return ret;
 648
 649         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
 650                                 RC632_CONTROL_CRYPTO1_ON);
 651         if (ret < 0)
 652                 return ret;
 653
 654 #if 0
 655         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
 656                                 (RC632_CR_PARITY_ENABLE |
 657                                  RC632_CR_PARITY_ODD));
 658 #else
 659         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
 660                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
 661
 662 #endif
 663         if (ret < 0)
 664                 return ret;
 665
 666         ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
 667                                 (u_int8_t *)atqa, &rx_len, 0x32, 0);
 668         if (ret < 0) {
 669                 DEBUGP("error during rc632_transceive()\n");
 670                 return ret;
 671         }
 672
 673         /* switch back to normal 8bit last byte */
 674         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
 675         if (ret < 0)
 676                 return ret;
 677
 678         if (rx_len != 2) {
 679                 DEBUGP("rx_len(%d) != 2\n", rx_len);
 680                 return -1;
 681         }
 682
 683         return 0;
 684 }
 685
 686 /* transceive regular frame */
 687 static int
 688 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
 689                            unsigned int frametype,
 690                            const u_int8_t *tx_buf, unsigned int tx_len,
 691                            u_int8_t *rx_buf, unsigned int *rx_len,
 692                            u_int64_t timeout, unsigned int flags)
 693 {
 694         int ret;
 695         u_int8_t rxl = *rx_len & 0xff;
 696         u_int8_t channel_red;
 697
 698         memset(rx_buf, 0, *rx_len);
 699
 700         switch (frametype) {
 701         case RFID_14443A_FRAME_REGULAR:
 702         case RFID_MIFARE_FRAME:
 703                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
 704                                 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
 705                 break;
 706         case RFID_14443B_FRAME_REGULAR:
 707                 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
 708                                 |RC632_CR_CRC3309;
 709                 break;
 710 #if 0
 711         case RFID_MIFARE_FRAME:
 712                 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
 713                 break;
 714 #endif
 715         default:
 716                 return -EINVAL;
 717                 break;
 718         }
 719         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
 720                               channel_red);
 721         if (ret < 0)
 722                 return ret;
 723
 724         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
 725         *rx_len = rxl;
 726         if (ret < 0)
 727                 return ret;
 728
 729
 730         return 0;
 731 }
 732
 733 /* transceive anti collission bitframe */
 734 static int
 735 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
 736                                 struct iso14443a_anticol_cmd *acf,
 737                                 unsigned int *bit_of_col)
 738 {
 739         int ret;
 740         u_int8_t rx_buf[64];
 741         u_int8_t rx_len = sizeof(rx_buf);
 742         u_int8_t rx_align = 0, tx_last_bits, tx_bytes;
 743         u_int8_t boc;
 744         u_int8_t error_flag;
 745         *bit_of_col = ISO14443A_BITOFCOL_NONE;
 746         memset(rx_buf, 0, sizeof(rx_buf));
 747
 748         /* disable mifare cryto */
 749         ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
 750                                 RC632_CONTROL_CRYPTO1_ON);
 751         if (ret < 0)
 752                 return ret;
 753
 754         /* disable CRC summing */
 755 #if 0
 756         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
 757                                 (RC632_CR_PARITY_ENABLE |
 758                                  RC632_CR_PARITY_ODD));
 759 #else
 760         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
 761                                 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
 762 #endif
 763         if (ret < 0)
 764                 return ret;
 765
 766         tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
 767         tx_bytes = acf->nvb >> 4;
 768         if (tx_last_bits) {
 769                 tx_bytes++;
 770                 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
 771         }
 772
 773         //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
 774
 775         /* set RxAlign and TxLastBits*/
 776         ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
 777                                 (rx_align << 4) | (tx_last_bits));
 778         if (ret < 0)
 779                 return ret;
 780
 781         ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes,
 782                                 rx_buf, &rx_len, 0x32, 0);
 783         if (ret < 0)
 784                 return ret;
 785
 786         /* bitwise-OR the two halves of the split byte */
 787         acf->uid_bits[tx_bytes-2] = (
 788                   (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
 789                 | rx_buf[0]);
 790         /* copy the rest */
 791         memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
 792
 793         /* determine whether there was a collission */
 794         ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
 795         if (ret < 0)
 796                 return ret;
 797
 798         if (error_flag & RC632_ERR_FLAG_COL_ERR) {
 799                 /* retrieve bit of collission */
 800                 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
 801                 if (ret < 0)
 802                         return ret;
 803
 804                 /* bit of collission relative to start of part 1 of
 805                  * anticollision frame (!) */
 806                 *bit_of_col = 2*8 + boc;
 807         }
 808
 809         return 0;
 810 }
 811
 812 enum rc632_rate {
 813         RC632_RATE_106  = 0x00,
 814         RC632_RATE_212  = 0x01,
 815         RC632_RATE_424  = 0x02,
 816         RC632_RATE_848  = 0x03,
 817 };
 818
 819 struct rx_config {
 820         u_int8_t        subc_pulses;
 821         u_int8_t        rx_coding;
 822         u_int8_t        rx_threshold;
 823         u_int8_t        bpsk_dem_ctrl;
 824 };
 825
 826 struct tx_config {
 827         u_int8_t        rate;
 828         u_int8_t        mod_width;
 829 };
 830
 831 static struct rx_config rx_configs[] = {
 832         {
 833                 .subc_pulses    = RC632_RXCTRL1_SUBCP_8,
 834                 .rx_coding      = RC632_DECCTRL_MANCHESTER,
 835                 .rx_threshold   = 0x88,
 836                 .bpsk_dem_ctrl  = 0x00,
 837         },
 838         {
 839                 .subc_pulses    = RC632_RXCTRL1_SUBCP_4,
 840                 .rx_coding      = RC632_DECCTRL_BPSK,
 841                 .rx_threshold   = 0x50,
 842                 .bpsk_dem_ctrl  = 0x0c,
 843         },
 844         {
 845                 .subc_pulses    = RC632_RXCTRL1_SUBCP_2,
 846                 .rx_coding      = RC632_DECCTRL_BPSK,
 847                 .rx_threshold   = 0x50,
 848                 .bpsk_dem_ctrl  = 0x0c,
 849         },
 850         {
 851                 .subc_pulses    = RC632_RXCTRL1_SUBCP_1,
 852                 .rx_coding      = RC632_DECCTRL_BPSK,
 853                 .rx_threshold   = 0x50,
 854                 .bpsk_dem_ctrl  = 0x0c,
 855         },
 856 };
 857
 858 static struct tx_config tx_configs[] = {
 859         {
 860                 .rate           = RC632_CDRCTRL_RATE_106K,
 861                 .mod_width      = 0x13,
 862         },
 863         {
 864                 .rate           = RC632_CDRCTRL_RATE_212K,
 865                 .mod_width      = 0x07,
 866         },
 867         {
 868                 .rate           = RC632_CDRCTRL_RATE_424K,
 869                 .mod_width      = 0x03,
 870         },
 871         {
 872                 .rate           = RC632_CDRCTRL_RATE_848K,
 873                 .mod_width      = 0x01,
 874         },
 875 };
 876
 877 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
 878                                      unsigned int tx,
 879                                      u_int8_t rate)
 880 {
 881         int rc;
 882         u_int8_t reg;
 883
 884
 885         if (!tx) {
 886                 /* Rx */
 887                 if (rate > ARRAY_SIZE(rx_configs))
 888                         return -EINVAL;
 889
 890                 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
 891                                         RC632_RXCTRL1_SUBCP_MASK,
 892                                         rx_configs[rate].subc_pulses);
 893                 if (rc < 0)
 894                         return rc;
 895
 896                 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
 897                                         RC632_DECCTRL_BPSK,
 898                                         rx_configs[rate].rx_coding);
 899                 if (rc < 0)
 900                         return rc;
 901
 902                 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
 903                                         rx_configs[rate].rx_threshold);
 904                 if (rc < 0)
 905                         return rc;
 906
 907                 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
 908                         rc = rc632_reg_write(handle,
 909                                              RC632_REG_BPSK_DEM_CONTROL,
 910                                              rx_configs[rate].bpsk_dem_ctrl);
 911                         if (rc < 0)
 912                                 return rc;
 913                 }
 914         } else {
 915                 /* Tx */
 916                 if (rate > ARRAY_SIZE(tx_configs))
 917                         return -EINVAL;
 918
 919                 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
 920                                         RC632_CDRCTRL_RATE_MASK,
 921                                         tx_configs[rate].rate);
 922                 if (rc < 0)
 923                         return rc;
 924
 925                 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
 926                                      tx_configs[rate].mod_width);
 927                 if (rc < 0)
 928                         return rc;
 929         }
 930
 931         return 0;
 932 }
 933
 934 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
 935 {
 936         int ret;
 937
 938         // FIXME: some FIFO work
 939
 940         /* flush fifo (our way) */
 941         ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
 942         if (ret < 0)
 943                 return ret;
 944
 945         ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
 946                         (RC632_TXCTRL_TX1_RF_EN |
 947                          RC632_TXCTRL_TX2_RF_EN |
 948                          RC632_TXCTRL_TX2_INV |
 949                          RC632_TXCTRL_MOD_SRC_INT));
 950         if (ret < 0)
 951                 return ret;
 952
 953         ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
 954         if (ret < 0)
 955                 return ret;
 956
 957         ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
 958         if (ret < 0)
 959                 return ret;
 960
 961         ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
 962                               (RC632_CDRCTRL_TXCD_NRZ |
 963                                RC632_CDRCTRL_RATE_14443B));
 964         if (ret < 0)
 965                 return ret;
 966
 967         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
 968         if (ret < 0)
 969                 return ret;
 970
 971         ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
 972         if (ret < 0)
 973                 return ret;
 974
 975         ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
 976                               (RC632_TBFRAMING_SOF_11L_3H |
 977                                (6 << RC632_TBFRAMING_SPACE_SHIFT) |
 978                                RC632_TBFRAMING_EOF_11));
 979         if (ret < 0)
 980                 return ret;
 981
 982         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
 983                               (RC632_RXCTRL1_GAIN_35DB |
 984                                RC632_RXCTRL1_ISO14443 |
 985                                RC632_RXCTRL1_SUBCP_8));
 986         if (ret < 0)
 987                 return ret;
 988
 989         ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
 990                               (RC632_DECCTRL_BPSK |
 991                                RC632_DECCTRL_RXFR_14443B));
 992         if (ret < 0)
 993                 return ret;
 994
 995         ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
 996                                 CM5121_14443B_BITPHASE);
 997         if (ret < 0)
 998                 return ret;
 999
1000         ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1001                                 CM5121_14443B_THRESHOLD);
1002         if (ret < 0)
1003                 return ret;
1004
1005         ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1006                               ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1007                                (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1008                                RC632_BPSKD_FILTER_AMP_DETECT |
1009                                RC632_BPSKD_NO_RX_EOF |
1010                                RC632_BPSKD_NO_RX_EGT));
1011         if (ret < 0)
1012                 return ret;
1013
1014         ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1015                               (RC632_RXCTRL2_AUTO_PD |
1016                                RC632_RXCTRL2_DECSRC_INT));
1017         if (ret < 0)
1018                 return ret;
1019
1020         ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1021         if (ret < 0)
1022                 return ret;
1023
1024         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1025                               (RC632_CR_TX_CRC_ENABLE |
1026                                RC632_CR_RX_CRC_ENABLE |
1027                                RC632_CR_CRC3309));
1028         if (ret < 0)
1029                 return ret;
1030
1031         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1032         if (ret < 0)
1033                 return ret;
1034
1035         ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1036         if (ret < 0)
1037                 return ret;
1038
1039         return 0;
1040 }
1041
1042 static int
1043 rc632_iso15693_init(struct rfid_asic_handle *h)
1044 {
1045         int ret;
1046
1047         ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1048                                                 (RC632_TXCTRL_MOD_SRC_INT |
1049                                                  RC632_TXCTRL_TX2_INV |
1050                                                  RC632_TXCTRL_TX2_RF_EN |
1051                                                  RC632_TXCTRL_TX1_RF_EN));
1052         if (ret < 0)
1053                 return ret;
1054
1055         ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1056         if (ret < 0)
1057                 return ret;
1058
1059         ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x03);
1060         if (ret < 0)
1061                 return ret;
1062
1063         ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1064                                                 (RC632_CDRCTRL_RATE_15693 |
1065                                                  0x03)); /* FIXME */
1066         if (ret < 0)
1067                 return ret;
1068
1069         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1070         if (ret < 0)
1071                 return ret;
1072
1073         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1074         if (ret < 0)
1075                 return ret;
1076
1077         ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1078         if (ret < 0)
1079                 return ret;
1080
1081         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1082                                                 (RC632_RXCTRL1_SUBCP_16 |
1083                                                  RC632_RXCTRL1_ISO15693 |
1084                                                  RC632_RXCTRL1_GAIN_35DB));
1085         if (ret < 0)
1086                 return ret;
1087
1088         ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1089                                                 (RC632_DECCTRL_RXFR_15693 |
1090                                                  RC632_DECCTRL_RX_INVERT));
1091         if (ret < 0)
1092                 return ret;
1093
1094         ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xe0);
1095         if (ret < 0)
1096                 return ret;
1097
1098         ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1099         if (ret < 0)
1100                 return ret;
1101
1102         ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1103         if (ret < 0)
1104                 return ret;
1105
1106         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1107                                                 (RC632_RXCTRL2_AUTO_PD |
1108                                                  RC632_RXCTRL2_DECSRC_INT));
1109         if (ret < 0)
1110                 return ret;
1111
1112         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1113                                                 (RC632_CR_CRC3309 |
1114                                                  RC632_CR_RX_CRC_ENABLE |
1115                                                  RC632_CR_TX_CRC_ENABLE));
1116         if (ret < 0)
1117                 return ret;
1118
1119         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xff);
1120         if (ret < 0)
1121                 return ret;
1122
1123         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1124         if (ret < 0)
1125                 return ret;
1126
1127         return 0;
1128 }
1129
1130 static int
1131 rc632_iso15693_icode_init(struct rfid_asic_handle *h)
1132 {
1133         int ret;
1134
1135         ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1136                                                 (RC632_TXCTRL_MOD_SRC_INT |
1137                                                  RC632_TXCTRL_TX2_INV |
1138                                                  RC632_TXCTRL_TX2_RF_EN |
1139                                                  RC632_TXCTRL_TX1_RF_EN));
1140         if (ret < 0)
1141                 return ret;
1142
1143         ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1144         if (ret < 0)
1145                 return ret;
1146
1147         ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x02);
1148         if (ret < 0)
1149                 return ret;
1150
1151         ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL, 0x2c);
1152         if (ret < 0)
1153                 return ret;
1154
1155         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1156         if (ret < 0)
1157                 return ret;
1158
1159         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1160         if (ret < 0)
1161                 return ret;
1162
1163         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1164         if (ret < 0)
1165                 return ret;
1166
1167         ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1168         if (ret < 0)
1169                 return ret;
1170
1171         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1, 0x8b); /* FIXME */
1172         if (ret < 0)
1173                 return ret;
1174
1175         ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL, 0x00);
1176         if (ret < 0)
1177                 return ret;
1178
1179         ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0x52);
1180         if (ret < 0)
1181                 return ret;
1182
1183         ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0x66);
1184         if (ret < 0)
1185                 return ret;
1186
1187         ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1188         if (ret < 0)
1189                 return ret;
1190
1191         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1192                                                 RC632_RXCTRL2_DECSRC_INT);
1193         if (ret < 0)
1194                 return ret;
1195
1196         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1197                                                 (RC632_CR_RX_CRC_ENABLE |
1198                                                  RC632_CR_TX_CRC_ENABLE));
1199         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xfe);
1200         if (ret < 0)
1201                 return ret;
1202
1203         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1204         if (ret < 0)
1205                 return ret;
1206
1207         return 0;
1208 }
1209
1210 static int
1211 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1212 {
1213         int ret;
1214
1215         /* ICL */
1216
1217         ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1218                                                 (RC632_TXCTRL_MOD_SRC_INT |
1219                                                  RC632_TXCTRL_TX2_INV |
1220                                                  RC632_TXCTRL_TX2_RF_EN |
1221                                                  RC632_TXCTRL_TX1_RF_EN));
1222         if (ret < 0)
1223                 return ret;
1224
1225         ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1226         if (ret < 0)
1227                 return ret;
1228
1229         ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1230         if (ret < 0)
1231                 return ret;
1232
1233         ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1234                                                 (RC632_CDRCTRL_RATE_15693 |
1235                                                  RC632_CDRCTRL_TXCD_ICODE_STD |
1236                                                  0x03)); /* FIXME */
1237         if (ret < 0)
1238                 return ret;
1239
1240         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1241         if (ret < 0)
1242                 return ret;
1243
1244         ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1245         if (ret < 0)
1246                 return ret;
1247         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1248                                                 (RC632_RXCTRL1_SUBCP_16|
1249                                                  RC632_RXCTRL1_ISO15693|
1250                                                  RC632_RXCTRL1_GAIN_35DB));
1251         if (ret < 0)
1252                 return ret;
1253         ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1254                                                 (RC632_DECCTRL_RX_INVERT|
1255                                                  RC632_DECCTRL_RXFR_15693));
1256         if (ret < 0)
1257                 return ret;
1258
1259         ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1260         if (ret < 0)
1261                 return ret;
1262
1263         ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1264         if (ret < 0)
1265                 return ret;
1266
1267         ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1268         if (ret < 0)
1269                 return ret;
1270
1271         ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1272                                                 RC632_RXCTRL2_DECSRC_INT);
1273         if (ret < 0)
1274                 return ret;
1275
1276         ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1277         if (ret < 0)
1278                 return ret;
1279
1280         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1281         if (ret < 0)
1282                 return ret;
1283
1284         ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1285         if (ret < 0)
1286                 return ret;
1287
1288         return 0;
1289 }
1290
1291 struct mifare_authcmd {
1292         u_int8_t auth_cmd;
1293         u_int8_t block_address;
1294         u_int32_t serno;        /* lsb 1 2 msb */
1295 } __attribute__ ((packed));
1296
1297
1298 #define RFID_MIFARE_KEY_LEN 6
1299 #define RFID_MIFARE_KEY_CODED_LEN 12
1300
1301 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1302 static int
1303 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1304 {
1305         int i;
1306         u_int8_t ln;
1307         u_int8_t hn;
1308
1309         for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1310                 ln = key6[i] & 0x0f;
1311                 hn = key6[i] >> 4;
1312                 key12[i * 2 + 1] = (~ln << 4) | ln;
1313                 key12[i * 2] = (~hn << 4) | hn;
1314         }
1315         return 0;
1316 }
1317
1318 static int
1319 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1320 {
1321         u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1322         u_int8_t reg;
1323         int ret;
1324
1325         ret = rc632_mifare_transform_key(key, coded_key);
1326         if (ret < 0)
1327                 return ret;
1328
1329         ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1330         if (ret < 0)
1331                 return ret;
1332
1333         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1334         if (ret < 0)
1335                 return ret;
1336
1337         ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1338         if (ret < 0)
1339                 return ret;
1340
1341         ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, &reg);
1342         if (ret < 0)
1343                 return ret;
1344
1345         if (reg & RC632_ERR_FLAG_KEY_ERR)
1346                 return -EINVAL;
1347
1348         return 0;
1349 }
1350
1351 static int
1352 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1353                   u_int8_t block)
1354 {
1355         int ret;
1356         struct mifare_authcmd acmd;
1357         u_int8_t reg;
1358
1359         if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B)
1360                 return -EINVAL;
1361
1362         /* Initialize acmd */
1363         acmd.block_address = block & 0xff;
1364         acmd.auth_cmd = cmd;
1365         //acmd.serno = htonl(serno);
1366         acmd.serno = serno;
1367
1368         /* Clear Rx CRC */
1369         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1370                                 RC632_CR_RX_CRC_ENABLE);
1371         if (ret < 0)
1372                 return ret;
1373
1374         /* Send Authent1 Command */
1375         ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1376         if (ret < 0)
1377                 return ret;
1378
1379         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1380         if (ret < 0)
1381                 return ret;
1382
1383         /* Wait until transmitter is idle */
1384         ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1385         if (ret < 0)
1386                 return ret;
1387
1388         ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, &reg);
1389         if (ret < 0)
1390                 return ret;
1391         if (reg & 0x07)
1392                 return -EIO;
1393
1394         /* Clear Tx CRC */
1395         ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1396                                 RC632_CR_TX_CRC_ENABLE);
1397         if (ret < 0)
1398                 return ret;
1399
1400         /* Send Authent2 Command */
1401         ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1402         if (ret < 0)
1403                 return ret;
1404
1405         /* Wait until transmitter is idle */
1406         ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1407         if (ret < 0)
1408                 return ret;
1409
1410         /* Check whether authentication was successful */
1411         ret = rc632_reg_read(h, RC632_REG_CONTROL, &reg);
1412         if (ret < 0)
1413                 return ret;
1414
1415         if (!(reg & RC632_CONTROL_CRYPTO1_ON))
1416                 return -EACCES;
1417
1418         return 0;
1419
1420 }
1421
1422 /* transceive regular frame */
1423 static int
1424 rc632_mifare_transceive(struct rfid_asic_handle *handle,
1425                         const u_int8_t *tx_buf, unsigned int tx_len,
1426                         u_int8_t *rx_buf, unsigned int *rx_len,
1427                         u_int64_t timeout, unsigned int flags)
1428 {
1429         int ret;
1430         u_int8_t rxl = *rx_len & 0xff;
1431
1432         DEBUGP("entered\n");
1433         memset(rx_buf, 0, *rx_len);
1434
1435 #if 1
1436         ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1437                                 (RC632_CR_PARITY_ENABLE |
1438                                  RC632_CR_PARITY_ODD |
1439                                  RC632_CR_TX_CRC_ENABLE |
1440                                  RC632_CR_RX_CRC_ENABLE));
1441 #else
1442         ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1443                                 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1444 #endif
1445         if (ret < 0)
1446                 return ret;
1447
1448         ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1449         *rx_len = rxl;
1450         if (ret < 0)
1451                 return ret;
1452
1453
1454         return 0;
1455 }
1456
1457 struct rfid_asic rc632 = {
1458         .name   = "Philips CL RC632",
1459         .fc     = ISO14443_FREQ_CARRIER,
1460         .priv.rc632 = {
1461                 .fn = {
1462                         .power_up = &rc632_power_up,
1463                         .power_down = &rc632_power_down,
1464                         .turn_on_rf = &rc632_turn_on_rf,
1465                         .turn_off_rf = &rc632_turn_off_rf,
1466                         .transceive = &rc632_iso14443ab_transceive,
1467                         .iso14443a = {
1468                                 .init = &rc632_iso14443a_init,
1469                                 .transceive_sf = &rc632_iso14443a_transceive_sf,
1470                                 .transceive_acf = &rc632_iso14443a_transceive_acf,
1471                                 .set_speed = &rc632_iso14443a_set_speed,
1472                         },
1473                         .iso14443b = {
1474                                 .init = &rc632_iso14443b_init,
1475                         },
1476                         .iso15693 = {
1477                                 .init = &rc632_iso15693_init,
1478                         },
1479                         .mifare_classic = {
1480                                 .setkey = &rc632_mifare_set_key,
1481                                 .auth = &rc632_mifare_auth,
1482                         },
1483                 },
1484         },
1485 };