+#ifdef CONFIG_CACHE_L2X0
+static void tf_cache_write_sec(unsigned long val, unsigned int reg)
+{
+ static u32 l2x0_way_mask = 0xff;
+ static u32 l2x0_aux_ctrl = 0;
+
+ switch (reg) {
+ case L2X0_AUX_CTRL:
+ l2x0_aux_ctrl = val;
+
+ if (l2x0_aux_ctrl & BIT(16))
+ l2x0_way_mask = 0xffff;
+ break;
+
+ case L2X0_CTRL:
+ if (val == L2X0_CTRL_EN)
+ tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_ENABLE,
+ l2x0_aux_ctrl);
+ else
+ tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_DISABLE,
+ l2x0_way_mask);
+ break;
+
+ default:
+ break;
+ }
+}
+
+static int tf_init_cache(void)
+{
+ outer_cache.write_sec = tf_cache_write_sec;
+
+ return 0;
+}
+#endif /* CONFIG_CACHE_L2X0 */
+