3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
11 #include <linux/irq.h>
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/ioport.h>
15 #include <linux/smp_lock.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
18 #include <linux/msi.h>
20 #include <asm/errno.h>
27 static int pci_msi_enable = 1;
29 static void msi_set_enable(struct pci_dev *dev, int enable)
34 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
36 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
37 control &= ~PCI_MSI_FLAGS_ENABLE;
39 control |= PCI_MSI_FLAGS_ENABLE;
40 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
44 static void msix_set_enable(struct pci_dev *dev, int enable)
49 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
51 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
52 control &= ~PCI_MSIX_FLAGS_ENABLE;
54 control |= PCI_MSIX_FLAGS_ENABLE;
55 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
59 static void msix_flush_writes(unsigned int irq)
61 struct msi_desc *entry;
63 entry = get_irq_msi(irq);
64 BUG_ON(!entry || !entry->dev);
65 switch (entry->msi_attrib.type) {
71 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
72 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
73 readl(entry->mask_base + offset);
82 static void msi_set_mask_bit(unsigned int irq, int flag)
84 struct msi_desc *entry;
86 entry = get_irq_msi(irq);
87 BUG_ON(!entry || !entry->dev);
88 switch (entry->msi_attrib.type) {
90 if (entry->msi_attrib.maskbit) {
94 pos = (long)entry->mask_base;
95 pci_read_config_dword(entry->dev, pos, &mask_bits);
98 pci_write_config_dword(entry->dev, pos, mask_bits);
100 msi_set_enable(entry->dev, !flag);
103 case PCI_CAP_ID_MSIX:
105 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
106 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
107 writel(flag, entry->mask_base + offset);
108 readl(entry->mask_base + offset);
115 entry->msi_attrib.masked = !!flag;
118 void read_msi_msg(unsigned int irq, struct msi_msg *msg)
120 struct msi_desc *entry = get_irq_msi(irq);
121 switch(entry->msi_attrib.type) {
124 struct pci_dev *dev = entry->dev;
125 int pos = entry->msi_attrib.pos;
128 pci_read_config_dword(dev, msi_lower_address_reg(pos),
130 if (entry->msi_attrib.is_64) {
131 pci_read_config_dword(dev, msi_upper_address_reg(pos),
133 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
136 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
141 case PCI_CAP_ID_MSIX:
144 base = entry->mask_base +
145 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
147 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
148 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
149 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
157 void write_msi_msg(unsigned int irq, struct msi_msg *msg)
159 struct msi_desc *entry = get_irq_msi(irq);
160 switch (entry->msi_attrib.type) {
163 struct pci_dev *dev = entry->dev;
164 int pos = entry->msi_attrib.pos;
166 pci_write_config_dword(dev, msi_lower_address_reg(pos),
168 if (entry->msi_attrib.is_64) {
169 pci_write_config_dword(dev, msi_upper_address_reg(pos),
171 pci_write_config_word(dev, msi_data_reg(pos, 1),
174 pci_write_config_word(dev, msi_data_reg(pos, 0),
179 case PCI_CAP_ID_MSIX:
182 base = entry->mask_base +
183 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
185 writel(msg->address_lo,
186 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
187 writel(msg->address_hi,
188 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
189 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
198 void mask_msi_irq(unsigned int irq)
200 msi_set_mask_bit(irq, 1);
201 msix_flush_writes(irq);
204 void unmask_msi_irq(unsigned int irq)
206 msi_set_mask_bit(irq, 0);
207 msix_flush_writes(irq);
210 static int msi_free_irq(struct pci_dev* dev, int irq);
213 static struct msi_desc* alloc_msi_entry(void)
215 struct msi_desc *entry;
217 entry = kzalloc(sizeof(struct msi_desc), GFP_KERNEL);
221 INIT_LIST_HEAD(&entry->list);
229 static void __pci_restore_msi_state(struct pci_dev *dev)
233 struct msi_desc *entry;
235 if (!dev->msi_enabled)
238 entry = get_irq_msi(dev->irq);
239 pos = entry->msi_attrib.pos;
241 pci_intx(dev, 0); /* disable intx */
242 msi_set_enable(dev, 0);
243 write_msi_msg(dev->irq, &entry->msg);
244 if (entry->msi_attrib.maskbit)
245 msi_set_mask_bit(dev->irq, entry->msi_attrib.masked);
247 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
248 control &= ~(PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE);
249 if (entry->msi_attrib.maskbit || !entry->msi_attrib.masked)
250 control |= PCI_MSI_FLAGS_ENABLE;
251 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
254 static void __pci_restore_msix_state(struct pci_dev *dev)
257 struct msi_desc *entry;
260 if (!dev->msix_enabled)
263 /* route the table */
264 pci_intx(dev, 0); /* disable intx */
265 msix_set_enable(dev, 0);
267 list_for_each_entry(entry, &dev->msi_list, list) {
268 write_msi_msg(entry->irq, &entry->msg);
269 msi_set_mask_bit(entry->irq, entry->msi_attrib.masked);
272 BUG_ON(list_empty(&dev->msi_list));
273 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
274 pos = entry->msi_attrib.pos;
275 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
276 control &= ~PCI_MSIX_FLAGS_MASKALL;
277 control |= PCI_MSIX_FLAGS_ENABLE;
278 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
281 void pci_restore_msi_state(struct pci_dev *dev)
283 __pci_restore_msi_state(dev);
284 __pci_restore_msix_state(dev);
286 #endif /* CONFIG_PM */
289 * msi_capability_init - configure device's MSI capability structure
290 * @dev: pointer to the pci_dev data structure of MSI device function
292 * Setup the MSI capability structure of device function with a single
293 * MSI irq, regardless of device function is capable of handling
294 * multiple messages. A return of zero indicates the successful setup
295 * of an entry zero with the new MSI irq or non-zero for otherwise.
297 static int msi_capability_init(struct pci_dev *dev)
299 struct msi_desc *entry;
303 msi_set_enable(dev, 0); /* Ensure msi is disabled as I set it up */
305 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
306 pci_read_config_word(dev, msi_control_reg(pos), &control);
307 /* MSI Entry Initialization */
308 entry = alloc_msi_entry();
312 entry->msi_attrib.type = PCI_CAP_ID_MSI;
313 entry->msi_attrib.is_64 = is_64bit_address(control);
314 entry->msi_attrib.entry_nr = 0;
315 entry->msi_attrib.maskbit = is_mask_bit_support(control);
316 entry->msi_attrib.masked = 1;
317 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
318 entry->msi_attrib.pos = pos;
319 if (is_mask_bit_support(control)) {
320 entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
321 is_64bit_address(control));
324 if (entry->msi_attrib.maskbit) {
325 unsigned int maskbits, temp;
326 /* All MSIs are unmasked by default, Mask them all */
327 pci_read_config_dword(dev,
328 msi_mask_bits_reg(pos, is_64bit_address(control)),
330 temp = (1 << multi_msi_capable(control));
331 temp = ((temp - 1) & ~temp);
333 pci_write_config_dword(dev,
334 msi_mask_bits_reg(pos, is_64bit_address(control)),
337 /* Configure MSI capability structure */
338 ret = arch_setup_msi_irq(dev, entry);
343 list_add(&entry->list, &dev->msi_list);
345 /* Set MSI enabled bits */
346 pci_intx(dev, 0); /* disable intx */
347 msi_set_enable(dev, 1);
348 dev->msi_enabled = 1;
350 dev->irq = entry->irq;
355 * msix_capability_init - configure device's MSI-X capability
356 * @dev: pointer to the pci_dev data structure of MSI-X device function
357 * @entries: pointer to an array of struct msix_entry entries
358 * @nvec: number of @entries
360 * Setup the MSI-X capability structure of device function with a
361 * single MSI-X irq. A return of zero indicates the successful setup of
362 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
364 static int msix_capability_init(struct pci_dev *dev,
365 struct msix_entry *entries, int nvec)
367 struct msi_desc *entry;
368 int irq, pos, i, j, nr_entries, ret;
369 unsigned long phys_addr;
375 msix_set_enable(dev, 0);/* Ensure msix is disabled as I set it up */
377 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
378 /* Request & Map MSI-X table region */
379 pci_read_config_word(dev, msi_control_reg(pos), &control);
380 nr_entries = multi_msix_capable(control);
382 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
383 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
384 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
385 phys_addr = pci_resource_start (dev, bir) + table_offset;
386 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
390 /* MSI-X Table Initialization */
391 for (i = 0; i < nvec; i++) {
392 entry = alloc_msi_entry();
396 j = entries[i].entry;
397 entry->msi_attrib.type = PCI_CAP_ID_MSIX;
398 entry->msi_attrib.is_64 = 1;
399 entry->msi_attrib.entry_nr = j;
400 entry->msi_attrib.maskbit = 1;
401 entry->msi_attrib.masked = 1;
402 entry->msi_attrib.default_irq = dev->irq;
403 entry->msi_attrib.pos = pos;
405 entry->mask_base = base;
407 /* Configure MSI-X capability structure */
408 ret = arch_setup_msi_irq(dev, entry);
413 entries[i].vector = entry->irq;
414 list_add(&entry->list, &dev->msi_list);
419 for (; i >= 0; i--) {
420 irq = (entries + i)->vector;
421 msi_free_irq(dev, irq);
422 (entries + i)->vector = 0;
424 /* If we had some success report the number of irqs
425 * we succeeded in setting up.
431 /* Set MSI-X enabled bits */
432 pci_intx(dev, 0); /* disable intx */
433 msix_set_enable(dev, 1);
434 dev->msix_enabled = 1;
440 * pci_msi_check_device - check whether MSI may be enabled on a device
441 * @dev: pointer to the pci_dev data structure of MSI device function
442 * @nvec: how many MSIs have been requested ?
443 * @type: are we checking for MSI or MSI-X ?
445 * Look at global flags, the device itself, and its parent busses
446 * to determine if MSI/-X are supported for the device. If MSI/-X is
447 * supported return 0, else return an error code.
449 static int pci_msi_check_device(struct pci_dev* dev, int nvec, int type)
454 /* MSI must be globally enabled and supported by the device */
455 if (!pci_msi_enable || !dev || dev->no_msi)
459 * You can't ask to have 0 or less MSIs configured.
461 * b) the list manipulation code assumes nvec >= 1.
466 /* Any bridge which does NOT route MSI transactions from it's
467 * secondary bus to it's primary bus must set NO_MSI flag on
468 * the secondary pci_bus.
469 * We expect only arch-specific PCI host bus controller driver
470 * or quirks for specific PCI bridges to be setting NO_MSI.
472 for (bus = dev->bus; bus; bus = bus->parent)
473 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
476 ret = arch_msi_check_device(dev, nvec, type);
480 if (!pci_find_capability(dev, type))
487 * pci_enable_msi - configure device's MSI capability structure
488 * @dev: pointer to the pci_dev data structure of MSI device function
490 * Setup the MSI capability structure of device function with
491 * a single MSI irq upon its software driver call to request for
492 * MSI mode enabled on its hardware device function. A return of zero
493 * indicates the successful setup of an entry zero with the new MSI
494 * irq or non-zero for otherwise.
496 int pci_enable_msi(struct pci_dev* dev)
500 status = pci_msi_check_device(dev, 1, PCI_CAP_ID_MSI);
504 WARN_ON(!!dev->msi_enabled);
506 /* Check whether driver already requested for MSI-X irqs */
507 if (dev->msix_enabled) {
508 printk(KERN_INFO "PCI: %s: Can't enable MSI. "
509 "Device already has MSI-X enabled\n",
513 status = msi_capability_init(dev);
516 EXPORT_SYMBOL(pci_enable_msi);
518 void pci_disable_msi(struct pci_dev* dev)
520 struct msi_desc *entry;
523 if (!pci_msi_enable || !dev || !dev->msi_enabled)
526 msi_set_enable(dev, 0);
527 pci_intx(dev, 1); /* enable intx */
528 dev->msi_enabled = 0;
530 BUG_ON(list_empty(&dev->msi_list));
531 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
532 if (!entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) {
536 default_irq = entry->msi_attrib.default_irq;
537 msi_free_irq(dev, entry->irq);
539 /* Restore dev->irq to its default pin-assertion irq */
540 dev->irq = default_irq;
542 EXPORT_SYMBOL(pci_disable_msi);
544 static int msi_free_irq(struct pci_dev* dev, int irq)
546 struct msi_desc *entry;
550 BUG_ON(irq_has_action(irq));
552 entry = get_irq_msi(irq);
553 if (!entry || entry->dev != dev) {
556 type = entry->msi_attrib.type;
557 entry_nr = entry->msi_attrib.entry_nr;
558 base = entry->mask_base;
559 list_del(&entry->list);
561 arch_teardown_msi_irq(irq);
564 if (type == PCI_CAP_ID_MSIX) {
565 writel(1, base + entry_nr * PCI_MSIX_ENTRY_SIZE +
566 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
568 if (list_empty(&dev->msi_list))
576 * pci_enable_msix - configure device's MSI-X capability structure
577 * @dev: pointer to the pci_dev data structure of MSI-X device function
578 * @entries: pointer to an array of MSI-X entries
579 * @nvec: number of MSI-X irqs requested for allocation by device driver
581 * Setup the MSI-X capability structure of device function with the number
582 * of requested irqs upon its software driver call to request for
583 * MSI-X mode enabled on its hardware device function. A return of zero
584 * indicates the successful configuration of MSI-X capability structure
585 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
586 * Or a return of > 0 indicates that driver request is exceeding the number
587 * of irqs available. Driver should use the returned value to re-send
590 int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
592 int status, pos, nr_entries;
599 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX);
603 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
604 pci_read_config_word(dev, msi_control_reg(pos), &control);
605 nr_entries = multi_msix_capable(control);
606 if (nvec > nr_entries)
609 /* Check for any invalid entries */
610 for (i = 0; i < nvec; i++) {
611 if (entries[i].entry >= nr_entries)
612 return -EINVAL; /* invalid entry */
613 for (j = i + 1; j < nvec; j++) {
614 if (entries[i].entry == entries[j].entry)
615 return -EINVAL; /* duplicate entry */
618 WARN_ON(!!dev->msix_enabled);
620 /* Check whether driver already requested for MSI irq */
621 if (dev->msi_enabled) {
622 printk(KERN_INFO "PCI: %s: Can't enable MSI-X. "
623 "Device already has an MSI irq assigned\n",
627 status = msix_capability_init(dev, entries, nvec);
630 EXPORT_SYMBOL(pci_enable_msix);
632 static void msix_free_all_irqs(struct pci_dev *dev)
634 struct msi_desc *entry;
636 list_for_each_entry(entry, &dev->msi_list, list)
637 msi_free_irq(dev, entry->irq);
640 void pci_disable_msix(struct pci_dev* dev)
642 if (!pci_msi_enable || !dev || !dev->msix_enabled)
645 msix_set_enable(dev, 0);
646 pci_intx(dev, 1); /* enable intx */
647 dev->msix_enabled = 0;
649 msix_free_all_irqs(dev);
651 EXPORT_SYMBOL(pci_disable_msix);
654 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
655 * @dev: pointer to the pci_dev data structure of MSI(X) device function
657 * Being called during hotplug remove, from which the device function
658 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
659 * allocated for this device function, are reclaimed to unused state,
660 * which may be used later on.
662 void msi_remove_pci_irq_vectors(struct pci_dev* dev)
664 if (!pci_msi_enable || !dev)
667 if (dev->msi_enabled) {
668 struct msi_desc *entry;
669 BUG_ON(list_empty(&dev->msi_list));
670 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
671 msi_free_irq(dev, entry->irq);
674 if (dev->msix_enabled)
675 msix_free_all_irqs(dev);
678 void pci_no_msi(void)
683 void pci_msi_init_pci_dev(struct pci_dev *dev)
685 INIT_LIST_HEAD(&dev->msi_list);
691 int __attribute__ ((weak))
692 arch_msi_check_device(struct pci_dev* dev, int nvec, int type)