static void pl010_stop_tx(struct uart_port *port)
{
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(port->membase + UART010_CR);
+ cr = readb(uap->port.membase + UART010_CR);
cr &= ~UART010_CR_TIE;
- writel(cr, port->membase + UART010_CR);
+ writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_start_tx(struct uart_port *port)
{
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(port->membase + UART010_CR);
+ cr = readb(uap->port.membase + UART010_CR);
cr |= UART010_CR_TIE;
- writel(cr, port->membase + UART010_CR);
+ writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_stop_rx(struct uart_port *port)
{
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(port->membase + UART010_CR);
+ cr = readb(uap->port.membase + UART010_CR);
cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
- writel(cr, port->membase + UART010_CR);
+ writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_enable_ms(struct uart_port *port)
{
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(port->membase + UART010_CR);
+ cr = readb(uap->port.membase + UART010_CR);
cr |= UART010_CR_MSIE;
- writel(cr, port->membase + UART010_CR);
+ writel(cr, uap->port.membase + UART010_CR);
}
-static void pl010_rx_chars(struct uart_port *port)
+static void pl010_rx_chars(struct uart_amba_port *uap)
{
- struct tty_struct *tty = port->info->tty;
+ struct tty_struct *tty = uap->port.info->tty;
unsigned int status, ch, flag, rsr, max_count = 256;
- status = readb(port->membase + UART01x_FR);
+ status = readb(uap->port.membase + UART01x_FR);
while (UART_RX_DATA(status) && max_count--) {
- ch = readb(port->membase + UART01x_DR);
+ ch = readb(uap->port.membase + UART01x_DR);
flag = TTY_NORMAL;
- port->icount.rx++;
+ uap->port.icount.rx++;
/*
* Note that the error handling code is
* out of the main execution path
*/
- rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
+ rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
if (unlikely(rsr & UART01x_RSR_ANY)) {
- writel(0, port->membase + UART01x_ECR);
+ writel(0, uap->port.membase + UART01x_ECR);
if (rsr & UART01x_RSR_BE) {
rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
- port->icount.brk++;
- if (uart_handle_break(port))
+ uap->port.icount.brk++;
+ if (uart_handle_break(&uap->port))
goto ignore_char;
} else if (rsr & UART01x_RSR_PE)
- port->icount.parity++;
+ uap->port.icount.parity++;
else if (rsr & UART01x_RSR_FE)
- port->icount.frame++;
+ uap->port.icount.frame++;
if (rsr & UART01x_RSR_OE)
- port->icount.overrun++;
+ uap->port.icount.overrun++;
- rsr &= port->read_status_mask;
+ rsr &= uap->port.read_status_mask;
if (rsr & UART01x_RSR_BE)
flag = TTY_BREAK;
flag = TTY_FRAME;
}
- if (uart_handle_sysrq_char(port, ch))
+ if (uart_handle_sysrq_char(&uap->port, ch))
goto ignore_char;
- uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag);
+ uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
ignore_char:
- status = readb(port->membase + UART01x_FR);
+ status = readb(uap->port.membase + UART01x_FR);
}
tty_flip_buffer_push(tty);
return;
}
-static void pl010_tx_chars(struct uart_port *port)
+static void pl010_tx_chars(struct uart_amba_port *uap)
{
- struct circ_buf *xmit = &port->info->xmit;
+ struct circ_buf *xmit = &uap->port.info->xmit;
int count;
- if (port->x_char) {
- writel(port->x_char, port->membase + UART01x_DR);
- port->icount.tx++;
- port->x_char = 0;
+ if (uap->port.x_char) {
+ writel(uap->port.x_char, uap->port.membase + UART01x_DR);
+ uap->port.icount.tx++;
+ uap->port.x_char = 0;
return;
}
- if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
- pl010_stop_tx(port);
+ if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
+ pl010_stop_tx(&uap->port);
return;
}
- count = port->fifosize >> 1;
+ count = uap->port.fifosize >> 1;
do {
- writel(xmit->buf[xmit->tail], port->membase + UART01x_DR);
+ writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
- port->icount.tx++;
+ uap->port.icount.tx++;
if (uart_circ_empty(xmit))
break;
} while (--count > 0);
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
- uart_write_wakeup(port);
+ uart_write_wakeup(&uap->port);
if (uart_circ_empty(xmit))
- pl010_stop_tx(port);
+ pl010_stop_tx(&uap->port);
}
-static void pl010_modem_status(struct uart_port *port)
+static void pl010_modem_status(struct uart_amba_port *uap)
{
- struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int status, delta;
writel(0, uap->port.membase + UART010_ICR);
static irqreturn_t pl010_int(int irq, void *dev_id)
{
- struct uart_port *port = dev_id;
+ struct uart_amba_port *uap = dev_id;
unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
int handled = 0;
- spin_lock(&port->lock);
+ spin_lock(&uap->port.lock);
- status = readb(port->membase + UART010_IIR);
+ status = readb(uap->port.membase + UART010_IIR);
if (status) {
do {
if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
- pl010_rx_chars(port);
+ pl010_rx_chars(uap);
if (status & UART010_IIR_MIS)
- pl010_modem_status(port);
+ pl010_modem_status(uap);
if (status & UART010_IIR_TIS)
- pl010_tx_chars(port);
+ pl010_tx_chars(uap);
if (pass_counter-- == 0)
break;
- status = readb(port->membase + UART010_IIR);
+ status = readb(uap->port.membase + UART010_IIR);
} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
UART010_IIR_TIS));
handled = 1;
}
- spin_unlock(&port->lock);
+ spin_unlock(&uap->port.lock);
return IRQ_RETVAL(handled);
}
static unsigned int pl010_tx_empty(struct uart_port *port)
{
- return readb(port->membase + UART01x_FR) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
+ unsigned int status = readb(uap->port.membase + UART01x_FR);
+ return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
}
static unsigned int pl010_get_mctrl(struct uart_port *port)
{
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int result = 0;
unsigned int status;
- status = readb(port->membase + UART01x_FR);
+ status = readb(uap->port.membase + UART01x_FR);
if (status & UART01x_FR_DCD)
result |= TIOCM_CAR;
if (status & UART01x_FR_DSR)
static void pl010_break_ctl(struct uart_port *port, int break_state)
{
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned long flags;
unsigned int lcr_h;
- spin_lock_irqsave(&port->lock, flags);
- lcr_h = readb(port->membase + UART010_LCRH);
+ spin_lock_irqsave(&uap->port.lock, flags);
+ lcr_h = readb(uap->port.membase + UART010_LCRH);
if (break_state == -1)
lcr_h |= UART01x_LCRH_BRK;
else
lcr_h &= ~UART01x_LCRH_BRK;
- writel(lcr_h, port->membase + UART010_LCRH);
- spin_unlock_irqrestore(&port->lock, flags);
+ writel(lcr_h, uap->port.membase + UART010_LCRH);
+ spin_unlock_irqrestore(&uap->port.lock, flags);
}
static int pl010_startup(struct uart_port *port)
/*
* Allocate the IRQ
*/
- retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", port);
+ retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
if (retval)
return retval;
/*
* initialise the old status of the modem signals
*/
- uap->old_status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+ uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
/*
* Finally, enable interrupts
*/
writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
- port->membase + UART010_CR);
+ uap->port.membase + UART010_CR);
return 0;
}
static void pl010_shutdown(struct uart_port *port)
{
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
+
/*
* Free the interrupt
*/
- free_irq(port->irq, port);
+ free_irq(uap->port.irq, uap);
/*
* disable all interrupts, disable the port
*/
- writel(0, port->membase + UART010_CR);
+ writel(0, uap->port.membase + UART010_CR);
/* disable break condition and fifos */
- writel(readb(port->membase + UART010_LCRH) &
+ writel(readb(uap->port.membase + UART010_LCRH) &
~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
- port->membase + UART010_LCRH);
+ uap->port.membase + UART010_LCRH);
}
static void
pl010_set_termios(struct uart_port *port, struct ktermios *termios,
struct ktermios *old)
{
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int lcr_h, old_cr;
unsigned long flags;
unsigned int baud, quot;
/*
* Ask the core to calculate the divisor for us.
*/
- baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
+ baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
quot = uart_get_divisor(port, baud);
switch (termios->c_cflag & CSIZE) {
if (!(termios->c_cflag & PARODD))
lcr_h |= UART01x_LCRH_EPS;
}
- if (port->fifosize > 1)
+ if (uap->port.fifosize > 1)
lcr_h |= UART01x_LCRH_FEN;
- spin_lock_irqsave(&port->lock, flags);
+ spin_lock_irqsave(&uap->port.lock, flags);
/*
* Update the per-port timeout.
*/
uart_update_timeout(port, termios->c_cflag, baud);
- port->read_status_mask = UART01x_RSR_OE;
+ uap->port.read_status_mask = UART01x_RSR_OE;
if (termios->c_iflag & INPCK)
- port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
+ uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
if (termios->c_iflag & (BRKINT | PARMRK))
- port->read_status_mask |= UART01x_RSR_BE;
+ uap->port.read_status_mask |= UART01x_RSR_BE;
/*
* Characters to ignore
*/
- port->ignore_status_mask = 0;
+ uap->port.ignore_status_mask = 0;
if (termios->c_iflag & IGNPAR)
- port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
+ uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
if (termios->c_iflag & IGNBRK) {
- port->ignore_status_mask |= UART01x_RSR_BE;
+ uap->port.ignore_status_mask |= UART01x_RSR_BE;
/*
* If we're ignoring parity and break indicators,
* ignore overruns too (for real raw support).
*/
if (termios->c_iflag & IGNPAR)
- port->ignore_status_mask |= UART01x_RSR_OE;
+ uap->port.ignore_status_mask |= UART01x_RSR_OE;
}
/*
* Ignore all characters if CREAD is not set.
*/
if ((termios->c_cflag & CREAD) == 0)
- port->ignore_status_mask |= UART_DUMMY_RSR_RX;
+ uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
/* first, disable everything */
- old_cr = readb(port->membase + UART010_CR) & ~UART010_CR_MSIE;
+ old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
if (UART_ENABLE_MS(port, termios->c_cflag))
old_cr |= UART010_CR_MSIE;
- writel(0, port->membase + UART010_CR);
+ writel(0, uap->port.membase + UART010_CR);
/* Set baud rate */
quot -= 1;
- writel((quot & 0xf00) >> 8, port->membase + UART010_LCRM);
- writel(quot & 0xff, port->membase + UART010_LCRL);
+ writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
+ writel(quot & 0xff, uap->port.membase + UART010_LCRL);
/*
* ----------v----------v----------v----------v-----
* NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
* ----------^----------^----------^----------^-----
*/
- writel(lcr_h, port->membase + UART010_LCRH);
- writel(old_cr, port->membase + UART010_CR);
+ writel(lcr_h, uap->port.membase + UART010_LCRH);
+ writel(old_cr, uap->port.membase + UART010_CR);
- spin_unlock_irqrestore(&port->lock, flags);
+ spin_unlock_irqrestore(&uap->port.lock, flags);
}
static const char *pl010_type(struct uart_port *port)
static void pl010_console_putchar(struct uart_port *port, int ch)
{
+ struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int status;
do {
- status = readb(port->membase + UART01x_FR);
+ status = readb(uap->port.membase + UART01x_FR);
barrier();
} while (!UART_TX_READY(status));
- writel(ch, port->membase + UART01x_DR);
+ writel(ch, uap->port.membase + UART01x_DR);
}
static void
pl010_console_write(struct console *co, const char *s, unsigned int count)
{
- struct uart_port *port = &amba_ports[co->index]->port;
+ struct uart_amba_port *uap = amba_ports[co->index];
unsigned int status, old_cr;
/*
* First save the CR then disable the interrupts
*/
- old_cr = readb(port->membase + UART010_CR);
- writel(UART01x_CR_UARTEN, port->membase + UART010_CR);
+ old_cr = readb(uap->port.membase + UART010_CR);
+ writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
- uart_console_write(port, s, count, pl010_console_putchar);
+ uart_console_write(&uap->port, s, count, pl010_console_putchar);
/*
* Finally, wait for transmitter to become empty
* and restore the TCR
*/
do {
- status = readb(port->membase + UART01x_FR);
+ status = readb(uap->port.membase + UART01x_FR);
barrier();
} while (status & UART01x_FR_BUSY);
- writel(old_cr, port->membase + UART010_CR);
+ writel(old_cr, uap->port.membase + UART010_CR);
}
static void __init
-pl010_console_get_options(struct uart_port *port, int *baud,
+pl010_console_get_options(struct uart_amba_port *uap, int *baud,
int *parity, int *bits)
{
- if (readb(port->membase + UART010_CR) & UART01x_CR_UARTEN) {
+ if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
unsigned int lcr_h, quot;
- lcr_h = readb(port->membase + UART010_LCRH);
+ lcr_h = readb(uap->port.membase + UART010_LCRH);
*parity = 'n';
if (lcr_h & UART01x_LCRH_PEN) {
else
*bits = 8;
- quot = readb(port->membase + UART010_LCRL) | readb(port->membase + UART010_LCRM) << 8;
- *baud = port->uartclk / (16 * (quot + 1));
+ quot = readb(uap->port.membase + UART010_LCRL) |
+ readb(uap->port.membase + UART010_LCRM) << 8;
+ *baud = uap->port.uartclk / (16 * (quot + 1));
}
}
static int __init pl010_console_setup(struct console *co, char *options)
{
- struct uart_port *port;
+ struct uart_amba_port *uap;
int baud = 38400;
int bits = 8;
int parity = 'n';
*/
if (co->index >= UART_NR)
co->index = 0;
- if (!amba_ports[co->index])
+ uap = amba_ports[co->index];
+ if (!uap)
return -ENODEV;
- port = &amba_ports[co->index]->port;
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
else
- pl010_console_get_options(port, &baud, &parity, &bits);
+ pl010_console_get_options(uap, &baud, &parity, &bits);
- return uart_set_options(port, co, baud, parity, bits, flow);
+ return uart_set_options(&uap->port, co, baud, parity, bits, flow);
}
static struct uart_driver amba_reg;
static int pl010_probe(struct amba_device *dev, void *id)
{
- struct uart_amba_port *port;
+ struct uart_amba_port *uap;
void __iomem *base;
int i, ret;
goto out;
}
- port = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
- if (!port) {
+ uap = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
+ if (!uap) {
ret = -ENOMEM;
goto out;
}
goto free;
}
- port->port.dev = &dev->dev;
- port->port.mapbase = dev->res.start;
- port->port.membase = base;
- port->port.iotype = UPIO_MEM;
- port->port.irq = dev->irq[0];
- port->port.uartclk = 14745600;
- port->port.fifosize = 16;
- port->port.ops = &amba_pl010_pops;
- port->port.flags = UPF_BOOT_AUTOCONF;
- port->port.line = i;
- port->dev = dev;
- port->data = dev->dev.platform_data;
-
- amba_ports[i] = port;
-
- amba_set_drvdata(dev, port);
- ret = uart_add_one_port(&amba_reg, &port->port);
+ uap->port.dev = &dev->dev;
+ uap->port.mapbase = dev->res.start;
+ uap->port.membase = base;
+ uap->port.iotype = UPIO_MEM;
+ uap->port.irq = dev->irq[0];
+ uap->port.uartclk = 14745600;
+ uap->port.fifosize = 16;
+ uap->port.ops = &amba_pl010_pops;
+ uap->port.flags = UPF_BOOT_AUTOCONF;
+ uap->port.line = i;
+ uap->dev = dev;
+ uap->data = dev->dev.platform_data;
+
+ amba_ports[i] = uap;
+
+ amba_set_drvdata(dev, uap);
+ ret = uart_add_one_port(&amba_reg, &uap->port);
if (ret) {
amba_set_drvdata(dev, NULL);
amba_ports[i] = NULL;
iounmap(base);
free:
- kfree(port);
+ kfree(uap);
}
-
out:
return ret;
}
static int pl010_remove(struct amba_device *dev)
{
- struct uart_amba_port *port = amba_get_drvdata(dev);
+ struct uart_amba_port *uap = amba_get_drvdata(dev);
int i;
amba_set_drvdata(dev, NULL);
- uart_remove_one_port(&amba_reg, &port->port);
+ uart_remove_one_port(&amba_reg, &uap->port);
for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
- if (amba_ports[i] == port)
+ if (amba_ports[i] == uap)
amba_ports[i] = NULL;
- iounmap(port->port.membase);
- kfree(port);
-
+ iounmap(uap->port.membase);
+ kfree(uap);
return 0;
}
projects / powerpc.git / commitdiff