[ARM] 4255/1: i.MX/MX1 Correct MPU PLL reference clock value.

Only System PLL clock source is selectable by CSCR_SYSTEM_SEL
bit. MPU PLL is driven by 512*CLK32 for each case.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
index 43525ee..7e70e0b 100644 (file)
--- a/arch/arm/mach-imx/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -83,13 +83,13 @@ static void imx_set_mpctl0(u32 mpctl0)
  * imx_compute_mpctl - compute new PLL parameters
  * @new_mpctl: pointer to location assigned by new PLL control register value
  * @cur_mpctl: current PLL control register parameters
+ * @f_ref:     reference source frequency Hz
  * @freq:      required frequency in Hz
  * @relation:  is one of %CPUFREQ_RELATION_L (supremum)
  *             and %CPUFREQ_RELATION_H (infimum)
  */
-long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, unsigned long freq, int relation)
+long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, u32 f_ref, unsigned long freq, int relation)
 {
-        u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
         u32 mfi;
         u32 mfn;
         u32 mfd;
@@ -204,7 +204,7 @@ static int imx_set_target(struct cpufreq_policy *policy,
        sysclk = imx_get_system_clk();
 
        if (freq > sysclk / bclk_div_at_boot + 1000000) {
-               freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, freq, relation);
+               freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, CLK32 * 512, freq, relation);
                if (freq < 0) {
                        printk(KERN_WARNING "imx: target frequency %ld Hz cannot be set\n", freq);
                        return -EINVAL;

diff --git a/arch/arm/mach-imx/generic.c b/arch/arm/mach-imx/generic.c
index b5aa49d..7a7fa51 100644 (file)
--- a/arch/arm/mach-imx/generic.c
+++ b/arch/arm/mach-imx/generic.c
@@ -102,7 +102,7 @@ EXPORT_SYMBOL(imx_gpio_mode);
  *  f = 2 * f_ref * --------------------
  *                        pd + 1
  */
-static unsigned int imx_decode_pll(unsigned int pll)
+static unsigned int imx_decode_pll(unsigned int pll, u32 f_ref)
 {
        unsigned long long ll;
        unsigned long quot;
@@ -111,7 +111,6 @@ static unsigned int imx_decode_pll(unsigned int pll)
        u32 mfn = pll & 0x3ff;
        u32 mfd = (pll >> 16) & 0x3ff;
        u32 pd =  (pll >> 26) & 0xf;
-       u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
 
        mfi = mfi <= 5 ? 5 : mfi;
 
@@ -124,13 +123,15 @@ static unsigned int imx_decode_pll(unsigned int pll)
 
 unsigned int imx_get_system_clk(void)
 {
-       return imx_decode_pll(SPCTL0);
+       u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
+
+       return imx_decode_pll(SPCTL0, f_ref);
 }
 EXPORT_SYMBOL(imx_get_system_clk);
 
 unsigned int imx_get_mcu_clk(void)
 {
-       return imx_decode_pll(MPCTL0);
+       return imx_decode_pll(MPCTL0, CLK32 * 512);
 }
 EXPORT_SYMBOL(imx_get_mcu_clk);