1 /*****************************************************************************
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5 * File : TWI_Master.h
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6 * Compiler : IAR EWAAVR 2.28a/3.10c
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7 * Revision : $Revision: 1.13 $
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8 * Date : $Date: 24. mai 2004 11:31:22 $
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9 * Updated by : $Author: ltwa $
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11 * Support mail : avr@atmel.com
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13 * Supported devices : All devices with a TWI module can be used.
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14 * The example is written for the ATmega16
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16 * AppNote : AVR315 - TWI Master Implementation
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18 * Description : Header file for TWI_Master.c
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19 * Include this file in the application.
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21 ****************************************************************************/
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23 /****************************************************************************
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24 TWI Status/Control register definitions
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25 ****************************************************************************/
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26 //#define TWI_BUFFER_SIZE 4 // Set this to the largest message size that will be sent including address byte.
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28 #define TWI_TWBR 0x0C // TWI Bit rate Register setting.
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29 // Se Application note for detailed
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30 // information on setting this value.
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31 // Not used defines!
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32 //#define TWI_TWPS 0x00 // This driver presumes prescaler = 00
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34 /****************************************************************************
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36 ****************************************************************************/
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38 union TWI_statusReg // Status byte holding flags.
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43 unsigned char lastTransOK:1;
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44 unsigned char unusedBits:7;
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48 extern union TWI_statusReg TWI_statusReg;
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50 /****************************************************************************
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51 Function definitions
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52 ****************************************************************************/
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53 void TWI_Master_Initialise( void );
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54 unsigned char TWI_Transceiver_Busy( void );
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55 unsigned char TWI_Get_State_Info( void );
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56 void TWI_Start_Transceiver_With_Data(
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57 unsigned char *msg, unsigned char msgSize, unsigned char sendStop );
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58 void TWI_Start_Transceiver( void );
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59 unsigned char TWI_Get_Data_From_Transceiver( unsigned char *, unsigned char );
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61 /****************************************************************************
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62 Bit and byte definitions
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63 ****************************************************************************/
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64 #define TWI_READ_BIT 0 // Bit position for R/W bit in "address byte".
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65 #define TWI_ADR_BITS 1 // Bit position for LSB of the slave address bits in the init byte.
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70 /****************************************************************************
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72 ****************************************************************************/
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73 // General TWI Master staus codes
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74 #define TWI_START 0x08 // START has been transmitted
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75 #define TWI_REP_START 0x10 // Repeated START has been transmitted
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76 #define TWI_ARB_LOST 0x38 // Arbitration lost
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78 // TWI Master Transmitter staus codes
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79 #define TWI_MTX_ADR_ACK 0x18 // SLA+W has been tramsmitted and ACK received
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80 #define TWI_MTX_ADR_NACK 0x20 // SLA+W has been tramsmitted and NACK received
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81 #define TWI_MTX_DATA_ACK 0x28 // Data byte has been tramsmitted and ACK received
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82 #define TWI_MTX_DATA_NACK 0x30 // Data byte has been tramsmitted and NACK received
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84 // TWI Master Receiver staus codes
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85 #define TWI_MRX_ADR_ACK 0x40 // SLA+R has been tramsmitted and ACK received
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86 #define TWI_MRX_ADR_NACK 0x48 // SLA+R has been tramsmitted and NACK received
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87 #define TWI_MRX_DATA_ACK 0x50 // Data byte has been received and ACK tramsmitted
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88 #define TWI_MRX_DATA_NACK 0x58 // Data byte has been received and NACK tramsmitted
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90 // TWI Slave Transmitter staus codes
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91 #define TWI_STX_ADR_ACK 0xA8 // Own SLA+R has been received; ACK has been returned
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92 #define TWI_STX_ADR_ACK_M_ARB_LOST 0xB0 // Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned
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93 #define TWI_STX_DATA_ACK 0xB8 // Data byte in TWDR has been transmitted; ACK has been received
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94 #define TWI_STX_DATA_NACK 0xC0 // Data byte in TWDR has been transmitted; NOT ACK has been received
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95 #define TWI_STX_DATA_ACK_LAST_BYTE 0xC8 // Last data byte in TWDR has been transmitted (TWEA = �0�); ACK has been received
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97 // TWI Slave Receiver staus codes
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98 #define TWI_SRX_ADR_ACK 0x60 // Own SLA+W has been received ACK has been returned
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99 #define TWI_SRX_ADR_ACK_M_ARB_LOST 0x68 // Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned
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100 #define TWI_SRX_GEN_ACK 0x70 // General call address has been received; ACK has been returned
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101 #define TWI_SRX_GEN_ACK_M_ARB_LOST 0x78 // Arbitration lost in SLA+R/W as Master; General call address has been received; ACK has been returned
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102 #define TWI_SRX_ADR_DATA_ACK 0x80 // Previously addressed with own SLA+W; data has been received; ACK has been returned
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103 #define TWI_SRX_ADR_DATA_NACK 0x88 // Previously addressed with own SLA+W; data has been received; NOT ACK has been returned
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104 #define TWI_SRX_GEN_DATA_ACK 0x90 // Previously addressed with general call; data has been received; ACK has been returned
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105 #define TWI_SRX_GEN_DATA_NACK 0x98 // Previously addressed with general call; data has been received; NOT ACK has been returned
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106 #define TWI_SRX_STOP_RESTART 0xA0 // A STOP condition or repeated START condition has been received while still addressed as Slave
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108 // TWI Miscellaneous status codes
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109 #define TWI_NO_STATE 0xF8 // No relevant state information available; TWINT = �0�
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110 #define TWI_BUS_ERROR 0x00 // Bus error due to an illegal START or STOP condition
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