4 Handles the 8 bits and 16 bits AVR timer.
9 Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
11 This file is part of simavr.
13 simavr is free software: you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation, either version 3 of the License, or
16 (at your option) any later version.
18 simavr is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
23 You should have received a copy of the GNU General Public License
24 along with simavr. If not, see <http://www.gnu.org/licenses/>.
28 #include "avr_timer.h"
29 #include "avr_ioport.h"
32 * The timers are /always/ 16 bits here, if the higher byte register
33 * is specified it's just added.
35 static uint16_t _timer_get_ocr(avr_timer_t * p, int compi)
37 return p->io.avr->data[p->comp[compi].r_ocr] |
38 (p->comp[compi].r_ocrh ? (p->io.avr->data[p->comp[compi].r_ocrh] << 8) : 0);
40 static uint16_t _timer_get_tcnt(avr_timer_t * p)
42 return p->io.avr->data[p->r_tcnt] |
43 (p->r_tcnth ? (p->io.avr->data[p->r_tcnth] << 8) : 0);
45 static uint16_t _timer_get_icr(avr_timer_t * p)
47 return p->io.avr->data[p->r_icr] |
48 (p->r_tcnth ? (p->io.avr->data[p->r_icrh] << 8) : 0);
50 static avr_cycle_count_t avr_timer_comp(avr_timer_t *p, avr_cycle_count_t when, uint8_t comp)
52 avr_t * avr = p->io.avr;
53 avr_raise_interrupt(avr, &p->comp[comp].interrupt);
55 // check output compare mode and set/clear pins
56 uint8_t mode = avr_regbit_get(avr, p->comp[comp].com);
57 avr_irq_t * irq = &p->io.irq[TIMER_IRQ_OUT_COMP + comp];
60 case avr_timer_com_normal: // Normal mode OCnA disconnected
62 case avr_timer_com_toggle: // Toggle OCnA on compare match
63 if (p->comp[comp].com_pin.reg) // we got a physical pin
65 0x100 + (avr_regbit_get(avr, p->comp[comp].com_pin) ? 0 : 1));
66 else // no pin, toggle the IRQ anyway
68 p->io.irq[TIMER_IRQ_OUT_COMP + comp].value ? 0 : 1);
70 case avr_timer_com_clear:
71 avr_raise_irq(irq, 0);
73 case avr_timer_com_set:
74 avr_raise_irq(irq, 1);
78 return p->tov_cycles ? 0 : p->comp[comp].comp_cycles ? when
79 + p->comp[comp].comp_cycles : 0;
82 static avr_cycle_count_t avr_timer_compa(struct avr_t * avr, avr_cycle_count_t when, void * param)
84 return avr_timer_comp((avr_timer_t*)param, when, AVR_TIMER_COMPA);
87 static avr_cycle_count_t avr_timer_compb(struct avr_t * avr, avr_cycle_count_t when, void * param)
89 return avr_timer_comp((avr_timer_t*)param, when, AVR_TIMER_COMPB);
92 static avr_cycle_count_t avr_timer_compc(struct avr_t * avr, avr_cycle_count_t when, void * param)
94 return avr_timer_comp((avr_timer_t*)param, when, AVR_TIMER_COMPC);
98 static avr_cycle_count_t avr_timer_tov(struct avr_t * avr, avr_cycle_count_t when, void * param)
100 avr_timer_t * p = (avr_timer_t *)param;
101 int start = p->tov_base == 0;
104 avr_raise_interrupt(avr, &p->overflow);
107 static const avr_cycle_timer_t dispatch[AVR_TIMER_COMP_COUNT] =
108 { avr_timer_compa, avr_timer_compb, avr_timer_compc };
110 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
111 if (p->comp[compi].comp_cycles) {
112 if (p->comp[compi].comp_cycles < p->tov_cycles)
113 avr_cycle_timer_register(avr,
114 p->comp[compi].comp_cycles,
116 else if (p->tov_cycles == p->comp[compi].comp_cycles && !start)
117 dispatch[compi](avr, when, param);
121 return when + p->tov_cycles;
124 static uint16_t _avr_timer_get_current_tcnt(avr_timer_t * p)
126 avr_t * avr = p->io.avr;
128 uint64_t when = avr->cycle - p->tov_base;
130 return (when * (((uint32_t)p->tov_top)+1)) / p->tov_cycles;
135 static uint8_t avr_timer_tcnt_read(struct avr_t * avr, avr_io_addr_t addr, void * param)
137 avr_timer_t * p = (avr_timer_t *)param;
138 // made to trigger potential watchpoints
140 uint16_t tcnt = _avr_timer_get_current_tcnt(p);
142 avr->data[p->r_tcnt] = tcnt;
144 avr->data[p->r_tcnth] = tcnt >> 8;
146 return avr_core_watch_read(avr, addr);
149 static void avr_timer_tcnt_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
151 avr_timer_t * p = (avr_timer_t *)param;
152 avr_core_watch_write(avr, addr, v);
153 uint16_t tcnt = _timer_get_tcnt(p);
158 if (tcnt >= p->tov_top)
161 // this involves some magicking
162 // cancel the current timers, recalculate the "base" we should be at, reset the
163 // timer base as it should, and re-shedule the timers using that base.
165 avr_cycle_timer_cancel(avr, avr_timer_tov, p);
166 avr_cycle_timer_cancel(avr, avr_timer_compa, p);
167 avr_cycle_timer_cancel(avr, avr_timer_compb, p);
168 avr_cycle_timer_cancel(avr, avr_timer_compc, p);
170 uint64_t cycles = (tcnt * p->tov_cycles) / p->tov_top;
172 // printf("%s-%c %d/%d -- cycles %d/%d\n", __FUNCTION__, p->name, tcnt, p->tov_top, (uint32_t)cycles, (uint32_t)p->tov_cycles);
174 // this reset the timers bases to the new base
176 avr_cycle_timer_register(avr, p->tov_cycles - cycles, avr_timer_tov, p);
177 avr_timer_tov(avr, avr->cycle - cycles, p);
179 // tcnt = ((avr->cycle - p->tov_base) * p->tov_top) / p->tov_cycles;
180 // printf("%s-%c new tnt derive to %d\n", __FUNCTION__, p->name, tcnt);
183 static void avr_timer_configure(avr_timer_t * p, uint32_t clock, uint32_t top)
185 float t = clock / (float)(top+1);
186 float frequency = p->io.avr->frequency;
191 p->tov_cycles = frequency / t; // avr_hz_to_cycles(frequency, t);
192 printf("%s-%c TOP %.2fHz = %d cycles\n", __FUNCTION__, p->name, t, (int)p->tov_cycles);
194 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
195 uint32_t ocr = _timer_get_ocr(p, compi);
196 float fc = clock / (float)(ocr+1);
198 p->comp[compi].comp_cycles = 0;
199 // printf("%s-%c clock %d top %d OCR%c %d\n", __FUNCTION__, p->name, clock, top, 'A'+compi, ocr);
201 if (ocr && ocr <= top) {
202 p->comp[compi].comp_cycles = frequency / fc; // avr_hz_to_cycles(p->io.avr, fa);
203 printf("%s-%c %c %.2fHz = %d cycles\n", __FUNCTION__, p->name,
204 'A'+compi, fc, (int)p->comp[compi].comp_cycles);
208 if (p->tov_cycles > 1) {
209 avr_cycle_timer_register(p->io.avr, p->tov_cycles, avr_timer_tov, p);
210 // calling it once, with when == 0 tells it to arm the A/B/C timers if needed
212 avr_timer_tov(p->io.avr, p->io.avr->cycle, p);
216 static void avr_timer_reconfigure(avr_timer_t * p)
218 avr_t * avr = p->io.avr;
220 avr_timer_wgm_t zero={0};
223 p->comp[AVR_TIMER_COMPA].comp_cycles = 0;
224 p->comp[AVR_TIMER_COMPB].comp_cycles = 0;
225 p->comp[AVR_TIMER_COMPC].comp_cycles = 0;
228 avr_cycle_timer_cancel(avr, avr_timer_tov, p);
229 avr_cycle_timer_cancel(avr, avr_timer_compa, p);
230 avr_cycle_timer_cancel(avr, avr_timer_compb, p);
231 avr_cycle_timer_cancel(avr, avr_timer_compc, p);
233 long clock = avr->frequency;
235 // only can exists on "asynchronous" 8 bits timers
236 if (avr_regbit_get(avr, p->as2))
239 uint8_t cs = avr_regbit_get_array(avr, p->cs, ARRAY_SIZE(p->cs));
241 printf("%s-%c clock turned off\n", __FUNCTION__, p->name);
245 uint8_t mode = avr_regbit_get_array(avr, p->wgm, ARRAY_SIZE(p->wgm));
246 uint8_t cs_div = p->cs_div[cs];
247 uint32_t f = clock >> cs_div;
249 p->mode = p->wgm_op[mode];
250 //printf("%s-%c clock %d, div %d(/%d) = %d ; mode %d\n", __FUNCTION__, p->name, clock, cs, 1 << cs_div, f, mode);
251 switch (p->mode.kind) {
252 case avr_timer_wgm_normal:
253 avr_timer_configure(p, f, (1 << p->mode.size) - 1);
255 case avr_timer_wgm_ctc: {
256 avr_timer_configure(p, f, _timer_get_ocr(p, AVR_TIMER_COMPA));
258 case avr_timer_wgm_pwm: {
259 uint16_t top = p->mode.top == avr_timer_wgm_reg_ocra ? _timer_get_ocr(p, AVR_TIMER_COMPA) : _timer_get_icr(p);
260 avr_timer_configure(p, f, top);
262 case avr_timer_wgm_fast_pwm:
263 avr_timer_configure(p, f, (1 << p->mode.size) - 1);
266 printf("%s-%c unsupported timer mode wgm=%d (%d)\n", __FUNCTION__, p->name, mode, p->mode.kind);
270 static void avr_timer_write_ocr(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
272 avr_timer_t * p = (avr_timer_t *)param;
273 avr_core_watch_write(avr, addr, v);
275 switch (p->mode.kind) {
276 case avr_timer_wgm_normal:
277 avr_timer_reconfigure(p);
279 case avr_timer_wgm_pwm:
280 if (p->mode.top != avr_timer_wgm_reg_ocra) {
281 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM0, _timer_get_ocr(p, AVR_TIMER_COMPA));
282 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM1, _timer_get_ocr(p, AVR_TIMER_COMPB));
285 case avr_timer_wgm_fast_pwm:
286 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM0, _timer_get_ocr(p, AVR_TIMER_COMPA));
287 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM1, _timer_get_ocr(p, AVR_TIMER_COMPB));
290 printf("%s-%c mode %d UNSUPORTED\n", __FUNCTION__, p->name, p->mode.kind);
291 avr_timer_reconfigure(p);
296 static void avr_timer_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
298 avr_timer_t * p = (avr_timer_t *)param;
300 uint8_t as2 = avr_regbit_get(avr, p->as2);
301 uint8_t cs = avr_regbit_get_array(avr, p->cs, ARRAY_SIZE(p->cs));
302 uint8_t mode = avr_regbit_get_array(avr, p->wgm, ARRAY_SIZE(p->wgm));
304 avr_core_watch_write(avr, addr, v);
306 // only reconfigure the timer if "relevant" bits have changed
307 // this prevent the timer reset when changing the edge detector
308 // or other minor bits
309 if (avr_regbit_get_array(avr, p->cs, ARRAY_SIZE(p->cs)) != cs ||
310 avr_regbit_get_array(avr, p->wgm, ARRAY_SIZE(p->wgm)) != mode ||
311 avr_regbit_get(avr, p->as2) != as2) {
312 avr_timer_reconfigure(p);
317 * write to the TIFR register. Watch for code that writes "1" to clear
318 * pending interrupts.
320 static void avr_timer_write_pending(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
322 avr_timer_t * p = (avr_timer_t *)param;
323 // save old bits values
324 uint8_t ov = avr_regbit_get(avr, p->overflow.raised);
325 uint8_t ic = avr_regbit_get(avr, p->icr.raised);
326 uint8_t cp[AVR_TIMER_COMP_COUNT];
328 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++)
329 cp[compi] = avr_regbit_get(avr, p->comp[compi].interrupt.raised);
332 avr_core_watch_write(avr, addr, v);
334 // clear any interrupts & flags
335 avr_clear_interrupt_if(avr, &p->overflow, ov);
336 avr_clear_interrupt_if(avr, &p->icr, ic);
338 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++)
339 avr_clear_interrupt_if(avr, &p->comp[compi].interrupt, cp[compi]);
342 static void avr_timer_irq_icp(struct avr_irq_t * irq, uint32_t value, void * param)
344 avr_timer_t * p = (avr_timer_t *)param;
345 avr_t * avr = p->io.avr;
347 // input capture disabled when ICR is used as top
348 if (p->mode.top == avr_timer_wgm_reg_icr)
351 if (avr_regbit_get(avr, p->ices)) { // rising edge
352 if (!irq->value && value)
354 } else { // default, falling edge
355 if (irq->value && !value)
360 // get current TCNT, copy it to ICR, and raise interrupt
361 uint16_t tcnt = _avr_timer_get_current_tcnt(p);
362 avr->data[p->r_icr] = tcnt;
364 avr->data[p->r_icrh] = tcnt >> 8;
365 avr_raise_interrupt(avr, &p->icr);
368 static void avr_timer_reset(avr_io_t * port)
370 avr_timer_t * p = (avr_timer_t *)port;
371 avr_cycle_timer_cancel(p->io.avr, avr_timer_tov, p);
372 avr_cycle_timer_cancel(p->io.avr, avr_timer_compa, p);
373 avr_cycle_timer_cancel(p->io.avr, avr_timer_compb, p);
374 avr_cycle_timer_cancel(p->io.avr, avr_timer_compc, p);
376 // check to see if the comparators have a pin output. If they do,
377 // (try) to get the ioport corresponding IRQ and connect them
378 // they will automagically be triggered when the comparator raises
380 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
381 p->comp[compi].comp_cycles = 0;
383 avr_ioport_getirq_t req = {
384 .bit = p->comp[compi].com_pin
386 if (avr_ioctl(port->avr, AVR_IOCTL_IOPORT_GETIRQ_REGBIT, &req) > 0) {
388 // printf("%s-%c COMP%c Connecting PIN IRQ %d\n", __FUNCTION__, p->name, 'A'+compi, req.irq[0]->irq);
389 avr_connect_irq(&port->irq[TIMER_IRQ_OUT_COMP + compi], req.irq[0]);
392 avr_ioport_getirq_t req = {
395 if (avr_ioctl(port->avr, AVR_IOCTL_IOPORT_GETIRQ_REGBIT, &req) > 0) {
396 // cool, got an IRQ for the input capture pin
397 // printf("%s-%c ICP Connecting PIN IRQ %d\n", __FUNCTION__, p->name, req.irq[0]->irq);
398 avr_irq_register_notify(req.irq[0], avr_timer_irq_icp, p);
403 static const char * irq_names[TIMER_IRQ_COUNT] = {
404 [TIMER_IRQ_OUT_PWM0] = "8>pwm0",
405 [TIMER_IRQ_OUT_PWM1] = "8>pwm1",
406 [TIMER_IRQ_OUT_COMP + 0] = ">compa",
407 [TIMER_IRQ_OUT_COMP + 1] = ">compb",
408 [TIMER_IRQ_OUT_COMP + 2] = ">compc",
411 static avr_io_t _io = {
413 .reset = avr_timer_reset,
414 .irq_names = irq_names,
417 void avr_timer_init(avr_t * avr, avr_timer_t * p)
421 avr_register_io(avr, &p->io);
422 avr_register_vector(avr, &p->overflow);
423 avr_register_vector(avr, &p->icr);
425 // allocate this module's IRQ
426 avr_io_setirqs(&p->io, AVR_IOCTL_TIMER_GETIRQ(p->name), TIMER_IRQ_COUNT, NULL);
428 // marking IRQs as "filtered" means they don't propagate if the
429 // new value raised is the same as the last one.. in the case of the
430 // pwm value it makes sense not to bother.
431 p->io.irq[TIMER_IRQ_OUT_PWM0].flags |= IRQ_FLAG_FILTERED;
432 p->io.irq[TIMER_IRQ_OUT_PWM1].flags |= IRQ_FLAG_FILTERED;
434 if (p->wgm[0].reg) // these are not present on older AVRs
435 avr_register_io_write(avr, p->wgm[0].reg, avr_timer_write, p);
436 avr_register_io_write(avr, p->cs[0].reg, avr_timer_write, p);
438 // this assumes all the "pending" interrupt bits are in the same
439 // register. Might not be true on all devices ?
440 avr_register_io_write(avr, p->overflow.raised.reg, avr_timer_write_pending, p);
443 * Even if the timer is 16 bits, we don't care to have watches on the
444 * high bytes because the datasheet says that the low address is always
447 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
448 avr_register_vector(avr, &p->comp[compi].interrupt);
450 if (p->comp[compi].r_ocr) // not all timers have all comparators
451 avr_register_io_write(avr, p->comp[compi].r_ocr, avr_timer_write_ocr, p);
453 avr_register_io_write(avr, p->r_tcnt, avr_timer_tcnt_write, p);
454 avr_register_io_read(avr, p->r_tcnt, avr_timer_tcnt_read, p);