4 Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
6 This file is part of simavr.
8 simavr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
13 simavr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with simavr. If not, see <http://www.gnu.org/licenses/>.
34 typedef uint64_t avr_cycle_count_t;
35 typedef uint16_t avr_io_addr_t;
37 // printf() conversion specifier for avr_cycle_count_t
38 #define PRI_avr_cycle_count PRIu64
41 typedef uint8_t (*avr_io_read_t)(struct avr_t * avr, avr_io_addr_t addr, void * param);
42 typedef void (*avr_io_write_t)(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param);
43 typedef avr_cycle_count_t (*avr_cycle_timer_t)(struct avr_t * avr, avr_cycle_count_t when, void * param);
47 S_C = 0,S_Z,S_N,S_V,S_S,S_H,S_T,S_I,
49 // 16 bits register pairs
50 R_XL = 0x1a, R_XH,R_YL,R_YH,R_ZL,R_ZH,
52 R_SPL = 32+0x3d, R_SPH,
56 // maximum number of IO registers, on normal AVRs
57 MAX_IOs = 256 - 32, // minus 32 GP registers
60 #define AVR_DATA_TO_IO(v) ((v) - 32)
61 #define AVR_IO_TO_DATA(v) ((v) + 32)
67 cpu_Limbo = 0, // before initialization is finished
68 cpu_Stopped, // all is stopped, timers included
70 cpu_Running, // we're free running
72 cpu_Sleeping, // we're now sleeping until an interrupt
74 cpu_Step, // run ONE instruction, then...
75 cpu_StepDone, // tell gdb it's all OK, and give it registers
79 * Main AVR instance. Some of these fields are set by the AVR "Core" definition files
80 * the rest is runtime data (as little as possible)
82 typedef struct avr_t {
83 const char * mmcu; // name of the AVR
84 // these are filled by sim_core_declare from constants in /usr/lib/avr/include/avr/io*.h
91 avr_io_addr_t rampz; // optional, only for ELPM/SPM on >64Kb cores
92 avr_io_addr_t eind; // optional, only for EIJMP/EICALL on >64Kb cores
94 // filled by the ELF data, this allow tracking of invalid jumps
97 int state; // stopped, running, sleeping
98 uint32_t frequency; // frequency we are running at
99 // mostly used by the ADC for now
100 uint32_t vcc,avcc,aref; // (optional) voltages in millivolts
102 // cycles gets incremented when sleeping and when running; it corresponds
103 // not only to "cycles that runs" but also "cycles that might have run"
105 avr_cycle_count_t cycle; // current cycle
107 // called at init time
108 void (*init)(struct avr_t * avr);
109 // called at init time (for special purposes like using a memory mapped file as flash see: simduino)
110 void (*special_init)(struct avr_t * avr);
111 // called at termination time ( to clean special initalizations)
112 void (*special_deinit)(struct avr_t * avr);
113 // called at reset time
114 void (*reset)(struct avr_t * avr);
117 * Default AVR core run function.
118 * Two modes are available, a "raw" run that goes as fast as
119 * it can, and a "gdb" mode that also watchouts for gdb events
120 * and is a little bit slower.
122 void (*run)(struct avr_t * avr);
125 * Sleep default behaviour.
126 * In "raw" mode, it calls usleep, in gdb mode, it waits
127 * for howLong for gdb command on it's sockets.
129 void (*sleep)(struct avr_t * avr, avr_cycle_count_t howLong);
132 * Every IRQs will be stored in this pool. It is not
133 * mandatory (yet) but will allow listing IRQs and their connections
135 avr_irq_pool_t irq_pool;
137 // Mirror of the SREG register, to facilitate the access to bits
138 // in the opcode decoder.
139 // This array is re-synthetized back/forth when SREG changes
141 uint8_t i_shadow; // used to detect edges on I flag
145 * Note that the PC is representing /bytes/ while the AVR value is
146 * assumed to be "words". This is in line with what GDB does...
147 * this is why you will see >>1 and <<1 in the decoder to handle jumps.
148 * It CAN be a little confusing, so concentrate, young grasshopper.
153 * callback when specific IO registers are read/written.
154 * There is one drawback here, there is in way of knowing what is the
155 * "beginning of useful sram" on a core, so there is no way to deduce
156 * what is the maximum IO register for a core, and thus, we can't
157 * allocate this table dynamically.
158 * If you wanted to emulate the BIG AVRs, and XMegas, this would need
162 struct avr_irq_t * irq; // optional, used only if asked for with avr_iomem_getirq()
174 * This block allows sharing of the IO write/read on addresses between
175 * multiple callbacks. In 99% of case it's not needed, however on the tiny*
176 * (tiny85 at last) some registers have bits that are used by different
178 * If this case is detected, a special "dispatch" callback is installed that
179 * will handle this particular case, without impacting the performance of the
180 * other, normal cases...
182 int io_shared_io_count;
191 // flash memory (initialized to 0xff, and code loaded into it)
193 // this is the general purpose registers, IO registers, and SRAM
196 // queue of io modules
197 struct avr_io_t *io_port;
199 // cycle timers are callbacks that will be called when "when" cycle is reached
200 // the bitmap allows quick knowledge of whether there is anything to call
201 // these timers are one shots, then get cleared if the timer function returns zero,
202 // they get reset if the callback function returns a new cycle number
203 uint32_t cycle_timer_map;
204 avr_cycle_count_t next_cycle_timer;
206 avr_cycle_count_t when;
207 avr_cycle_timer_t timer;
211 // interrupt vectors, and their enable/clear registers
212 struct avr_int_vector_t * vector[64];
213 uint8_t pending_wait; // number of cycles to wait for pending
214 uint32_t pending[2]; // pending interrupts
216 // DEBUG ONLY -- value ignored if CONFIG_SIMAVR_TRACE = 0
219 #if CONFIG_SIMAVR_TRACE
220 struct avr_symbol_t ** codeline;
223 * this keeps track of "jumps" ie, call,jmp,ret,reti and so on
224 * allows dumping of a meaningful data even if the stack is
227 #define OLD_PC_SIZE 32
231 } old[OLD_PC_SIZE]; // catches reset..
235 #define STACK_FRAME_SIZE 32
236 // this records the call/ret pairs, to try to catch
237 // code that munches the stack -under- their own frame
241 } stack_frame[STACK_FRAME_SIZE];
242 int stack_frame_index;
246 // keeps track of which registers gets touched by instructions
247 // reset before each new instructions. Allows meaningful traces
248 uint32_t touched[256 / 32]; // debug
251 // VALUE CHANGE DUMP file (waveforms)
252 // this is the VCD file that gets allocated if the
253 // firmware that is loaded explicitly asks for a trace
254 // to be generated, and allocates it's own symbols
255 // using AVR_MMCU_TAG_VCD_TRACE (see avr_mcu_section.h)
256 struct avr_vcd_t * vcd;
258 // gdb hooking structure. Only present when gdb server is active
259 struct avr_gdb_t * gdb;
261 // if non-zero, the gdb server will be started when the core
262 // crashed even if not activated at startup
263 // if zero, the simulator will just exit() in case of a crash
268 // this is a static constructor for each of the AVR devices
269 typedef struct avr_kind_t {
270 const char * names[4]; // name aliases
274 // a symbol loaded from the .elf file
275 typedef struct avr_symbol_t {
280 // locate the maker for mcu "name" and allocates a new avr instance
281 avr_t * avr_make_mcu_by_name(const char *name);
282 // initializes a new AVR instance. Will call the IO registers init(), and then reset()
283 int avr_init(avr_t * avr);
284 // resets the AVR, and the IO modules
285 void avr_reset(avr_t * avr);
286 // run one cycle of the AVR, sleep if necessary
287 int avr_run(avr_t * avr);
288 // finish any pending operations
289 void avr_terminate(avr_t * avr);
291 // set an IO register to receive commands from the AVR firmware
292 // it's optional, and uses the ELF tags
293 void avr_set_command_register(avr_t * avr, avr_io_addr_t addr);
295 // specify the "console register" -- output sent to this register
296 // is printed on the simulator console, without using a UART
297 void avr_set_console_register(avr_t * avr, avr_io_addr_t addr);
299 // load code in the "flash"
300 void avr_loadcode(avr_t * avr, uint8_t * code, uint32_t size, uint32_t address);
304 * these are accessors for avr->data but allows watchpoints to be set for gdb
305 * IO modules use that to set values to registers, and the AVR core decoder uses
306 * that to register "public" read by instructions.
308 void avr_core_watch_write(avr_t *avr, uint16_t addr, uint8_t v);
309 uint8_t avr_core_watch_read(avr_t *avr, uint16_t addr);
311 // called when the core has detected a crash somehow.
312 // this might activate gdb server
313 void avr_sadly_crashed(avr_t *avr, uint8_t signal);
317 * These are callbacks for the two 'main' bahaviour in simavr
319 void avr_callback_sleep_gdb(avr_t * avr, avr_cycle_count_t howLong);
320 void avr_callback_run_gdb(avr_t * avr);
321 void avr_callback_sleep_raw(avr_t * avr, avr_cycle_count_t howLong);
322 void avr_callback_run_raw(avr_t * avr);
329 #include "sim_regbit.h"
330 #include "sim_interrupts.h"
331 #include "sim_cycle_timers.h"
333 #endif /*__SIM_AVR_H__*/