DSO138_SourceCodes_v037.rar
[DSO138] / Libraries / CMSIS / CM3 / DeviceSupport / ST / STM32F10x / startup / arm / startup_stm32f10x_ld.s
1 ;******************** (C) COPYRIGHT 2010 STMicroelectronics ********************\r
2 ;* File Name          : startup_stm32f10x_ld.s\r
3 ;* Author             : MCD Application Team\r
4 ;* Version            : V3.3.0\r
5 ;* Date               : 04/16/2010\r
6 ;* Description        : STM32F10x Low Density Devices vector table for RVMDK \r
7 ;*                      toolchain. \r
8 ;*                      This module performs:\r
9 ;*                      - Set the initial SP\r
10 ;*                      - Set the initial PC == Reset_Handler\r
11 ;*                      - Set the vector table entries with the exceptions ISR address\r
12 ;*                      - Configure the clock system\r
13 ;*                      - Branches to __main in the C library (which eventually\r
14 ;*                        calls main()).\r
15 ;*                      After Reset the CortexM3 processor is in Thread mode,\r
16 ;*                      priority is Privileged, and the Stack is set to Main.\r
17 ;* <<< Use Configuration Wizard in Context Menu >>>   \r
18 ;*******************************************************************************\r
19 ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
20 ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.\r
21 ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,\r
22 ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE\r
23 ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING\r
24 ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
25 ;*******************************************************************************\r
26 \r
27 ; Amount of memory (in bytes) allocated for Stack\r
28 ; Tailor this value to your application needs\r
29 ; <h> Stack Configuration\r
30 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
31 ; </h>\r
32 \r
33 Stack_Size      EQU     0x00000400\r
34 \r
35                 AREA    STACK, NOINIT, READWRITE, ALIGN=3\r
36 Stack_Mem       SPACE   Stack_Size\r
37 __initial_sp\r
38 \r
39 \r
40 ; <h> Heap Configuration\r
41 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
42 ; </h>\r
43 \r
44 Heap_Size       EQU     0x00000200\r
45 \r
46                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3\r
47 __heap_base\r
48 Heap_Mem        SPACE   Heap_Size\r
49 __heap_limit\r
50 \r
51                 PRESERVE8\r
52                 THUMB\r
53 \r
54 \r
55 ; Vector Table Mapped to Address 0 at Reset\r
56                 AREA    RESET, DATA, READONLY\r
57                 EXPORT  __Vectors\r
58                 EXPORT  __Vectors_End\r
59                 EXPORT  __Vectors_Size\r
60 \r
61 __Vectors       DCD     __initial_sp               ; Top of Stack\r
62                 DCD     Reset_Handler              ; Reset Handler\r
63                 DCD     NMI_Handler                ; NMI Handler\r
64                 DCD     HardFault_Handler          ; Hard Fault Handler\r
65                 DCD     MemManage_Handler          ; MPU Fault Handler\r
66                 DCD     BusFault_Handler           ; Bus Fault Handler\r
67                 DCD     UsageFault_Handler         ; Usage Fault Handler\r
68                 DCD     0                          ; Reserved\r
69                 DCD     0                          ; Reserved\r
70                 DCD     0                          ; Reserved\r
71                 DCD     0                          ; Reserved\r
72                 DCD     SVC_Handler                ; SVCall Handler\r
73                 DCD     DebugMon_Handler           ; Debug Monitor Handler\r
74                 DCD     0                          ; Reserved\r
75                 DCD     PendSV_Handler             ; PendSV Handler\r
76                 DCD     SysTick_Handler            ; SysTick Handler\r
77 \r
78                 ; External Interrupts\r
79                 DCD     WWDG_IRQHandler            ; Window Watchdog\r
80                 DCD     PVD_IRQHandler             ; PVD through EXTI Line detect\r
81                 DCD     TAMPER_IRQHandler          ; Tamper\r
82                 DCD     RTC_IRQHandler             ; RTC\r
83                 DCD     FLASH_IRQHandler           ; Flash\r
84                 DCD     RCC_IRQHandler             ; RCC\r
85                 DCD     EXTI0_IRQHandler           ; EXTI Line 0\r
86                 DCD     EXTI1_IRQHandler           ; EXTI Line 1\r
87                 DCD     EXTI2_IRQHandler           ; EXTI Line 2\r
88                 DCD     EXTI3_IRQHandler           ; EXTI Line 3\r
89                 DCD     EXTI4_IRQHandler           ; EXTI Line 4\r
90                 DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1\r
91                 DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2\r
92                 DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3\r
93                 DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4\r
94                 DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5\r
95                 DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6\r
96                 DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7\r
97                 DCD     ADC1_2_IRQHandler          ; ADC1_2\r
98                 DCD     USB_HP_CAN1_TX_IRQHandler  ; USB High Priority or CAN1 TX\r
99                 DCD     USB_LP_CAN1_RX0_IRQHandler ; USB Low  Priority or CAN1 RX0\r
100                 DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1\r
101                 DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE\r
102                 DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5\r
103                 DCD     TIM1_BRK_IRQHandler        ; TIM1 Break\r
104                 DCD     TIM1_UP_IRQHandler         ; TIM1 Update\r
105                 DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation\r
106                 DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare\r
107                 DCD     TIM2_IRQHandler            ; TIM2\r
108                 DCD     TIM3_IRQHandler            ; TIM3\r
109                 DCD     0                          ; Reserved\r
110                 DCD     I2C1_EV_IRQHandler         ; I2C1 Event\r
111                 DCD     I2C1_ER_IRQHandler         ; I2C1 Error\r
112                 DCD     0                          ; Reserved\r
113                 DCD     0                          ; Reserved\r
114                 DCD     SPI1_IRQHandler            ; SPI1\r
115                 DCD     0                          ; Reserved\r
116                 DCD     USART1_IRQHandler          ; USART1\r
117                 DCD     USART2_IRQHandler          ; USART2\r
118                 DCD     0                          ; Reserved\r
119                 DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10\r
120                 DCD     RTCAlarm_IRQHandler        ; RTC Alarm through EXTI Line\r
121                 DCD     USBWakeUp_IRQHandler       ; USB Wakeup from suspend\r
122 __Vectors_End\r
123 \r
124 __Vectors_Size  EQU  __Vectors_End - __Vectors\r
125 \r
126                 AREA    |.text|, CODE, READONLY\r
127 \r
128 ; Reset handler routine\r
129 Reset_Handler    PROC\r
130                  EXPORT  Reset_Handler             [WEAK]\r
131      IMPORT  __main\r
132      IMPORT  SystemInit\r
133                  LDR     R0, =SystemInit\r
134                  BLX     R0\r
135                  LDR     R0, =__main\r
136                  BX      R0\r
137                  ENDP\r
138 \r
139 ; Dummy Exception Handlers (infinite loops which can be modified)\r
140 \r
141 NMI_Handler     PROC\r
142                 EXPORT  NMI_Handler                [WEAK]\r
143                 B       .\r
144                 ENDP\r
145 HardFault_Handler\\r
146                 PROC\r
147                 EXPORT  HardFault_Handler          [WEAK]\r
148                 B       .\r
149                 ENDP\r
150 MemManage_Handler\\r
151                 PROC\r
152                 EXPORT  MemManage_Handler          [WEAK]\r
153                 B       .\r
154                 ENDP\r
155 BusFault_Handler\\r
156                 PROC\r
157                 EXPORT  BusFault_Handler           [WEAK]\r
158                 B       .\r
159                 ENDP\r
160 UsageFault_Handler\\r
161                 PROC\r
162                 EXPORT  UsageFault_Handler         [WEAK]\r
163                 B       .\r
164                 ENDP\r
165 SVC_Handler     PROC\r
166                 EXPORT  SVC_Handler                [WEAK]\r
167                 B       .\r
168                 ENDP\r
169 DebugMon_Handler\\r
170                 PROC\r
171                 EXPORT  DebugMon_Handler           [WEAK]\r
172                 B       .\r
173                 ENDP\r
174 PendSV_Handler  PROC\r
175                 EXPORT  PendSV_Handler             [WEAK]\r
176                 B       .\r
177                 ENDP\r
178 SysTick_Handler PROC\r
179                 EXPORT  SysTick_Handler            [WEAK]\r
180                 B       .\r
181                 ENDP\r
182 \r
183 Default_Handler PROC\r
184 \r
185                 EXPORT  WWDG_IRQHandler            [WEAK]\r
186                 EXPORT  PVD_IRQHandler             [WEAK]\r
187                 EXPORT  TAMPER_IRQHandler          [WEAK]\r
188                 EXPORT  RTC_IRQHandler             [WEAK]\r
189                 EXPORT  FLASH_IRQHandler           [WEAK]\r
190                 EXPORT  RCC_IRQHandler             [WEAK]\r
191                 EXPORT  EXTI0_IRQHandler           [WEAK]\r
192                 EXPORT  EXTI1_IRQHandler           [WEAK]\r
193                 EXPORT  EXTI2_IRQHandler           [WEAK]\r
194                 EXPORT  EXTI3_IRQHandler           [WEAK]\r
195                 EXPORT  EXTI4_IRQHandler           [WEAK]\r
196                 EXPORT  DMA1_Channel1_IRQHandler   [WEAK]\r
197                 EXPORT  DMA1_Channel2_IRQHandler   [WEAK]\r
198                 EXPORT  DMA1_Channel3_IRQHandler   [WEAK]\r
199                 EXPORT  DMA1_Channel4_IRQHandler   [WEAK]\r
200                 EXPORT  DMA1_Channel5_IRQHandler   [WEAK]\r
201                 EXPORT  DMA1_Channel6_IRQHandler   [WEAK]\r
202                 EXPORT  DMA1_Channel7_IRQHandler   [WEAK]\r
203                 EXPORT  ADC1_2_IRQHandler          [WEAK]\r
204                 EXPORT  USB_HP_CAN1_TX_IRQHandler  [WEAK]\r
205                 EXPORT  USB_LP_CAN1_RX0_IRQHandler [WEAK]\r
206                 EXPORT  CAN1_RX1_IRQHandler        [WEAK]\r
207                 EXPORT  CAN1_SCE_IRQHandler        [WEAK]\r
208                 EXPORT  EXTI9_5_IRQHandler         [WEAK]\r
209                 EXPORT  TIM1_BRK_IRQHandler        [WEAK]\r
210                 EXPORT  TIM1_UP_IRQHandler         [WEAK]\r
211                 EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]\r
212                 EXPORT  TIM1_CC_IRQHandler         [WEAK]\r
213                 EXPORT  TIM2_IRQHandler            [WEAK]\r
214                 EXPORT  TIM3_IRQHandler            [WEAK]\r
215                 EXPORT  I2C1_EV_IRQHandler         [WEAK]\r
216                 EXPORT  I2C1_ER_IRQHandler         [WEAK]\r
217                 EXPORT  SPI1_IRQHandler            [WEAK]\r
218                 EXPORT  USART1_IRQHandler          [WEAK]\r
219                 EXPORT  USART2_IRQHandler          [WEAK]\r
220                 EXPORT  EXTI15_10_IRQHandler       [WEAK]\r
221                 EXPORT  RTCAlarm_IRQHandler        [WEAK]\r
222                 EXPORT  USBWakeUp_IRQHandler       [WEAK]\r
223 \r
224 WWDG_IRQHandler\r
225 PVD_IRQHandler\r
226 TAMPER_IRQHandler\r
227 RTC_IRQHandler\r
228 FLASH_IRQHandler\r
229 RCC_IRQHandler\r
230 EXTI0_IRQHandler\r
231 EXTI1_IRQHandler\r
232 EXTI2_IRQHandler\r
233 EXTI3_IRQHandler\r
234 EXTI4_IRQHandler\r
235 DMA1_Channel1_IRQHandler\r
236 DMA1_Channel2_IRQHandler\r
237 DMA1_Channel3_IRQHandler\r
238 DMA1_Channel4_IRQHandler\r
239 DMA1_Channel5_IRQHandler\r
240 DMA1_Channel6_IRQHandler\r
241 DMA1_Channel7_IRQHandler\r
242 ADC1_2_IRQHandler\r
243 USB_HP_CAN1_TX_IRQHandler\r
244 USB_LP_CAN1_RX0_IRQHandler\r
245 CAN1_RX1_IRQHandler\r
246 CAN1_SCE_IRQHandler\r
247 EXTI9_5_IRQHandler\r
248 TIM1_BRK_IRQHandler\r
249 TIM1_UP_IRQHandler\r
250 TIM1_TRG_COM_IRQHandler\r
251 TIM1_CC_IRQHandler\r
252 TIM2_IRQHandler\r
253 TIM3_IRQHandler\r
254 I2C1_EV_IRQHandler\r
255 I2C1_ER_IRQHandler\r
256 SPI1_IRQHandler\r
257 USART1_IRQHandler\r
258 USART2_IRQHandler\r
259 EXTI15_10_IRQHandler\r
260 RTCAlarm_IRQHandler\r
261 USBWakeUp_IRQHandler\r
262 \r
263                 B       .\r
264 \r
265                 ENDP\r
266 \r
267                 ALIGN\r
268 \r
269 ;*******************************************************************************\r
270 ; User Stack and Heap initialization\r
271 ;*******************************************************************************\r
272                  IF      :DEF:__MICROLIB\r
273                 \r
274                  EXPORT  __initial_sp\r
275                  EXPORT  __heap_base\r
276                  EXPORT  __heap_limit\r
277                 \r
278                  ELSE\r
279                 \r
280                  IMPORT  __use_two_region_memory\r
281                  EXPORT  __user_initial_stackheap\r
282                  \r
283 __user_initial_stackheap\r
284 \r
285                  LDR     R0, =  Heap_Mem\r
286                  LDR     R1, =(Stack_Mem + Stack_Size)\r
287                  LDR     R2, = (Heap_Mem +  Heap_Size)\r
288                  LDR     R3, = Stack_Mem\r
289                  BX      LR\r
290 \r
291                  ALIGN\r
292 \r
293                  ENDIF\r
294 \r
295                  END\r
296 \r
297 ;******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE*****\r