git.rot13.org Git - DSO138/blob - Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/arm/startup_stm32f10x_ld_vl.s

   1 ;******************** (C) COPYRIGHT 2010 STMicroelectronics ********************\r
   2 ;* File Name          : startup_stm32f10x_ld_vl.s\r
   3 ;* Author             : MCD Application Team\r
   4 ;* Version            : V3.3.0\r
   5 ;* Date               : 04/16/2010\r
   6 ;* Description        : STM32F10x Low Density Value Line Devices vector table  \r
   7 ;*                      for RVMDK toolchain.  \r
   8 ;*                      This module performs:\r
   9 ;*                      - Set the initial SP\r
  10 ;*                      - Set the initial PC == Reset_Handler\r
  11 ;*                      - Set the vector table entries with the exceptions ISR address\r
  12 ;*                      - Configure the clock system\r
  13 ;*                      - Branches to __main in the C library (which eventually\r
  14 ;*                        calls main()).\r
  15 ;*                      After Reset the CortexM3 processor is in Thread mode,\r
  16 ;*                      priority is Privileged, and the Stack is set to Main.\r
  17 ;* <<< Use Configuration Wizard in Context Menu >>>   \r
  18 ;*******************************************************************************\r
  19 ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
  20 ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.\r
  21 ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,\r
  22 ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE\r
  23 ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING\r
  24 ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
  25 ;*******************************************************************************\r
  26 \r
  27 ; Amount of memory (in bytes) allocated for Stack\r
  28 ; Tailor this value to your application needs\r
  29 ; <h> Stack Configuration\r
  30 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
  31 ; </h>\r
  32 \r
  33 Stack_Size      EQU     0x00000400\r
  34 \r
  35                 AREA    STACK, NOINIT, READWRITE, ALIGN=3\r
  36 Stack_Mem       SPACE   Stack_Size\r
  37 __initial_sp\r
  38 \r
  39 \r
  40 ; <h> Heap Configuration\r
  41 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
  42 ; </h>\r
  43 \r
  44 Heap_Size       EQU     0x00000200\r
  45 \r
  46                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3\r
  47 __heap_base\r
  48 Heap_Mem        SPACE   Heap_Size\r
  49 __heap_limit\r
  50 \r
  51                 PRESERVE8\r
  52                 THUMB\r
  53 \r
  54 \r
  55 ; Vector Table Mapped to Address 0 at Reset\r
  56                 AREA    RESET, DATA, READONLY\r
  57                 EXPORT  __Vectors\r
  58                 EXPORT  __Vectors_End\r
  59                 EXPORT  __Vectors_Size\r
  60 \r
  61 __Vectors       DCD     __initial_sp                    ; Top of Stack\r
  62                 DCD     Reset_Handler                   ; Reset Handler\r
  63                 DCD     NMI_Handler                     ; NMI Handler\r
  64                 DCD     HardFault_Handler               ; Hard Fault Handler\r
  65                 DCD     MemManage_Handler               ; MPU Fault Handler\r
  66                 DCD     BusFault_Handler                ; Bus Fault Handler\r
  67                 DCD     UsageFault_Handler              ; Usage Fault Handler\r
  68                 DCD     0                               ; Reserved\r
  69                 DCD     0                               ; Reserved\r
  70                 DCD     0                               ; Reserved\r
  71                 DCD     0                               ; Reserved\r
  72                 DCD     SVC_Handler                     ; SVCall Handler\r
  73                 DCD     DebugMon_Handler                ; Debug Monitor Handler\r
  74                 DCD     0                               ; Reserved\r
  75                 DCD     PendSV_Handler                  ; PendSV Handler\r
  76                 DCD     SysTick_Handler                 ; SysTick Handler\r
  77 \r
  78                 ; External Interrupts\r
  79                 DCD     WWDG_IRQHandler                 ; Window Watchdog\r
  80                 DCD     PVD_IRQHandler                  ; PVD through EXTI Line detect\r
  81                 DCD     TAMPER_IRQHandler               ; Tamper\r
  82                 DCD     RTC_IRQHandler                  ; RTC\r
  83                 DCD     FLASH_IRQHandler                ; Flash\r
  84                 DCD     RCC_IRQHandler                  ; RCC\r
  85                 DCD     EXTI0_IRQHandler                ; EXTI Line 0\r
  86                 DCD     EXTI1_IRQHandler                ; EXTI Line 1\r
  87                 DCD     EXTI2_IRQHandler                ; EXTI Line 2\r
  88                 DCD     EXTI3_IRQHandler                ; EXTI Line 3\r
  89                 DCD     EXTI4_IRQHandler                ; EXTI Line 4\r
  90                 DCD     DMA1_Channel1_IRQHandler        ; DMA1 Channel 1\r
  91                 DCD     DMA1_Channel2_IRQHandler        ; DMA1 Channel 2\r
  92                 DCD     DMA1_Channel3_IRQHandler        ; DMA1 Channel 3\r
  93                 DCD     DMA1_Channel4_IRQHandler        ; DMA1 Channel 4\r
  94                 DCD     DMA1_Channel5_IRQHandler        ; DMA1 Channel 5\r
  95                 DCD     DMA1_Channel6_IRQHandler        ; DMA1 Channel 6\r
  96                 DCD     DMA1_Channel7_IRQHandler        ; DMA1 Channel 7\r
  97                 DCD     ADC1_IRQHandler                 ; ADC1\r
  98                 DCD     0                               ; Reserved\r
  99                 DCD     0                               ; Reserved\r
 100                 DCD     0                               ; Reserved\r
 101                 DCD     0                               ; Reserved\r
 102                 DCD     EXTI9_5_IRQHandler              ; EXTI Line 9..5\r
 103                 DCD     TIM1_BRK_TIM15_IRQHandler       ; TIM1 Break and TIM15\r
 104                 DCD     TIM1_UP_TIM16_IRQHandler        ; TIM1 Update and TIM16\r
 105                 DCD     TIM1_TRG_COM_TIM17_IRQHandler   ; TIM1 Trigger and Commutation and TIM17\r
 106                 DCD     TIM1_CC_IRQHandler              ; TIM1 Capture Compare\r
 107                 DCD     TIM2_IRQHandler                 ; TIM2\r
 108                 DCD     TIM3_IRQHandler                 ; TIM3\r
 109                 DCD     0                               ; Reserved\r
 110                 DCD     I2C1_EV_IRQHandler              ; I2C1 Event\r
 111                 DCD     I2C1_ER_IRQHandler              ; I2C1 Error\r
 112                 DCD     0                               ; Reserved\r
 113                 DCD     0                               ; Reserved\r
 114                 DCD     SPI1_IRQHandler                 ; SPI1\r
 115                 DCD     0                               ; Reserved\r
 116                 DCD     USART1_IRQHandler               ; USART1\r
 117                 DCD     USART2_IRQHandler               ; USART2\r
 118                 DCD     0                               ; Reserved\r
 119                 DCD     EXTI15_10_IRQHandler            ; EXTI Line 15..10\r
 120                 DCD     RTCAlarm_IRQHandler             ; RTC Alarm through EXTI Line\r
 121                 DCD     CEC_IRQHandler                  ; HDMI-CEC\r
 122                 DCD     0                               ; Reserved\r
 123                 DCD     0                               ; Reserved\r
 124                 DCD     0                               ; Reserved\r
 125                 DCD     0                               ; Reserved \r
 126                 DCD     0                               ; Reserved\r
 127                 DCD     0                               ; Reserved\r
 128                 DCD     0                               ; Reserved\r
 129                 DCD     0                               ; Reserved \r
 130                 DCD     0                               ; Reserved\r
 131                 DCD     0                               ; Reserved\r
 132                 DCD     0                               ; Reserved\r
 133                 DCD     TIM6_DAC_IRQHandler             ; TIM6 and DAC underrun\r
 134                 DCD     TIM7_IRQHandler                 ; TIM7\r
 135 __Vectors_End\r
 136 \r
 137 __Vectors_Size  EQU  __Vectors_End - __Vectors\r
 138 \r
 139                 AREA    |.text|, CODE, READONLY\r
 140 \r
 141 ; Reset handler\r
 142 Reset_Handler    PROC\r
 143                  EXPORT  Reset_Handler             [WEAK]\r
 144      IMPORT  __main\r
 145      IMPORT  SystemInit\r
 146                  LDR     R0, =SystemInit\r
 147                  BLX     R0\r
 148                  LDR     R0, =__main\r
 149                  BX      R0\r
 150                  ENDP\r
 151 \r
 152 ; Dummy Exception Handlers (infinite loops which can be modified)\r
 153 \r
 154 NMI_Handler     PROC\r
 155                 EXPORT  NMI_Handler                      [WEAK]\r
 156                 B       .\r
 157                 ENDP\r
 158 HardFault_Handler\\r
 159                 PROC\r
 160                 EXPORT  HardFault_Handler                [WEAK]\r
 161                 B       .\r
 162                 ENDP\r
 163 MemManage_Handler\\r
 164                 PROC\r
 165                 EXPORT  MemManage_Handler                [WEAK]\r
 166                 B       .\r
 167                 ENDP\r
 168 BusFault_Handler\\r
 169                 PROC\r
 170                 EXPORT  BusFault_Handler                 [WEAK]\r
 171                 B       .\r
 172                 ENDP\r
 173 UsageFault_Handler\\r
 174                 PROC\r
 175                 EXPORT  UsageFault_Handler               [WEAK]\r
 176                 B       .\r
 177                 ENDP\r
 178 SVC_Handler     PROC\r
 179                 EXPORT  SVC_Handler                      [WEAK]\r
 180                 B       .\r
 181                 ENDP\r
 182 DebugMon_Handler\\r
 183                 PROC\r
 184                 EXPORT  DebugMon_Handler                 [WEAK]\r
 185                 B       .\r
 186                 ENDP\r
 187 PendSV_Handler  PROC\r
 188                 EXPORT  PendSV_Handler                   [WEAK]\r
 189                 B       .\r
 190                 ENDP\r
 191 SysTick_Handler PROC\r
 192                 EXPORT  SysTick_Handler                  [WEAK]\r
 193                 B       .\r
 194                 ENDP\r
 195 \r
 196 Default_Handler PROC\r
 197 \r
 198                 EXPORT  WWDG_IRQHandler                  [WEAK]\r
 199                 EXPORT  PVD_IRQHandler                   [WEAK]\r
 200                 EXPORT  TAMPER_IRQHandler                [WEAK]\r
 201                 EXPORT  RTC_IRQHandler                   [WEAK]\r
 202                 EXPORT  FLASH_IRQHandler                 [WEAK]\r
 203                 EXPORT  RCC_IRQHandler                   [WEAK]\r
 204                 EXPORT  EXTI0_IRQHandler                 [WEAK]\r
 205                 EXPORT  EXTI1_IRQHandler                 [WEAK]\r
 206                 EXPORT  EXTI2_IRQHandler                 [WEAK]\r
 207                 EXPORT  EXTI3_IRQHandler                 [WEAK]\r
 208                 EXPORT  EXTI4_IRQHandler                 [WEAK]\r
 209                 EXPORT  DMA1_Channel1_IRQHandler         [WEAK]\r
 210                 EXPORT  DMA1_Channel2_IRQHandler         [WEAK]\r
 211                 EXPORT  DMA1_Channel3_IRQHandler         [WEAK]\r
 212                 EXPORT  DMA1_Channel4_IRQHandler         [WEAK]\r
 213                 EXPORT  DMA1_Channel5_IRQHandler         [WEAK]\r
 214                 EXPORT  DMA1_Channel6_IRQHandler         [WEAK]\r
 215                 EXPORT  DMA1_Channel7_IRQHandler         [WEAK]\r
 216                 EXPORT  ADC1_IRQHandler                  [WEAK]\r
 217                 EXPORT  EXTI9_5_IRQHandler               [WEAK]\r
 218                 EXPORT  TIM1_BRK_TIM15_IRQHandler        [WEAK]\r
 219                 EXPORT  TIM1_UP_TIM16_IRQHandler         [WEAK]\r
 220                 EXPORT  TIM1_TRG_COM_TIM17_IRQHandler    [WEAK]\r
 221                 EXPORT  TIM1_CC_IRQHandler               [WEAK]\r
 222                 EXPORT  TIM2_IRQHandler                  [WEAK]\r
 223                 EXPORT  TIM3_IRQHandler                  [WEAK]\r
 224                 EXPORT  I2C1_EV_IRQHandler               [WEAK]\r
 225                 EXPORT  I2C1_ER_IRQHandler               [WEAK]\r
 226                 EXPORT  SPI1_IRQHandler                  [WEAK]\r
 227                 EXPORT  USART1_IRQHandler                [WEAK]\r
 228                 EXPORT  USART2_IRQHandler                [WEAK]\r
 229                 EXPORT  EXTI15_10_IRQHandler             [WEAK]\r
 230                 EXPORT  RTCAlarm_IRQHandler              [WEAK]\r
 231                 EXPORT  CEC_IRQHandler                   [WEAK]\r
 232                 EXPORT  TIM6_DAC_IRQHandler              [WEAK]\r
 233                 EXPORT  TIM7_IRQHandler                  [WEAK]\r
 234 WWDG_IRQHandler\r
 235 PVD_IRQHandler\r
 236 TAMPER_IRQHandler\r
 237 RTC_IRQHandler\r
 238 FLASH_IRQHandler\r
 239 RCC_IRQHandler\r
 240 EXTI0_IRQHandler\r
 241 EXTI1_IRQHandler\r
 242 EXTI2_IRQHandler\r
 243 EXTI3_IRQHandler\r
 244 EXTI4_IRQHandler\r
 245 DMA1_Channel1_IRQHandler\r
 246 DMA1_Channel2_IRQHandler\r
 247 DMA1_Channel3_IRQHandler\r
 248 DMA1_Channel4_IRQHandler\r
 249 DMA1_Channel5_IRQHandler\r
 250 DMA1_Channel6_IRQHandler\r
 251 DMA1_Channel7_IRQHandler\r
 252 ADC1_IRQHandler\r
 253 EXTI9_5_IRQHandler\r
 254 TIM1_BRK_TIM15_IRQHandler\r
 255 TIM1_UP_TIM16_IRQHandler\r
 256 TIM1_TRG_COM_TIM17_IRQHandler\r
 257 TIM1_CC_IRQHandler\r
 258 TIM2_IRQHandler\r
 259 TIM3_IRQHandler\r
 260 I2C1_EV_IRQHandler\r
 261 I2C1_ER_IRQHandler\r
 262 SPI1_IRQHandler\r
 263 USART1_IRQHandler\r
 264 USART2_IRQHandler\r
 265 EXTI15_10_IRQHandler\r
 266 RTCAlarm_IRQHandler\r
 267 CEC_IRQHandler\r
 268 TIM6_DAC_IRQHandler\r
 269 TIM7_IRQHandler\r
 270                 B       .\r
 271 \r
 272                 ENDP\r
 273 \r
 274                 ALIGN\r
 275 \r
 276 ;*******************************************************************************\r
 277 ; User Stack and Heap initialization\r
 278 ;*******************************************************************************\r
 279                  IF      :DEF:__MICROLIB           \r
 280                 \r
 281                  EXPORT  __initial_sp\r
 282                  EXPORT  __heap_base\r
 283                  EXPORT  __heap_limit\r
 284                 \r
 285                  ELSE\r
 286                 \r
 287                  IMPORT  __use_two_region_memory\r
 288                  EXPORT  __user_initial_stackheap\r
 289                  \r
 290 __user_initial_stackheap\r
 291 \r
 292                  LDR     R0, =  Heap_Mem\r
 293                  LDR     R1, =(Stack_Mem + Stack_Size)\r
 294                  LDR     R2, = (Heap_Mem +  Heap_Size)\r
 295                  LDR     R3, = Stack_Mem\r
 296                  BX      LR\r
 297 \r
 298                  ALIGN\r
 299 \r
 300                  ENDIF\r
 301 \r
 302                  END\r
 303 \r
 304 ;******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE*****\r