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cores: No standard include paths
[simavr]
/
simavr
/
cores
/
sim_mega1280.c
2012-11-30
Stephan Veigl
cores: No standard include paths
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2012-08-31
Jakob Gruber
cores: Use correct extint control register
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2012-08-05
Jakob Gruber
mega1280: Initialize UART 2 and 3
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2012-08-05
Jakob Gruber
mega1280: Add missing timers 4 and 5
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2012-07-31
Jakob Gruber
cores: Set raise_sticky in TWI interrupt vectors
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2012-07-13
Michel Pollet
Merge pull request #1 from schuay/master
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2012-07-12
Jakob Gruber
mega1280: Added upper ADC differential channels
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2012-06-03
Michel Pollet
cores: Now duplicate the global structure
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2012-04-06
Michel Pollet
mega1280: Made PORTK work
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2012-04-06
Michel Pollet
cores: Added mega1280
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