# BRCM_VERSION=3
[bcm963xx.git] / kernel / linux / arch / arm / lib / io-readsw-armv4.S
1 /*
2  *  linux/arch/arm/lib/io-readsw-armv4.S
3  *
4  *  Copyright (C) 1995-2000 Russell King
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/linkage.h>
11 #include <asm/assembler.h>
12
13                 .macro  pack, rd, hw1, hw2
14 #ifndef __ARMEB__
15                 orr     \rd, \hw1, \hw2, lsl #16
16 #else
17                 orr     \rd, \hw2, \hw1, lsl #16
18 #endif
19                 .endm
20
21 .insw_bad_alignment:
22                 adr     r0, .insw_bad_align_msg
23                 mov     r2, lr
24                 b       panic
25 .insw_bad_align_msg:
26                 .asciz  "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
27                 .align
28
29 .insw_align:    tst     r1, #1
30                 bne     .insw_bad_alignment
31
32                 ldrh    r3, [r0]
33                 strh    r3, [r1], #2
34
35                 subs    r2, r2, #1
36                 RETINSTR(moveq, pc, lr)
37
38 ENTRY(__raw_readsw)
39                 teq     r2, #0          @ do we have to check for the zero len?
40                 moveq   pc, lr
41                 tst     r1, #3
42                 bne     .insw_align
43
44                 stmfd   sp!, {r4, r5, lr}
45
46                 subs    r2, r2, #8
47                 bmi     .no_insw_8
48
49 .insw_8_lp:     ldrh    r3, [r0]
50                 ldrh    r4, [r0]
51                 pack    r3, r3, r4
52
53                 ldrh    r4, [r0]
54                 ldrh    r5, [r0]
55                 pack    r4, r4, r5
56
57                 ldrh    r5, [r0]
58                 ldrh    ip, [r0]
59                 pack    r5, r5, ip
60
61                 ldrh    ip, [r0]
62                 ldrh    lr, [r0]
63                 pack    ip, ip, lr
64
65                 stmia   r1!, {r3 - r5, ip}
66
67                 subs    r2, r2, #8
68                 bpl     .insw_8_lp
69
70                 tst     r2, #7
71                 LOADREGS(eqfd, sp!, {r4, r5, pc})
72
73 .no_insw_8:     tst     r2, #4
74                 beq     .no_insw_4
75
76                 ldrh    r3, [r0]
77                 ldrh    r4, [r0]
78                 pack    r3, r3, r4
79
80                 ldrh    r4, [r0]
81                 ldrh    ip, [r0]
82                 pack    r4, r4, ip
83
84                 stmia   r1!, {r3, r4}
85
86 .no_insw_4:     tst     r2, #2
87                 beq     .no_insw_2
88
89                 ldrh    r3, [r0]
90                 ldrh    ip, [r0]
91                 pack    r3, r3, ip
92
93                 str     r3, [r1], #4
94
95 .no_insw_2:     tst     r2, #1
96                 ldrneh  r3, [r0]
97                 strneh  r3, [r1]
98
99                 LOADREGS(fd, sp!, {r4, r5, pc})