2 * Copyright (C) 2003 PMC-Sierra Inc.
3 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/bcd.h>
26 #include <linux/init.h>
27 #include <linux/kernel.h>
28 #include <linux/types.h>
30 #include <linux/bootmem.h>
31 #include <linux/swap.h>
32 #include <linux/ioport.h>
33 #include <linux/sched.h>
34 #include <linux/interrupt.h>
35 #include <linux/timex.h>
38 #include <asm/bootinfo.h>
42 #include <asm/processor.h>
43 #include <asm/ptrace.h>
44 #include <asm/reboot.h>
45 #include <asm/pci_channel.h>
46 #include <asm/serial.h>
47 #include <linux/termios.h>
48 #include <linux/tty.h>
49 #include <linux/serial.h>
50 #include <linux/serial_core.h>
51 #include <asm/titan_dep.h>
55 unsigned char titan_ge_mac_addr_base[6] = {
56 0x00, 0x03, 0xcc, 0x1d, 0x22, 0x00
59 unsigned long cpu_clock;
60 unsigned long yosemite_base;
62 void __init bus_error_init(void)
67 unsigned long m48t37y_get_time(void)
69 //unsigned char *rtc_base = (unsigned char *) YOSEMITE_RTC_BASE;
70 unsigned char *rtc_base = (unsigned char *) 0xfc000000UL;
71 unsigned int year, month, day, hour, min, sec;
74 /* Stop the update to the time */
75 rtc_base[0x7ff8] = 0x40;
77 year = BCD2BIN(rtc_base[0x7fff]);
78 year += BCD2BIN(rtc_base[0x7fff1]) * 100;
80 month = BCD2BIN(rtc_base[0x7ffe]);
81 day = BCD2BIN(rtc_base[0x7ffd]);
82 hour = BCD2BIN(rtc_base[0x7ffb]);
83 min = BCD2BIN(rtc_base[0x7ffa]);
84 sec = BCD2BIN(rtc_base[0x7ff9]);
86 /* Start the update to the time again */
87 rtc_base[0x7ff8] = 0x00;
89 return mktime(year, month, day, hour, min, sec);
92 int m48t37y_set_time(unsigned long sec)
94 unsigned char *rtc_base = (unsigned char *) YOSEMITE_RTC_BASE;
98 /* convert to a more useful format -- note months count from 0 */
103 rtc_base[0x7ff8] = 0x80;
106 rtc_base[0x7fff] = BIN2BCD(tm.tm_year % 100);
107 rtc_base[0x7ff1] = BIN2BCD(tm.tm_year / 100);
110 rtc_base[0x7ffe] = BIN2BCD(tm.tm_mon);
113 rtc_base[0x7ffd] = BIN2BCD(tm.tm_mday);
116 rtc_base[0x7ffb] = BIN2BCD(tm.tm_hour);
117 rtc_base[0x7ffa] = BIN2BCD(tm.tm_min);
118 rtc_base[0x7ff9] = BIN2BCD(tm.tm_sec);
120 /* day of week -- not really used, but let's keep it up-to-date */
121 rtc_base[0x7ffc] = BIN2BCD(tm.tm_wday + 1);
123 /* disable writing */
124 rtc_base[0x7ff8] = 0x00;
129 void yosemite_timer_setup(struct irqaction *irq)
134 void yosemite_time_init(void)
136 board_timer_setup = yosemite_timer_setup;
137 mips_hpt_frequency = cpu_clock / 2;
139 rtc_get_time = m48t37y_get_time;
140 rtc_set_time = m48t37y_set_time;
143 unsigned long uart_base = 0xfd000000L;
145 /* No other usable initialization hook than this ... */
146 extern void (*late_time_init)(void);
148 unsigned long ocd_base;
150 EXPORT_SYMBOL(ocd_base);
153 * Common setup before any secondaries are started
156 #define TITAN_UART_CLK 3686400
157 #define TITAN_SERIAL_BASE_BAUD (TITAN_UART_CLK / 16)
158 #define TITAN_SERIAL_IRQ 4
159 #define TITAN_SERIAL_BASE 0xfd000008UL
161 static void __init py_map_ocd(void)
166 * Not specifically interrupt stuff but in case of SMP core_send_ipi
167 * needs this first so I'm mapping it here ...
169 ocd_base = (unsigned long) ioremap(OCD_BASE, OCD_SIZE);
171 panic("Mapping OCD failed - game over. Your score is 0.");
174 * Register to interrupt zero because we share the interrupt with
175 * the serial driver which we don't properly support yet.
177 memset(&up, 0, sizeof(up));
178 up.membase = (unsigned char *) ioremap(TITAN_SERIAL_BASE, 8);
179 up.irq = TITAN_SERIAL_IRQ;
180 up.uartclk = TITAN_UART_CLK;
182 up.iotype = UPIO_MEM;
183 up.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
186 if (early_serial_setup(&up))
187 printk(KERN_ERR "Early serial init of port 0 failed\n");
190 static int __init pmc_yosemite_setup(void)
192 extern void pmon_smp_bootstrap(void);
194 board_time_init = yosemite_time_init;
195 late_time_init = py_map_ocd;
197 /* Add memory regions */
198 add_memory_region(0x00000000, 0x10000000, BOOT_MEM_RAM);
200 #if 0 /* XXX Crash ... */
201 OCD_WRITE(RM9000x2_OCD_HTSC,
202 OCD_READ(RM9000x2_OCD_HTSC) | HYPERTRANSPORT_ENABLE);
204 /* Set the BAR. Shifted mode */
205 OCD_WRITE(RM9000x2_OCD_HTBAR0, HYPERTRANSPORT_BAR0_ADDR);
206 OCD_WRITE(RM9000x2_OCD_HTMASK0, HYPERTRANSPORT_SIZE0);
212 early_initcall(pmc_yosemite_setup);