"""Test MSP430 JTAG. Requires that a chip be attached."""
if self.MSP430ident()==0xffff:
print "Is anything connected?";
- print "Testing RAM from 1c00 to 1d00.";
- for a in range(0x1c00,0x1d00):
+ print "Testing RAM from 200 to 210.";
+ for a in range(0x200,0x210):
self.MSP430poke(a,0);
if(self.MSP430peek(a)!=0):
print "Fault at %06x" % a;
self.MSP430poke(a,0xffff);
if(self.MSP430peek(a)!=0xffff):
print "Fault at %06x" % a;
- print "RAM Test Complete."
- for a in range(1,5):
- print "Identity %04x" % self.MSP430ident();
-
+
+ print "Testing identity consistency."
+ ident=self.MSP430ident();
+ for a in range(1,20):
+ ident2=self.MSP430ident();
+ if ident!=ident2:
+ print "Identity %04x!=%04x" % (ident,ident2);
+
+ print "Testing flash erase."
+ self.MSP430masserase();
+ for a in range(0xffe0, 0xffff):
+ if self.MSP430peek(a)!=0xffff:
+ print "%04x unerased, equals %04x" % (
+ a, self.MSP430peek(a));
+
+ print "Testing flash write."
+ for a in range(0xffe0, 0xffff):
+ self.MSP430pokeflash(a,0xbeef);
+ if self.MSP430peek(a)!=0xbeef:
+ print "%04x unset, equals %04x" % (
+ a, self.MSP430peek(a));
+
+ print "Tests complete, erasing."
+ self.MSP430masserase();
+
def MSP430flashtest(self):
self.MSP430masserase();
i=0x2500;
.globl jtag430_tclk_flashpulses
.type jtag430_tclk_flashpulses,@function //for linking
-
-//! At 3.68MHz, 7 to 14 cycles/loop are allowed for 257 to 475kHz
+//This detects model, chooses appropriate timing.
jtag430_tclk_flashpulses:
+ mov &0x0ff0, r14
+ cmp #0x6cf1, r14 ;Is the chip an MSP430F1xx?
+ jz jtag430_tclk_flashpulses_3mhz
+ jmp jtag430_tclk_flashpulses_16mhz
+
+// At 3.68MHz, 7 to 14 cycles/loop are allowed for 257 to 475kHz.
+// At 16MHz, 33 to 62 cycles/loop are allowed.
+jtag430_tclk_flashpulses_3mhz:
mov #0x0031, r14
-pulseloop:
+pulseloop3:
bis.b #2, @r14 ;SETTCLK, 3 cycles
sub #1, r15 ; 1 cycle
;; 1+3+3+1+2=10, within limits
bic.b #2, @r14 ;CLRTCLK, 3 cycles
tst r15 ; 1 cycle
- jnz pulseloop ; 2 cycles
+ jnz pulseloop3 ; 2 cycles
+ ret
+
+jtag430_tclk_flashpulses_16mhz:
+ mov #0x0031, r14
+pulseloop16:
+ bis.b #2, @r14 ;SETTCLK, 3 cycles
+ sub #1, r15 ; 1 cycle
+ ;; 1+3+3+1+2=10, beneath limits,
+
+ ;; +3+2=5, repeat 5 times to get 10+25=35, within limits
+ push r11 ; 3 cycles
+ pop r11 ; 2 cycles
+ push r11 ; 3 cycles
+ pop r11 ; 2 cycles
+ push r11 ; 3 cycles
+ pop r11 ; 2 cycles
+ push r11 ; 3 cycles
+ pop r11 ; 2 cycles
+ push r11 ; 3 cycles
+ pop r11 ; 2 cycles
+
+
+ bic.b #2, @r14 ;CLRTCLK, 3 cycles
+ tst r15 ; 1 cycle
+ jnz pulseloop16 ; 2 cycles
ret