2 * BK Id: %F% %I% %G% %U% %#%
5 * Declarations of procedures and variables shared between files
8 * Derived from arch/ppc/mm/init.c:
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
11 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
12 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
13 * Copyright (C) 1996 Paul Mackerras
14 * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
15 * PPC440-36-bit changes by Matt Porter (mporter@mvista.com)
17 * Derived from "arch/i386/mm/init.c"
18 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License
22 * as published by the Free Software Foundation; either version
23 * 2 of the License, or (at your option) any later version.
27 #include <asm/pgtable.h>
29 extern void mapin_ram(void);
30 extern void bat_mapin_ram(unsigned long bat2, unsigned long bat3);
31 extern void adjust_total_lowmem(void);
32 extern int map_page(unsigned long va, phys_addr_t pa, int flags);
33 extern void setbat(int index, unsigned long virt, unsigned long phys,
34 unsigned int size, int flags);
35 extern void reserve_phys_mem(unsigned long start, unsigned long size);
37 extern int __map_without_bats;
38 extern unsigned long ioremap_base;
39 extern unsigned long ioremap_bot;
40 extern unsigned int rtas_data, rtas_size;
42 extern unsigned long total_memory;
43 extern unsigned long total_lowmem;
44 extern int mem_init_done;
46 extern PTE *Hash, *Hash_end;
47 extern unsigned long Hash_size, Hash_mask;
49 /* ...and now those things that may be slightly different between processor
50 * architectures. -- Dan
52 #if defined(CONFIG_8xx)
53 #define flush_HPTE(X, va, pg) _tlbie(va)
54 #define MMU_init_hw() do { } while(0)
56 #elif defined(CONFIG_4xx)
57 #define flush_HPTE(X, va, pg) _tlbie(va)
58 extern void MMU_init_hw(void);
61 /* anything except 4xx or 8xx */
62 extern void MMU_init_hw(void);
64 /* Be careful....this needs to be updated if we ever encounter 603 SMPs,
65 * which includes all new 82xx processors. We need tlbie/tlbsync here
66 * in that case (I think). -- Dan.
68 static inline void flush_HPTE(unsigned context, unsigned long va, pte_t *pg)
71 (cur_cpu_spec[0]->cpu_features & CPU_FTR_HPTE_TABLE))
72 flush_hash_page(0, va, pg);