2 /* drivers/atm/firestream.c - FireStream 155 (MB86697) and
3 * FireStream 50 (MB86695) device driver
6 /* Written & (C) 2000 by R.E.Wolff@BitWizard.nl
7 * Copied snippets from zatm.c by Werner Almesberger, EPFL LRC/ICA
8 * and ambassador.c Copyright (C) 1995-1999 Madge Networks Ltd
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
27 system and in the file COPYING in the Linux kernel source.
31 #include <linux/module.h>
32 #include <linux/sched.h>
33 #include <linux/kernel.h>
35 #include <linux/pci.h>
36 #include <linux/errno.h>
37 #include <linux/atm.h>
38 #include <linux/atmdev.h>
39 #include <linux/sonet.h>
40 #include <linux/skbuff.h>
41 #include <linux/netdevice.h>
42 #include <linux/delay.h>
43 #include <linux/ioport.h> /* for request_region */
44 #include <linux/uio.h>
45 #include <linux/init.h>
46 #include <linux/capability.h>
47 #include <linux/bitops.h>
48 #include <asm/byteorder.h>
49 #include <asm/system.h>
50 #include <asm/string.h>
52 #include <asm/atomic.h>
53 #include <asm/uaccess.h>
54 #include <linux/wait.h>
56 #include "firestream.h"
58 static int loopback = 0;
61 /* According to measurements (but they look suspicious to me!) done in
62 * '97, 37% of the packets are one cell in size. So it pays to have
63 * buffers allocated at that size. A large jump in percentage of
64 * packets occurs at packets around 536 bytes in length. So it also
65 * pays to have those pre-allocated. Unfortunately, we can't fully
66 * take advantage of this as the majority of the packets is likely to
67 * be TCP/IP (As where obviously the measurement comes from) There the
68 * link would be opened with say a 1500 byte MTU, and we can't handle
69 * smaller buffers more efficiently than the larger ones. -- REW
72 /* Due to the way Linux memory management works, specifying "576" as
73 * an allocation size here isn't going to help. They are allocated
74 * from 1024-byte regions anyway. With the size of the sk_buffs (quite
75 * large), it doesn't pay to allocate the smallest size (64) -- REW */
77 /* This is all guesswork. Hard numbers to back this up or disprove this,
78 * are appreciated. -- REW */
80 /* The last entry should be about 64k. However, the "buffer size" is
81 * passed to the chip in a 16 bit field. I don't know how "65536"
82 * would be interpreted. -- REW */
84 #define NP FS_NR_FREE_POOLS
85 int rx_buf_sizes[NP] = {128, 256, 512, 1024, 2048, 4096, 16384, 65520};
86 /* log2: 7 8 9 10 11 12 14 16 */
89 int rx_pool_sizes[NP] = {1024, 1024, 512, 256, 128, 64, 32, 32};
92 int rx_pool_sizes[NP] = {128, 128, 128, 64, 64, 64, 32, 32};
94 /* log2: 10 10 9 8 7 6 5 5 */
95 /* sumlog2: 17 18 18 18 18 18 19 21 */
96 /* mem allocated: 128k 256k 256k 256k 256k 256k 512k 2M */
97 /* tot mem: almost 4M */
99 /* NP is shorter, so that it fits on a single line. */
103 /* Small hardware gotcha:
105 The FS50 CAM (VP/VC match registers) always take the lowest channel
106 number that matches. This is not a problem.
108 However, they also ignore wether the channel is enabled or
109 not. This means that if you allocate channel 0 to 1.2 and then
110 channel 1 to 0.0, then disabeling channel 0 and writing 0 to the
111 match channel for channel 0 will "steal" the traffic from channel
112 1, even if you correctly disable channel 0.
116 - When disabling channels, write an invalid VP/VC value to the
117 match register. (We use 0xffffffff, which in the worst case
118 matches VP/VC = <maxVP>/<maxVC>, but I expect it not to match
119 anything as some "when not in use, program to 0" bits are now
122 - Don't initialize the match registers to 0, as 0.0 is a valid
127 /* Optimization hints and tips.
129 The FireStream chips are very capable of reducing the amount of
130 "interrupt-traffic" for the CPU. This driver requests an interrupt on EVERY
131 action. You could try to minimize this a bit.
133 Besides that, the userspace->kernel copy and the PCI bus are the
134 performance limiting issues for this driver.
136 You could queue up a bunch of outgoing packets without telling the
137 FireStream. I'm not sure that's going to win you much though. The
138 Linux layer won't tell us in advance when it's not going to give us
139 any more packets in a while. So this is tricky to implement right without
140 introducing extra delays.
148 /* The strings that define what the RX queue entry is all about. */
149 /* Fujitsu: Please tell me which ones can have a pointer to a
150 freepool descriptor! */
151 static char *res_strings[] = {
152 "RX OK: streaming not EOP",
153 "RX OK: streaming EOP",
154 "RX OK: Single buffer packet",
155 "RX OK: packet mode",
156 "RX OK: F4 OAM (end to end)",
157 "RX OK: F4 OAM (Segment)",
158 "RX OK: F5 OAM (end to end)",
159 "RX OK: F5 OAM (Segment)",
161 "RX OK: TRANSP cell",
162 "RX OK: TRANSPC cell",
169 "reassemby abort: AAL5 abort",
171 "packet ageing timeout",
172 "channel ageing timeout",
173 "calculated lenght error",
174 "programmed lenght limit error",
176 "oam transp or transpc crc10 error",
183 "reassembly abort: no buffers",
184 "receive buffer overflow",
186 "receive buffer full",
187 "low priority discard - no receive descriptor",
188 "low priority discard - missing end of packet",
214 static char *irq_bitname[] = {
246 #define PHY_CLEARALL -2
248 struct reginit_item {
253 struct reginit_item PHY_NTC_INIT[] __initdata = {
254 { PHY_CLEARALL, 0x40 },
260 { 0x39, 0x0006 }, /* changed here to make loopback */
264 { PHY_EOF, 0}, /* -1 signals end of list */
268 /* Safetyfeature: If the card interrupts more than this number of times
269 in a jiffy (1/100th of a second) then we just disable the interrupt and
270 print a message. This prevents the system from hanging.
272 150000 packets per second is close to the limit a PC is going to have
273 anyway. We therefore have to disable this for production. -- REW */
274 #undef IRQ_RATE_LIMIT // 100
276 /* Interrupts work now. Unlike serial cards, ATM cards don't work all
277 that great without interrupts. -- REW */
278 #undef FS_POLL_FREQ // 100
281 This driver can spew a whole lot of debugging output at you. If you
282 need maximum performance, you should disable the DEBUG define. To
283 aid in debugging in the field, I'm leaving the compile-time debug
284 features enabled, and disable them "runtime". That allows me to
285 instruct people with problems to enable debugging without requiring
286 them to recompile... -- REW
291 #define fs_dprintk(f, str...) if (fs_debug & f) printk (str)
293 #define fs_dprintk(f, str...) /* nothing */
297 static int fs_keystream = 0;
300 /* I didn't forget to set this to zero before shipping. Hit me with a stick
301 if you get this with the debug default not set to zero again. -- REW */
302 static int fs_debug = 0;
309 MODULE_PARM(fs_debug, "i");
311 MODULE_PARM(loopback, "i");
312 MODULE_PARM(num, "i");
313 MODULE_PARM(fs_keystream, "i");
314 /* XXX Add rx_buf_sizes, and rx_pool_sizes As per request Amar. -- REW */
318 #define FS_DEBUG_FLOW 0x00000001
319 #define FS_DEBUG_OPEN 0x00000002
320 #define FS_DEBUG_QUEUE 0x00000004
321 #define FS_DEBUG_IRQ 0x00000008
322 #define FS_DEBUG_INIT 0x00000010
323 #define FS_DEBUG_SEND 0x00000020
324 #define FS_DEBUG_PHY 0x00000040
325 #define FS_DEBUG_CLEANUP 0x00000080
326 #define FS_DEBUG_QOS 0x00000100
327 #define FS_DEBUG_TXQ 0x00000200
328 #define FS_DEBUG_ALLOC 0x00000400
329 #define FS_DEBUG_TXMEM 0x00000800
330 #define FS_DEBUG_QSIZE 0x00001000
333 #define func_enter() fs_dprintk (FS_DEBUG_FLOW, "fs: enter %s\n", __FUNCTION__)
334 #define func_exit() fs_dprintk (FS_DEBUG_FLOW, "fs: exit %s\n", __FUNCTION__)
337 struct fs_dev *fs_boards = NULL;
341 static void my_hd (void *addr, int len)
344 unsigned char *ptr = addr;
348 for (j=0;j < ((len < 16)?len:16);j++) {
349 printk ("%02x %s", ptr[j], (j==7)?" ":"");
352 printk (" %s", (j==7)?" ":"");
354 for (j=0;j < ((len < 16)?len:16);j++) {
356 printk ("%c", (ch < 0x20)?'.':((ch > 0x7f)?'.':ch));
364 static void my_hd (void *addr, int len){}
367 /********** free an skb (as per ATM device driver documentation) **********/
369 /* Hmm. If this is ATM specific, why isn't there an ATM routine for this?
370 * I copied it over from the ambassador driver. -- REW */
372 static inline void fs_kfree_skb (struct sk_buff * skb)
374 if (ATM_SKB(skb)->vcc->pop)
375 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
377 dev_kfree_skb_any (skb);
383 /* It seems the ATM forum recommends this horribly complicated 16bit
384 * floating point format. Turns out the Ambassador uses the exact same
385 * encoding. I just copied it over. If Mitch agrees, I'll move it over
386 * to the atm_misc file or something like that. (and remove it from
387 * here and the ambassador driver) -- REW
390 /* The good thing about this format is that it is monotonic. So,
391 a conversion routine need not be very complicated. To be able to
392 round "nearest" we need to take along a few extra bits. Lets
393 put these after 16 bits, so that we can just return the top 16
394 bits of the 32bit number as the result:
396 int mr (unsigned int rate, int r)
399 static int round[4]={0, 0, 0xffff, 0x8000};
401 while (rate & 0xfc000000) {
405 while (! (rate & 0xfe000000)) {
410 // Now the mantissa is in positions bit 16-25. Excepf for the "hidden 1" that's in bit 26.
412 // Next add in the exponent
414 // And perform the rounding:
415 return (rate + round[r]) >> 16;
418 14 lines-of-code. Compare that with the 120 that the Ambassador
419 guys needed. (would be 8 lines shorter if I'd try to really reduce
422 int mr (unsigned int rate, int r)
425 static int round[4]={0, 0, 0xffff, 0x8000};
427 for (; rate & 0xfc000000 ;rate >>= 1, e++);
428 for (;!(rate & 0xfe000000);rate <<= 1, e--);
429 return ((rate & ~0x02000000) | (e << (16+9)) + round[r]) >> 16;
432 Exercise for the reader: Remove one more line-of-code, without
433 cheating. (Just joining two lines is cheating). (I know it's
434 possible, don't think you've beat me if you found it... If you
435 manage to lose two lines or more, keep me updated! ;-)
442 #define ROUND_NEAREST 3
443 /********** make rate (not quite as much fun as Horizon) **********/
445 static unsigned int make_rate (unsigned int rate, int r,
446 u16 * bits, unsigned int * actual)
448 unsigned char exp = -1; /* hush gcc */
449 unsigned int man = -1; /* hush gcc */
451 fs_dprintk (FS_DEBUG_QOS, "make_rate %u", rate);
453 /* rates in cells per second, ITU format (nasty 16-bit floating-point)
454 given 5-bit e and 9-bit m:
455 rate = EITHER (1+m/2^9)*2^e OR 0
456 bits = EITHER 1<<14 | e<<9 | m OR 0
457 (bit 15 is "reserved", bit 14 "non-zero")
458 smallest rate is 0 (special representation)
459 largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
460 smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
462 find position of top bit, this gives e
463 remove top bit and shift (rounding if feeling clever) by 9-e
465 /* Ambassador ucode bug: please don't set bit 14! so 0 rate not
466 representable. // This should move into the ambassador driver
467 when properly merged. -- REW */
469 if (rate > 0xffc00000U) {
470 /* larger than largest representable rate */
480 /* representable rate */
485 /* invariant: rate = man*2^(exp-31) */
486 while (!(man & (1<<31))) {
491 /* man has top bit set
492 rate = (2^31+(man-2^31))*2^(exp-31)
493 rate = (1+(man-2^31)/2^31)*2^exp
496 man &= 0xffffffffU; /* a nop on 32-bit systems */
497 /* rate = (1+man/2^32)*2^exp
499 exp is in the range 0 to 31, man is in the range 0 to 2^32-1
500 time to lose significance... we want m in the range 0 to 2^9-1
501 rounding presents a minor problem... we first decide which way
502 we are rounding (based on given rounding direction and possibly
503 the bits of the mantissa that are to be discarded).
513 /* check all bits that we are discarding */
515 man = (man>>(32-9)) + 1;
517 /* no need to check for round up outside of range */
526 case ROUND_NEAREST: {
527 /* check msb that we are discarding */
528 if (man & (1<<(32-9-1))) {
529 man = (man>>(32-9)) + 1;
531 /* no need to check for round up outside of range */
543 /* zero rate - not representable */
545 if (r == ROUND_DOWN) {
553 fs_dprintk (FS_DEBUG_QOS, "rate: man=%u, exp=%hu", man, exp);
556 *bits = /* (1<<14) | */ (exp<<9) | man;
560 ? (1 << exp) + (man << (exp-9))
561 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
569 /* FireStream access routines */
570 /* For DEEP-DOWN debugging these can be rigged to intercept accesses to
571 certain registers or to just log all accesses. */
573 static inline void write_fs (struct fs_dev *dev, int offset, u32 val)
575 writel (val, dev->base + offset);
579 static inline u32 read_fs (struct fs_dev *dev, int offset)
581 return readl (dev->base + offset);
586 static inline struct FS_QENTRY *get_qentry (struct fs_dev *dev, struct queue *q)
588 return bus_to_virt (read_fs (dev, Q_WP(q->offset)) & Q_ADDR_MASK);
592 static void submit_qentry (struct fs_dev *dev, struct queue *q, struct FS_QENTRY *qe)
595 struct FS_QENTRY *cqe;
597 /* XXX Sanity check: the write pointer can be checked to be
598 still the same as the value passed as qe... -- REW */
600 while ((wp = read_fs (dev, Q_WP (q->offset))) & Q_FULL) {
601 fs_dprintk (FS_DEBUG_TXQ, "Found queue at %x full. Waiting.\n",
607 cqe = bus_to_virt (wp);
609 fs_dprintk (FS_DEBUG_TXQ, "q mismatch! %p %p\n", qe, cqe);
612 write_fs (dev, Q_WP(q->offset), Q_INCWRAP);
619 rp = read_fs (dev, Q_RP(q->offset));
620 wp = read_fs (dev, Q_WP(q->offset));
621 fs_dprintk (FS_DEBUG_TXQ, "q at %d: %x-%x: %x entries.\n",
622 q->offset, rp, wp, wp-rp);
628 static struct FS_QENTRY pq[60];
631 static struct FS_BPENTRY dq[60];
636 static void submit_queue (struct fs_dev *dev, struct queue *q,
637 u32 cmd, u32 p1, u32 p2, u32 p3)
639 struct FS_QENTRY *qe;
641 qe = get_qentry (dev, q);
646 submit_qentry (dev, q, qe);
654 if (qp >= 60) qp = 0;
658 /* Test the "other" way one day... -- REW */
660 #define submit_command submit_queue
663 static void submit_command (struct fs_dev *dev, struct queue *q,
664 u32 cmd, u32 p1, u32 p2, u32 p3)
666 write_fs (dev, CMDR0, cmd);
667 write_fs (dev, CMDR1, p1);
668 write_fs (dev, CMDR2, p2);
669 write_fs (dev, CMDR3, p3);
675 static void process_return_queue (struct fs_dev *dev, struct queue *q)
678 struct FS_QENTRY *qe;
681 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
682 fs_dprintk (FS_DEBUG_QUEUE, "reaping return queue entry at %lx\n", rq);
683 qe = bus_to_virt (rq);
685 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. (%d)\n",
686 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
688 switch (STATUS_CODE (qe)) {
690 tc = bus_to_virt (qe->p0);
691 fs_dprintk (FS_DEBUG_ALLOC, "Free tc: %p\n", tc);
696 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
701 static void process_txdone_queue (struct fs_dev *dev, struct queue *q)
705 struct FS_QENTRY *qe;
707 struct FS_BPENTRY *td;
709 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
710 fs_dprintk (FS_DEBUG_QUEUE, "reaping txdone entry at %lx\n", rq);
711 qe = bus_to_virt (rq);
713 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x: %d\n",
714 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
716 if (STATUS_CODE (qe) != 2)
717 fs_dprintk (FS_DEBUG_TXMEM, "queue entry: %08x %08x %08x %08x: %d\n",
718 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
721 switch (STATUS_CODE (qe)) {
722 case 0x01: /* This is for AAL0 where we put the chip in streaming mode */
725 /* Process a real txdone entry. */
728 printk (KERN_WARNING "td not aligned: %ld\n", tmp);
730 td = bus_to_virt (tmp);
732 fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p.\n",
733 td->flags, td->next, td->bsa, td->aal_bufsize, td->skb );
736 if (skb == FS_VCC (ATM_SKB(skb)->vcc)->last_skb) {
737 wake_up_interruptible (& FS_VCC (ATM_SKB(skb)->vcc)->close_wait);
738 FS_VCC (ATM_SKB(skb)->vcc)->last_skb = NULL;
746 fs_dprintk (FS_DEBUG_QSIZE, "[%d]", td->dev->ntxpckts);
750 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
752 fs_dprintk (FS_DEBUG_TXMEM, "i");
753 fs_dprintk (FS_DEBUG_ALLOC, "Free t-skb: %p\n", skb);
756 fs_dprintk (FS_DEBUG_ALLOC, "Free trans-d: %p\n", td);
757 memset (td, 0x12, sizeof (struct FS_BPENTRY));
761 /* Here we get the tx purge inhibit command ... */
762 /* Action, I believe, is "don't do anything". -- REW */
766 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
771 static void process_incoming (struct fs_dev *dev, struct queue *q)
774 struct FS_QENTRY *qe;
775 struct FS_BPENTRY *pe;
778 struct atm_vcc *atm_vcc;
780 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
781 fs_dprintk (FS_DEBUG_QUEUE, "reaping incoming queue entry at %lx\n", rq);
782 qe = bus_to_virt (rq);
784 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. ",
785 qe->cmd, qe->p0, qe->p1, qe->p2);
787 fs_dprintk (FS_DEBUG_QUEUE, "-> %x: %s\n",
789 res_strings[STATUS_CODE(qe)]);
791 pe = bus_to_virt (qe->p0);
792 fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p %p.\n",
793 pe->flags, pe->next, pe->bsa, pe->aal_bufsize,
796 channo = qe->cmd & 0xffff;
798 if (channo < dev->nchannels)
799 atm_vcc = dev->atm_vccs[channo];
803 /* Single buffer packet */
804 switch (STATUS_CODE (qe)) {
806 /* Fall through for streaming mode */
807 case 0x2:/* Packet received OK.... */
812 fs_dprintk (FS_DEBUG_QUEUE, "Got skb: %p\n", skb);
813 if (FS_DEBUG_QUEUE & fs_debug) my_hd (bus_to_virt (pe->bsa), 0x20);
815 skb_put (skb, qe->p1 & 0xffff);
816 ATM_SKB(skb)->vcc = atm_vcc;
817 atomic_inc(&atm_vcc->stats->rx);
819 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p (pushed)\n", skb);
820 atm_vcc->push (atm_vcc, skb);
821 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
824 printk (KERN_ERR "Got a receive on a non-open channel %d.\n", channo);
827 case 0x17:/* AAL 5 CRC32 error. IFF the length field is nonzero, a buffer
828 has been consumed and needs to be processed. -- REW */
829 if (qe->p1 & 0xffff) {
830 pe = bus_to_virt (qe->p0);
832 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", pe->skb);
833 dev_kfree_skb_any (pe->skb);
834 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
838 atomic_inc(&atm_vcc->stats->rx_drop);
840 case 0x1f: /* Reassembly abort: no buffers. */
841 /* Silently increment error counter. */
843 atomic_inc(&atm_vcc->stats->rx_drop);
845 default: /* Hmm. Haven't written the code to handle the others yet... -- REW */
846 printk (KERN_WARNING "Don't know what to do with RX status %x: %s.\n",
847 STATUS_CODE(qe), res_strings[STATUS_CODE (qe)]);
849 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
855 #define DO_DIRECTION(tp) ((tp)->traffic_class != ATM_NONE)
857 static int fs_open(struct atm_vcc *atm_vcc, short vpi, int vci)
861 struct fs_transmit_config *tc;
862 struct atm_trafprm * txtp;
863 struct atm_trafprm * rxtp;
864 /* struct fs_receive_config *rc;*/
865 /* struct FS_QENTRY *qe; */
873 dev = FS_DEV(atm_vcc->dev);
874 fs_dprintk (FS_DEBUG_OPEN, "fs: open on dev: %p, vcc at %p\n",
877 error = atm_find_ci(atm_vcc, &vpi, &vci);
879 fs_dprintk (FS_DEBUG_OPEN, "fs: find_ci failed.\n");
885 if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
886 set_bit(ATM_VF_ADDR, &atm_vcc->flags);
888 if ((atm_vcc->qos.aal != ATM_AAL5) &&
889 (atm_vcc->qos.aal != ATM_AAL2))
890 return -EINVAL; /* XXX AAL0 */
892 fs_dprintk (FS_DEBUG_OPEN, "fs: (itf %d): open %d.%d\n",
893 atm_vcc->dev->number, atm_vcc->vpi, atm_vcc->vci);
895 /* XXX handle qos parameters (rate limiting) ? */
897 vcc = kmalloc(sizeof(struct fs_vcc), GFP_KERNEL);
898 fs_dprintk (FS_DEBUG_ALLOC, "Alloc VCC: %p(%d)\n", vcc, sizeof(struct fs_vcc));
900 clear_bit(ATM_VF_ADDR, &atm_vcc->flags);
904 atm_vcc->dev_data = vcc;
905 vcc->last_skb = NULL;
907 init_waitqueue_head (&vcc->close_wait);
909 txtp = &atm_vcc->qos.txtp;
910 rxtp = &atm_vcc->qos.rxtp;
912 if (!test_bit(ATM_VF_PARTIAL, &atm_vcc->flags)) {
914 /* Increment the channel numer: take a free one next time. */
915 for (to=33;to;to--, dev->channo++) {
916 /* We only have 32 channels */
917 if (dev->channo >= 32)
919 /* If we need to do RX, AND the RX is inuse, try the next */
920 if (DO_DIRECTION(rxtp) && dev->atm_vccs[dev->channo])
922 /* If we need to do TX, AND the TX is inuse, try the next */
923 if (DO_DIRECTION(txtp) && test_bit (dev->channo, dev->tx_inuse))
925 /* Ok, both are free! (or not needed) */
929 printk ("No more free channels for FS50..\n");
932 vcc->channo = dev->channo;
933 dev->channo &= dev->channel_mask;
936 vcc->channo = (vpi << FS155_VCI_BITS) | (vci);
937 if (((DO_DIRECTION(rxtp) && dev->atm_vccs[vcc->channo])) ||
938 ( DO_DIRECTION(txtp) && test_bit (vcc->channo, dev->tx_inuse))) {
939 printk ("Channel is in use for FS155.\n");
943 fs_dprintk (FS_DEBUG_OPEN, "OK. Allocated channel %x(%d).\n",
944 vcc->channo, vcc->channo);
947 if (DO_DIRECTION (txtp)) {
948 tc = kmalloc (sizeof (struct fs_transmit_config), GFP_KERNEL);
949 fs_dprintk (FS_DEBUG_ALLOC, "Alloc tc: %p(%d)\n",
950 tc, sizeof (struct fs_transmit_config));
952 fs_dprintk (FS_DEBUG_OPEN, "fs: can't alloc transmit_config.\n");
956 /* Allocate the "open" entry from the high priority txq. This makes
957 it most likely that the chip will notice it. It also prevents us
958 from having to wait for completion. On the other hand, we may
959 need to wait for completion anyway, to see if it completed
962 switch (atm_vcc->qos.aal) {
966 | TC_FLAGS_TRANSPARENT_PAYLOAD
969 | TC_FLAGS_TYPE_UBR /* XXX Change to VBR -- PVDL */
975 | TC_FLAGS_PACKET /* ??? */
980 printk ("Unknown aal: %d\n", atm_vcc->qos.aal);
983 /* Docs are vague about this atm_hdr field. By the way, the FS
984 * chip makes odd errors if lower bits are set.... -- REW */
985 tc->atm_hdr = (vpi << 20) | (vci << 4);
987 int pcr = atm_pcr_goal (txtp);
989 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
991 /* XXX Hmm. officially we're only allowed to do this if rounding
992 is round_down -- REW */
994 if (pcr > 51840000/53/8) pcr = 51840000/53/8;
996 if (pcr > 155520000/53/8) pcr = 155520000/53/8;
1000 tmc0 = IS_FS50(dev)?0x61BE:0x64c9; /* Just copied over the bits from Fujitsu -- REW */
1009 error = make_rate (pcr, r, &tmc0, 0);
1011 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
1014 tc->TMC[0] = tmc0 | 0x4000;
1015 tc->TMC[1] = 0; /* Unused */
1016 tc->TMC[2] = 0; /* Unused */
1017 tc->TMC[3] = 0; /* Unused */
1019 tc->spec = 0; /* UTOPIA address, UDF, HEC: Unused -> 0 */
1020 tc->rtag[0] = 0; /* What should I do with routing tags???
1021 -- Not used -- AS -- Thanks -- REW*/
1025 if (fs_debug & FS_DEBUG_OPEN) {
1026 fs_dprintk (FS_DEBUG_OPEN, "TX config record:\n");
1027 my_hd (tc, sizeof (*tc));
1030 /* We now use the "submit_command" function to submit commands to
1031 the firestream. There is a define up near the definition of
1032 that routine that switches this routine between immediate write
1033 to the immediate comamnd registers and queuing the commands in
1034 the HPTXQ for execution. This last technique might be more
1035 efficient if we know we're going to submit a whole lot of
1036 commands in one go, but this driver is not setup to be able to
1037 use such a construct. So it probably doen't matter much right
1040 /* The command is IMMediate and INQueue. The parameters are out-of-line.. */
1041 submit_command (dev, &dev->hp_txq,
1042 QE_CMD_CONFIG_TX | QE_CMD_IMM_INQ | vcc->channo,
1043 virt_to_bus (tc), 0, 0);
1045 submit_command (dev, &dev->hp_txq,
1046 QE_CMD_TX_EN | QE_CMD_IMM_INQ | vcc->channo,
1048 set_bit (vcc->channo, dev->tx_inuse);
1051 if (DO_DIRECTION (rxtp)) {
1052 dev->atm_vccs[vcc->channo] = atm_vcc;
1054 for (bfp = 0;bfp < FS_NR_FREE_POOLS; bfp++)
1055 if (atm_vcc->qos.rxtp.max_sdu <= dev->rx_fp[bfp].bufsize) break;
1056 if (bfp >= FS_NR_FREE_POOLS) {
1057 fs_dprintk (FS_DEBUG_OPEN, "No free pool fits sdu: %d.\n",
1058 atm_vcc->qos.rxtp.max_sdu);
1059 /* XXX Cleanup? -- Would just calling fs_close work??? -- REW */
1061 /* XXX clear tx inuse. Close TX part? */
1062 dev->atm_vccs[vcc->channo] = NULL;
1067 switch (atm_vcc->qos.aal) {
1070 submit_command (dev, &dev->hp_txq,
1071 QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1073 RC_FLAGS_BFPS_BFP * bfp |
1074 RC_FLAGS_RXBM_PSB, 0, 0);
1077 submit_command (dev, &dev->hp_txq,
1078 QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1080 RC_FLAGS_BFPS_BFP * bfp |
1081 RC_FLAGS_RXBM_PSB, 0, 0);
1084 if (IS_FS50 (dev)) {
1085 submit_command (dev, &dev->hp_txq,
1086 QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1088 (vpi << 16) | vci, 0 ); /* XXX -- Use defines. */
1090 submit_command (dev, &dev->hp_txq,
1091 QE_CMD_RX_EN | QE_CMD_IMM_INQ | vcc->channo,
1095 /* Indicate we're done! */
1096 set_bit(ATM_VF_READY, &atm_vcc->flags);
1103 static void fs_close(struct atm_vcc *atm_vcc)
1105 struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1106 struct fs_vcc *vcc = FS_VCC (atm_vcc);
1107 struct atm_trafprm * txtp;
1108 struct atm_trafprm * rxtp;
1112 clear_bit(ATM_VF_READY, &atm_vcc->flags);
1114 fs_dprintk (FS_DEBUG_QSIZE, "--==**[%d]**==--", dev->ntxpckts);
1115 if (vcc->last_skb) {
1116 fs_dprintk (FS_DEBUG_QUEUE, "Waiting for skb %p to be sent.\n",
1118 /* We're going to wait for the last packet to get sent on this VC. It would
1119 be impolite not to send them don't you think?
1121 We don't know which packets didn't get sent. So if we get interrupted in
1122 this sleep_on, we'll lose any reference to these packets. Memory leak!
1123 On the other hand, it's awfully convenient that we can abort a "close" that
1124 is taking too long. Maybe just use non-interruptible sleep on? -- REW */
1125 interruptible_sleep_on (& vcc->close_wait);
1128 txtp = &atm_vcc->qos.txtp;
1129 rxtp = &atm_vcc->qos.rxtp;
1132 /* See App note XXX (Unpublished as of now) for the reason for the
1133 removal of the "CMD_IMM_INQ" part of the TX_PURGE_INH... -- REW */
1135 if (DO_DIRECTION (txtp)) {
1136 submit_command (dev, &dev->hp_txq,
1137 QE_CMD_TX_PURGE_INH | /*QE_CMD_IMM_INQ|*/ vcc->channo, 0,0,0);
1138 clear_bit (vcc->channo, dev->tx_inuse);
1141 if (DO_DIRECTION (rxtp)) {
1142 submit_command (dev, &dev->hp_txq,
1143 QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1144 dev->atm_vccs [vcc->channo] = NULL;
1146 /* This means that this is configured as a receive channel */
1147 if (IS_FS50 (dev)) {
1148 /* Disable the receive filter. Is 0/0 indeed an invalid receive
1149 channel? -- REW. Yes it is. -- Hang. Ok. I'll use -1
1150 (0xfff...) -- REW */
1151 submit_command (dev, &dev->hp_txq,
1152 QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1153 0x80 + vcc->channo, -1, 0 );
1157 fs_dprintk (FS_DEBUG_ALLOC, "Free vcc: %p\n", vcc);
1164 static int fs_send (struct atm_vcc *atm_vcc, struct sk_buff *skb)
1166 struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1167 struct fs_vcc *vcc = FS_VCC (atm_vcc);
1168 struct FS_BPENTRY *td;
1172 fs_dprintk (FS_DEBUG_TXMEM, "I");
1173 fs_dprintk (FS_DEBUG_SEND, "Send: atm_vcc %p skb %p vcc %p dev %p\n",
1174 atm_vcc, skb, vcc, dev);
1176 fs_dprintk (FS_DEBUG_ALLOC, "Alloc t-skb: %p (atm_send)\n", skb);
1178 ATM_SKB(skb)->vcc = atm_vcc;
1180 vcc->last_skb = skb;
1182 td = kmalloc (sizeof (struct FS_BPENTRY), GFP_ATOMIC);
1183 fs_dprintk (FS_DEBUG_ALLOC, "Alloc transd: %p(%d)\n", td, sizeof (struct FS_BPENTRY));
1185 /* Oops out of mem */
1189 fs_dprintk (FS_DEBUG_SEND, "first word in buffer: %x\n",
1190 *(int *) skb->data);
1192 td->flags = TD_EPI | TD_DATA | skb->len;
1194 td->bsa = virt_to_bus (skb->data);
1201 dq[qd].flags = td->flags;
1202 dq[qd].next = td->next;
1203 dq[qd].bsa = td->bsa;
1204 dq[qd].skb = td->skb;
1205 dq[qd].dev = td->dev;
1207 if (qd >= 60) qd = 0;
1210 submit_queue (dev, &dev->hp_txq,
1211 QE_TRANSMIT_DE | vcc->channo,
1212 virt_to_bus (td), 0,
1215 fs_dprintk (FS_DEBUG_QUEUE, "in send: txq %d txrq %d\n",
1216 read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1217 read_fs (dev, Q_SA (dev->hp_txq.offset)),
1218 read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1219 read_fs (dev, Q_SA (dev->tx_relq.offset)));
1226 /* Some function placeholders for functions we don't yet support. */
1229 static int fs_ioctl(struct atm_dev *dev,unsigned int cmd,void *arg)
1233 return -ENOIOCTLCMD;
1237 static int fs_getsockopt(struct atm_vcc *vcc,int level,int optname,
1238 void *optval,int optlen)
1246 static int fs_setsockopt(struct atm_vcc *vcc,int level,int optname,
1247 void *optval,int optlen)
1255 static void fs_phy_put(struct atm_dev *dev,unsigned char value,
1263 static unsigned char fs_phy_get(struct atm_dev *dev,unsigned long addr)
1271 static void fs_feedback(struct atm_vcc *vcc,struct sk_buff *skb,
1272 unsigned long start,unsigned long dest,int len)
1279 static int fs_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags)
1289 static const struct atmdev_ops ops = {
1297 /* ioctl: fs_ioctl, */
1298 /* getsockopt: fs_getsockopt, */
1299 /* setsockopt: fs_setsockopt, */
1300 /* feedback: fs_feedback, */
1301 /* change_qos: fs_change_qos, */
1303 /* For now implement these internally here... */
1304 /* phy_put: fs_phy_put, */
1305 /* phy_get: fs_phy_get, */
1309 static void __init undocumented_pci_fix (struct pci_dev *pdev)
1313 /* The Windows driver says: */
1314 /* Switch off FireStream Retry Limit Threshold
1317 /* The register at 0x28 is documented as "reserved", no further
1320 pci_read_config_dword (pdev, 0x28, &tint);
1323 pci_write_config_dword (pdev, 0x28, tint);
1329 /**************************************************************************
1331 **************************************************************************/
1333 static void __init write_phy (struct fs_dev *dev, int regnum, int val)
1335 submit_command (dev, &dev->hp_txq, QE_CMD_PRP_WR | QE_CMD_IMM_INQ,
1339 static int __init init_phy (struct fs_dev *dev, struct reginit_item *reginit)
1344 while (reginit->reg != PHY_EOF) {
1345 if (reginit->reg == PHY_CLEARALL) {
1346 /* "PHY_CLEARALL means clear all registers. Numregisters is in "val". */
1347 for (i=0;i<reginit->val;i++) {
1348 write_phy (dev, i, 0);
1351 write_phy (dev, reginit->reg, reginit->val);
1359 static void reset_chip (struct fs_dev *dev)
1363 write_fs (dev, SARMODE0, SARMODE0_SRTS0);
1365 /* Undocumented delay */
1368 /* The "internal registers are documented to all reset to zero, but
1369 comments & code in the Windows driver indicates that the pools are
1371 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1372 write_fs (dev, FP_CNF (RXB_FP(i)), 0);
1373 write_fs (dev, FP_SA (RXB_FP(i)), 0);
1374 write_fs (dev, FP_EA (RXB_FP(i)), 0);
1375 write_fs (dev, FP_CNT (RXB_FP(i)), 0);
1376 write_fs (dev, FP_CTU (RXB_FP(i)), 0);
1379 /* The same goes for the match channel registers, although those are
1380 NOT documented that way in the Windows driver. -- REW */
1381 /* The Windows driver DOES write 0 to these registers somewhere in
1382 the init sequence. However, a small hardware-feature, will
1383 prevent reception of data on VPI/VCI = 0/0 (Unless the channel
1384 allocated happens to have no disabled channels that have a lower
1387 /* Clear the match channel registers. */
1388 if (IS_FS50 (dev)) {
1389 for (i=0;i<FS50_NR_CHANNELS;i++) {
1390 write_fs (dev, 0x200 + i * 4, -1);
1395 static void __init *aligned_kmalloc (int size, int flags, int alignment)
1399 if (alignment <= 0x10) {
1400 t = kmalloc (size, flags);
1401 if ((unsigned int)t & (alignment-1)) {
1402 printk ("Kmalloc doesn't align things correctly! %p\n", t);
1404 return aligned_kmalloc (size, flags, alignment * 4);
1408 printk (KERN_ERR "Request for > 0x10 alignment not yet implemented (hard!)\n");
1412 static int __init init_q (struct fs_dev *dev,
1413 struct queue *txq, int queue, int nentries, int is_rq)
1415 int sz = nentries * sizeof (struct FS_QENTRY);
1416 struct FS_QENTRY *p;
1420 fs_dprintk (FS_DEBUG_INIT, "Inititing queue at %x: %d entries:\n",
1423 p = aligned_kmalloc (sz, GFP_KERNEL, 0x10);
1424 fs_dprintk (FS_DEBUG_ALLOC, "Alloc queue: %p(%d)\n", p, sz);
1428 write_fs (dev, Q_SA(queue), virt_to_bus(p));
1429 write_fs (dev, Q_EA(queue), virt_to_bus(p+nentries-1));
1430 write_fs (dev, Q_WP(queue), virt_to_bus(p));
1431 write_fs (dev, Q_RP(queue), virt_to_bus(p));
1433 /* Configuration for the receive queue: 0: interrupt immediately,
1434 no pre-warning to empty queues: We do our best to keep the
1435 queue filled anyway. */
1436 write_fs (dev, Q_CNF(queue), 0 );
1441 txq->offset = queue;
1448 static int __init init_fp (struct fs_dev *dev,
1449 struct freepool *fp, int queue, int bufsize, int nr_buffers)
1453 fs_dprintk (FS_DEBUG_INIT, "Inititing free pool at %x:\n", queue);
1455 write_fs (dev, FP_CNF(queue), (bufsize * RBFP_RBS) | RBFP_RBSVAL | RBFP_CME);
1456 write_fs (dev, FP_SA(queue), 0);
1457 write_fs (dev, FP_EA(queue), 0);
1458 write_fs (dev, FP_CTU(queue), 0);
1459 write_fs (dev, FP_CNT(queue), 0);
1462 fp->bufsize = bufsize;
1463 fp->nr_buffers = nr_buffers;
1470 static inline int nr_buffers_in_freepool (struct fs_dev *dev, struct freepool *fp)
1473 /* This seems to be unreliable.... */
1474 return read_fs (dev, FP_CNT (fp->offset));
1481 /* Check if this gets going again if a pool ever runs out. -- Yes, it
1482 does. I've seen "receive abort: no buffers" and things started
1483 working again after that... -- REW */
1485 static void top_off_fp (struct fs_dev *dev, struct freepool *fp, int gfp_flags)
1487 struct FS_BPENTRY *qe, *ne;
1488 struct sk_buff *skb;
1491 fs_dprintk (FS_DEBUG_QUEUE, "Topping off queue at %x (%d-%d/%d)\n",
1492 fp->offset, read_fs (dev, FP_CNT (fp->offset)), fp->n,
1494 while (nr_buffers_in_freepool(dev, fp) < fp->nr_buffers) {
1496 skb = alloc_skb (fp->bufsize, gfp_flags);
1497 fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-skb: %p(%d)\n", skb, fp->bufsize);
1499 ne = kmalloc (sizeof (struct FS_BPENTRY), gfp_flags);
1500 fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-d: %p(%d)\n", ne, sizeof (struct FS_BPENTRY));
1502 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", skb);
1503 dev_kfree_skb_any (skb);
1507 fs_dprintk (FS_DEBUG_QUEUE, "Adding skb %p desc %p -> %p(%p) ",
1508 skb, ne, skb->data, skb->head);
1510 ne->flags = FP_FLAGS_EPI | fp->bufsize;
1511 ne->next = virt_to_bus (NULL);
1512 ne->bsa = virt_to_bus (skb->data);
1513 ne->aal_bufsize = fp->bufsize;
1517 qe = (struct FS_BPENTRY *) (read_fs (dev, FP_EA(fp->offset)));
1518 fs_dprintk (FS_DEBUG_QUEUE, "link at %p\n", qe);
1520 qe = bus_to_virt ((long) qe);
1521 qe->next = virt_to_bus(ne);
1522 qe->flags &= ~FP_FLAGS_EPI;
1524 write_fs (dev, FP_SA(fp->offset), virt_to_bus(ne));
1526 write_fs (dev, FP_EA(fp->offset), virt_to_bus (ne));
1527 fp->n++; /* XXX Atomic_inc? */
1528 write_fs (dev, FP_CTU(fp->offset), 1);
1531 fs_dprintk (FS_DEBUG_QUEUE, "Added %d entries. \n", n);
1534 static void __devexit free_queue (struct fs_dev *dev, struct queue *txq)
1538 write_fs (dev, Q_SA(txq->offset), 0);
1539 write_fs (dev, Q_EA(txq->offset), 0);
1540 write_fs (dev, Q_RP(txq->offset), 0);
1541 write_fs (dev, Q_WP(txq->offset), 0);
1542 /* Configuration ? */
1544 fs_dprintk (FS_DEBUG_ALLOC, "Free queue: %p\n", txq->sa);
1550 static void __devexit free_freepool (struct fs_dev *dev, struct freepool *fp)
1554 write_fs (dev, FP_CNF(fp->offset), 0);
1555 write_fs (dev, FP_SA (fp->offset), 0);
1556 write_fs (dev, FP_EA (fp->offset), 0);
1557 write_fs (dev, FP_CNT(fp->offset), 0);
1558 write_fs (dev, FP_CTU(fp->offset), 0);
1565 static void fs_irq (int irq, void *dev_id, struct pt_regs * pt_regs)
1569 struct fs_dev *dev = dev_id;
1571 status = read_fs (dev, ISR);
1572 if (!status) return;
1576 #ifdef IRQ_RATE_LIMIT
1577 /* Aaargh! I'm ashamed. This costs more lines-of-code than the actual
1578 interrupt routine!. (Well, used to when I wrote that comment) -- REW */
1583 if (lastjif == jiffies) {
1584 if (++nintr > IRQ_RATE_LIMIT) {
1585 free_irq (dev->irq, dev_id);
1586 printk (KERN_ERR "fs: Too many interrupts. Turning off interrupt %d.\n",
1595 fs_dprintk (FS_DEBUG_QUEUE, "in intr: txq %d txrq %d\n",
1596 read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1597 read_fs (dev, Q_SA (dev->hp_txq.offset)),
1598 read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1599 read_fs (dev, Q_SA (dev->tx_relq.offset)));
1601 /* print the bits in the ISR register. */
1602 if (fs_debug & FS_DEBUG_IRQ) {
1603 /* The FS_DEBUG things are unneccesary here. But this way it is
1604 clear for grep that these are debug prints. */
1605 fs_dprintk (FS_DEBUG_IRQ, "IRQ status:");
1607 if (status & (1 << i))
1608 fs_dprintk (FS_DEBUG_IRQ, " %s", irq_bitname[i]);
1609 fs_dprintk (FS_DEBUG_IRQ, "\n");
1612 if (status & ISR_RBRQ0_W) {
1613 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (0)!!!!\n");
1614 process_incoming (dev, &dev->rx_rq[0]);
1615 /* items mentioned on RBRQ0 are from FP 0 or 1. */
1616 top_off_fp (dev, &dev->rx_fp[0], GFP_ATOMIC);
1617 top_off_fp (dev, &dev->rx_fp[1], GFP_ATOMIC);
1620 if (status & ISR_RBRQ1_W) {
1621 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (1)!!!!\n");
1622 process_incoming (dev, &dev->rx_rq[1]);
1623 top_off_fp (dev, &dev->rx_fp[2], GFP_ATOMIC);
1624 top_off_fp (dev, &dev->rx_fp[3], GFP_ATOMIC);
1627 if (status & ISR_RBRQ2_W) {
1628 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (2)!!!!\n");
1629 process_incoming (dev, &dev->rx_rq[2]);
1630 top_off_fp (dev, &dev->rx_fp[4], GFP_ATOMIC);
1631 top_off_fp (dev, &dev->rx_fp[5], GFP_ATOMIC);
1634 if (status & ISR_RBRQ3_W) {
1635 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (3)!!!!\n");
1636 process_incoming (dev, &dev->rx_rq[3]);
1637 top_off_fp (dev, &dev->rx_fp[6], GFP_ATOMIC);
1638 top_off_fp (dev, &dev->rx_fp[7], GFP_ATOMIC);
1641 if (status & ISR_CSQ_W) {
1642 fs_dprintk (FS_DEBUG_IRQ, "Command executed ok!\n");
1643 process_return_queue (dev, &dev->st_q);
1646 if (status & ISR_TBRQ_W) {
1647 fs_dprintk (FS_DEBUG_IRQ, "Data tramsitted!\n");
1648 process_txdone_queue (dev, &dev->tx_relq);
1656 static void fs_poll (unsigned long data)
1658 struct fs_dev *dev = (struct fs_dev *) data;
1660 fs_irq (0, dev, NULL);
1661 dev->timer.expires = jiffies + FS_POLL_FREQ;
1662 add_timer (&dev->timer);
1666 static int __init fs_init (struct fs_dev *dev)
1668 struct pci_dev *pci_dev;
1673 pci_dev = dev->pci_dev;
1675 printk (KERN_INFO "found a FireStream %d card, base %08lx, irq%d.\n",
1676 IS_FS50(dev)?50:155,
1677 pci_resource_start(pci_dev, 0), dev->pci_dev->irq);
1679 if (fs_debug & FS_DEBUG_INIT)
1680 my_hd ((unsigned char *) dev, sizeof (*dev));
1682 undocumented_pci_fix (pci_dev);
1684 dev->hw_base = pci_resource_start(pci_dev, 0);
1686 dev->base = (ulong) ioremap(dev->hw_base, 0x1000);
1690 write_fs (dev, SARMODE0, 0
1691 | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1692 | (1 * SARMODE0_INTMODE_READCLEAR)
1693 | (1 * SARMODE0_CWRE)
1694 | IS_FS50(dev)?SARMODE0_PRPWT_FS50_5:
1695 SARMODE0_PRPWT_FS155_3
1696 | (1 * SARMODE0_CALSUP_1)
1699 | SARMODE0_ABRVCS_32
1700 | SARMODE0_TXVCS_32):
1703 | SARMODE0_ABRVCS_1k
1704 | SARMODE0_TXVCS_1k));
1706 /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes
1710 isr = read_fs (dev, ISR);
1712 /* This bit is documented as "RESERVED" */
1713 if (isr & ISR_INIT_ERR) {
1714 printk (KERN_ERR "Error initializing the FS... \n");
1717 if (isr & ISR_INIT) {
1718 fs_dprintk (FS_DEBUG_INIT, "Ha! Initialized OK!\n");
1722 /* Try again after 10ms. */
1723 current->state = TASK_UNINTERRUPTIBLE;
1724 schedule_timeout ((HZ+99)/100);
1728 printk (KERN_ERR "timeout initializing the FS... \n");
1732 /* XXX fix for fs155 */
1733 dev->channel_mask = 0x1f;
1737 write_fs (dev, SARMODE1, 0
1738 | (fs_keystream * SARMODE1_DEFHEC) /* XXX PHY */
1739 | ((loopback == 1) * SARMODE1_TSTLP) /* XXX Loopback mode enable... */
1740 | (1 * SARMODE1_DCRM)
1741 | (1 * SARMODE1_DCOAM)
1742 | (0 * SARMODE1_OAMCRC)
1743 | (0 * SARMODE1_DUMPE)
1744 | (0 * SARMODE1_GPLEN)
1745 | (0 * SARMODE1_GNAM)
1746 | (0 * SARMODE1_GVAS)
1747 | (0 * SARMODE1_GPAS)
1748 | (1 * SARMODE1_GPRI)
1749 | (0 * SARMODE1_PMS)
1750 | (0 * SARMODE1_GFCR)
1751 | (1 * SARMODE1_HECM2)
1752 | (1 * SARMODE1_HECM1)
1753 | (1 * SARMODE1_HECM0)
1754 | (1 << 12) /* That's what hang's driver does. Program to 0 */
1755 | (0 * 0xff) /* XXX FS155 */);
1758 /* Cal prescale etc */
1761 write_fs (dev, TMCONF, 0x0000000f);
1762 write_fs (dev, CALPRESCALE, 0x01010101 * num);
1763 write_fs (dev, 0x80, 0x000F00E4);
1766 write_fs (dev, CELLOSCONF, 0
1767 | ( 0 * CELLOSCONF_CEN)
1769 | (0x80 * CELLOSCONF_COBS)
1770 | (num * CELLOSCONF_COPK) /* Changed from 0xff to 0x5a */
1771 | (num * CELLOSCONF_COST));/* after a hint from Hang.
1772 * performance jumped 50->70... */
1774 /* Magic value by Hang */
1775 write_fs (dev, CELLOSCONF_COST, 0x0B809191);
1777 if (IS_FS50 (dev)) {
1778 write_fs (dev, RAS0, RAS0_DCD_XHLT);
1779 dev->atm_dev->ci_range.vpi_bits = 12;
1780 dev->atm_dev->ci_range.vci_bits = 16;
1781 dev->nchannels = FS50_NR_CHANNELS;
1783 write_fs (dev, RAS0, RAS0_DCD_XHLT
1784 | (((1 << FS155_VPI_BITS) - 1) * RAS0_VPSEL)
1785 | (((1 << FS155_VCI_BITS) - 1) * RAS0_VCSEL));
1786 /* We can chose the split arbitarily. We might be able to
1787 support more. Whatever. This should do for now. */
1788 dev->atm_dev->ci_range.vpi_bits = FS155_VPI_BITS;
1789 dev->atm_dev->ci_range.vci_bits = FS155_VCI_BITS;
1791 /* Address bits we can't use should be compared to 0. */
1792 write_fs (dev, RAC, 0);
1794 /* Manual (AN9, page 6) says ASF1=0 means compare Utopia address
1795 * too. I can't find ASF1 anywhere. Anyway, we AND with just hte
1796 * other bits, then compare with 0, which is exactly what we
1798 write_fs (dev, RAM, (1 << (28 - FS155_VPI_BITS - FS155_VCI_BITS)) - 1);
1799 dev->nchannels = FS155_NR_CHANNELS;
1801 dev->atm_vccs = kmalloc (dev->nchannels * sizeof (struct atm_vcc *),
1803 fs_dprintk (FS_DEBUG_ALLOC, "Alloc atmvccs: %p(%d)\n",
1804 dev->atm_vccs, dev->nchannels * sizeof (struct atm_vcc *));
1806 if (!dev->atm_vccs) {
1807 printk (KERN_WARNING "Couldn't allocate memory for VCC buffers. Woops!\n");
1808 /* XXX Clean up..... */
1811 memset (dev->atm_vccs, 0, dev->nchannels * sizeof (struct atm_vcc *));
1813 dev->tx_inuse = kmalloc (dev->nchannels / 8 /* bits/byte */ , GFP_KERNEL);
1814 fs_dprintk (FS_DEBUG_ALLOC, "Alloc tx_inuse: %p(%d)\n",
1815 dev->atm_vccs, dev->nchannels / 8);
1817 if (!dev->tx_inuse) {
1818 printk (KERN_WARNING "Couldn't allocate memory for tx_inuse bits!\n");
1819 /* XXX Clean up..... */
1822 memset (dev->tx_inuse, 0, dev->nchannels / 8);
1824 /* -- RAS1 : FS155 and 50 differ. Default (0) should be OK for both */
1825 /* -- RAS2 : FS50 only: Default is OK. */
1827 /* DMAMODE, default should be OK. -- REW */
1828 write_fs (dev, DMAMR, DMAMR_TX_MODE_FULL);
1830 init_q (dev, &dev->hp_txq, TX_PQ(TXQ_HP), TXQ_NENTRIES, 0);
1831 init_q (dev, &dev->lp_txq, TX_PQ(TXQ_LP), TXQ_NENTRIES, 0);
1832 init_q (dev, &dev->tx_relq, TXB_RQ, TXQ_NENTRIES, 1);
1833 init_q (dev, &dev->st_q, ST_Q, TXQ_NENTRIES, 1);
1835 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1836 init_fp (dev, &dev->rx_fp[i], RXB_FP(i),
1837 rx_buf_sizes[i], rx_pool_sizes[i]);
1838 top_off_fp (dev, &dev->rx_fp[i], GFP_KERNEL);
1842 for (i=0;i < FS_NR_RX_QUEUES;i++)
1843 init_q (dev, &dev->rx_rq[i], RXB_RQ(i), RXRQ_NENTRIES, 1);
1845 dev->irq = pci_dev->irq;
1846 if (request_irq (dev->irq, fs_irq, SA_SHIRQ, "firestream", dev)) {
1847 printk (KERN_WARNING "couldn't get irq %d for firestream.\n", pci_dev->irq);
1848 /* XXX undo all previous stuff... */
1851 fs_dprintk (FS_DEBUG_INIT, "Grabbed irq %d for dev at %p.\n", dev->irq, dev);
1853 /* We want to be notified of most things. Just the statistics count
1854 overflows are not interesting */
1855 write_fs (dev, IMR, 0
1863 write_fs (dev, SARMODE0, 0
1864 | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1865 | (1 * SARMODE0_GINT)
1866 | (1 * SARMODE0_INTMODE_READCLEAR)
1867 | (0 * SARMODE0_CWRE)
1868 | (IS_FS50(dev)?SARMODE0_PRPWT_FS50_5:
1869 SARMODE0_PRPWT_FS155_3)
1870 | (1 * SARMODE0_CALSUP_1)
1873 | SARMODE0_ABRVCS_32
1874 | SARMODE0_TXVCS_32):
1877 | SARMODE0_ABRVCS_1k
1878 | SARMODE0_TXVCS_1k))
1879 | (1 * SARMODE0_RUN));
1881 init_phy (dev, PHY_NTC_INIT);
1883 if (loopback == 2) {
1884 write_phy (dev, 0x39, 0x000e);
1888 init_timer (&dev->timer);
1889 dev->timer.data = (unsigned long) dev;
1890 dev->timer.function = fs_poll;
1891 dev->timer.expires = jiffies + FS_POLL_FREQ;
1892 add_timer (&dev->timer);
1895 dev->atm_dev->dev_data = dev;
1901 static int __init firestream_init_one (struct pci_dev *pci_dev,
1902 const struct pci_device_id *ent)
1904 struct atm_dev *atm_dev;
1905 struct fs_dev *fs_dev;
1907 if (pci_enable_device(pci_dev))
1910 fs_dev = kmalloc (sizeof (struct fs_dev), GFP_KERNEL);
1911 fs_dprintk (FS_DEBUG_ALLOC, "Alloc fs-dev: %p(%d)\n",
1912 fs_dev, sizeof (struct fs_dev));
1916 memset (fs_dev, 0, sizeof (struct fs_dev));
1918 atm_dev = atm_dev_register("fs", &ops, -1, NULL);
1920 goto err_out_free_fs_dev;
1922 fs_dev->pci_dev = pci_dev;
1923 fs_dev->atm_dev = atm_dev;
1924 fs_dev->flags = ent->driver_data;
1926 if (fs_init(fs_dev))
1927 goto err_out_free_atm_dev;
1929 fs_dev->next = fs_boards;
1933 err_out_free_atm_dev:
1934 atm_dev_deregister(atm_dev);
1935 err_out_free_fs_dev:
1941 void __devexit firestream_remove_one (struct pci_dev *pdev)
1944 struct fs_dev *dev, *nxtdev;
1946 struct FS_BPENTRY *fp, *nxt;
1951 printk ("hptxq:\n");
1952 for (i=0;i<60;i++) {
1953 printk ("%d: %08x %08x %08x %08x \n",
1954 i, pq[qp].cmd, pq[qp].p0, pq[qp].p1, pq[qp].p2);
1956 if (qp >= 60) qp = 0;
1959 printk ("descriptors:\n");
1960 for (i=0;i<60;i++) {
1961 printk ("%d: %p: %08x %08x %p %p\n",
1962 i, da[qd], dq[qd].flags, dq[qd].bsa, dq[qd].skb, dq[qd].dev);
1964 if (qd >= 60) qd = 0;
1968 for (dev = fs_boards;dev != NULL;dev=nxtdev) {
1969 fs_dprintk (FS_DEBUG_CLEANUP, "Releasing resources for dev at %p.\n", dev);
1971 /* XXX Hit all the tx channels too! */
1973 for (i=0;i < dev->nchannels;i++) {
1974 if (dev->atm_vccs[i]) {
1975 vcc = FS_VCC (dev->atm_vccs[i]);
1976 submit_command (dev, &dev->hp_txq,
1977 QE_CMD_TX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1978 submit_command (dev, &dev->hp_txq,
1979 QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1984 /* XXX Wait a while for the chip to release all buffers. */
1986 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1987 for (fp=bus_to_virt (read_fs (dev, FP_SA(dev->rx_fp[i].offset)));
1988 !(fp->flags & FP_FLAGS_EPI);fp = nxt) {
1989 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1990 dev_kfree_skb_any (fp->skb);
1991 nxt = bus_to_virt (fp->next);
1992 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
1995 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1996 dev_kfree_skb_any (fp->skb);
1997 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
2001 /* Hang the chip in "reset", prevent it clobbering memory that is
2005 fs_dprintk (FS_DEBUG_CLEANUP, "Freeing irq%d.\n", dev->irq);
2006 free_irq (dev->irq, dev);
2007 del_timer (&dev->timer);
2009 atm_dev_deregister(dev->atm_dev);
2010 free_queue (dev, &dev->hp_txq);
2011 free_queue (dev, &dev->lp_txq);
2012 free_queue (dev, &dev->tx_relq);
2013 free_queue (dev, &dev->st_q);
2015 fs_dprintk (FS_DEBUG_ALLOC, "Free atmvccs: %p\n", dev->atm_vccs);
2016 kfree (dev->atm_vccs);
2018 for (i=0;i< FS_NR_FREE_POOLS;i++)
2019 free_freepool (dev, &dev->rx_fp[i]);
2021 for (i=0;i < FS_NR_RX_QUEUES;i++)
2022 free_queue (dev, &dev->rx_rq[i]);
2024 fs_dprintk (FS_DEBUG_ALLOC, "Free fs-dev: %p\n", dev);
2034 int __init fs_detect(void)
2036 struct pci_dev *pci_dev;
2041 while ((pci_dev = pci_find_device(PCI_VENDOR_ID_FUJITSU_ME,
2042 PCI_DEVICE_ID_FUJITSU_FS50,
2044 if (fs_register_and_init (pci_dev, &fs_pci_tbl[0]))
2049 while ((pci_dev = pci_find_device(PCI_VENDOR_ID_FUJITSU_ME,
2050 PCI_DEVICE_ID_FUJITSU_FS155,
2052 if (fs_register_and_init (pci_dev, FS_IS155))
2062 int __init init_PCI (void)
2063 { /* Begin init_PCI */
2066 printk ("init_PCI\n");
2068 memset (&firestream_driver, 0, sizeof (firestream_driver));
2069 firestream_driver.name = "firestream";
2070 firestream_driver.id_table = firestream_pci_tbl;
2071 firestream_driver.probe = fs_register_and_init;
2073 pci_count = pci_register_driver (&firestream_driver);
2075 if (pci_count <= 0) {
2076 pci_unregister_driver (&firestream_driver);
2082 } /* End init_PCI */
2088 #define firestream_init init_module
2092 static struct pci_device_id firestream_pci_tbl[] __devinitdata = {
2093 { PCI_VENDOR_ID_FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50,
2094 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FS_IS50},
2095 { PCI_VENDOR_ID_FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155,
2096 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FS_IS155},
2100 MODULE_DEVICE_TABLE(pci, firestream_pci_tbl);
2102 static struct pci_driver firestream_driver = {
2104 id_table: firestream_pci_tbl,
2105 probe: firestream_init_one,
2106 remove: __devexit_p(firestream_remove_one),
2109 static int __init firestream_init_module (void)
2114 error = pci_module_init(&firestream_driver);
2119 static void __exit firestream_cleanup_module(void)
2121 pci_unregister_driver(&firestream_driver);
2124 module_init(firestream_init_module);
2125 module_exit(firestream_cleanup_module);
2127 MODULE_LICENSE("GPL");