2 $Id: fore200e.c,v 1.1.1.1 2005/04/11 02:50:16 jack Exp $
4 A FORE Systems 200E-series driver for ATM on Linux.
5 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2000.
7 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
9 This driver simultaneously supports PCA-200E and SBA-200E adapters
10 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 #include <linux/version.h>
29 #include <linux/config.h>
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/init.h>
33 #include <linux/capability.h>
34 #include <linux/sched.h>
35 #include <linux/interrupt.h>
36 #include <linux/bitops.h>
37 #include <linux/atmdev.h>
38 #include <linux/sonet.h>
39 #include <linux/atm_suni.h>
41 #include <asm/string.h>
42 #include <asm/segment.h>
46 #include <asm/byteorder.h>
47 #include <asm/uaccess.h>
48 #include <asm/atomic.h>
49 #include <linux/pci.h>
51 #ifdef CONFIG_ATM_FORE200E_SBA
52 #include <asm/idprom.h>
54 #include <asm/openprom.h>
55 #include <asm/oplib.h>
56 #include <asm/pgtable.h>
59 #include <linux/module.h>
64 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs used by atmdump-like apps */
65 #define FORE200E_52BYTE_AAL0_SDU
68 #define FORE200E_VERSION "0.2d"
71 #define FORE200E "fore200e: "
73 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
74 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
75 printk(FORE200E format, ##args); } while(0)
77 #define DPRINTK(level, format, args...) while(0)
81 #define FORE200E_ALIGN(addr, alignment) \
82 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
84 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
86 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
88 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo))
91 #define MSECS(ms) (((ms)*HZ/1000)+1)
94 extern const struct atmdev_ops fore200e_ops;
95 extern const struct fore200e_bus fore200e_bus[];
97 static struct fore200e* fore200e_boards = NULL;
101 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
102 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
103 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
107 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
108 { BUFFER_S1_NBR, BUFFER_L1_NBR },
109 { BUFFER_S2_NBR, BUFFER_L2_NBR }
112 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
113 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
114 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
118 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
119 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
123 #if 0 /* currently unused */
125 fore200e_fore2atm_aal(enum fore200e_aal aal)
128 case FORE200E_AAL0: return ATM_AAL0;
129 case FORE200E_AAL34: return ATM_AAL34;
130 case FORE200E_AAL5: return ATM_AAL5;
138 static enum fore200e_aal
139 fore200e_atm2fore_aal(int aal)
142 case ATM_AAL0: return FORE200E_AAL0;
143 case ATM_AAL34: return FORE200E_AAL34;
146 case ATM_AAL5: return FORE200E_AAL5;
154 fore200e_irq_itoa(int irq)
156 #if defined(__sparc_v9__)
157 return __irq_itoa(irq);
160 sprintf(str, "%d", irq);
167 fore200e_kmalloc(int size, int flags)
169 void* chunk = kmalloc(size, flags);
172 memset(chunk, 0x00, size);
174 printk(FORE200E "kmalloc() failed, requested size = %d, flags = 0x%x\n", size, flags);
181 fore200e_kfree(void* chunk)
187 /* allocate and align a chunk of memory intended to hold the data behing exchanged
188 between the driver and the adapter (using streaming DVMA) */
191 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
193 unsigned long offset = 0;
195 if (alignment <= sizeof(int))
198 chunk->alloc_size = size + alignment;
199 chunk->align_size = size;
200 chunk->direction = direction;
202 chunk->alloc_addr = fore200e_kmalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
203 if (chunk->alloc_addr == NULL)
207 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
209 chunk->align_addr = chunk->alloc_addr + offset;
211 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
217 /* free a chunk of memory */
220 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
222 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
224 fore200e_kfree(chunk->alloc_addr);
229 #if 0 /* currently unused */
231 fore200e_checkup(struct fore200e* fore200e)
235 hb1 = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
237 hb2 = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
240 printk(FORE200E "device %s heartbeat is not counting upwards, hb1 = %x; hb2 = %x\n",
241 fore200e->name, hb1, hb2);
244 printk(FORE200E "device %s heartbeat is ok\n", fore200e->name);
252 fore200e_spin(int msecs)
254 unsigned long timeout = jiffies + MSECS(msecs);
255 while (time_before(jiffies, timeout));
260 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
262 unsigned long timeout = jiffies + MSECS(msecs);
267 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
270 } while (time_before(jiffies, timeout));
274 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
284 fore200e_io_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
286 unsigned long timeout = jiffies + MSECS(msecs);
290 if ((ok = (fore200e->bus->read(addr) == val)))
293 } while (time_before(jiffies, timeout));
297 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
298 fore200e->bus->read(addr), val);
307 fore200e_free_rx_buf(struct fore200e* fore200e)
309 int scheme, magn, nbr;
310 struct buffer* buffer;
312 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
313 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
315 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
317 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
319 struct chunk* data = &buffer[ nbr ].data;
321 if (data->alloc_addr != NULL)
322 fore200e_chunk_free(fore200e, data);
331 fore200e_uninit_bs_queue(struct fore200e* fore200e)
335 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
336 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
338 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
339 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
341 if (status->alloc_addr)
342 fore200e->bus->dma_chunk_free(fore200e, status);
344 if (rbd_block->alloc_addr)
345 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
352 fore200e_reset(struct fore200e* fore200e, int diag)
356 fore200e->cp_monitor = (struct cp_monitor*)(fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET);
358 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
360 fore200e->bus->reset(fore200e);
363 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
366 printk(FORE200E "device %s self-test failed\n", fore200e->name);
370 printk(FORE200E "device %s self-test passed\n", fore200e->name);
372 fore200e->state = FORE200E_STATE_RESET;
380 fore200e_shutdown(struct fore200e* fore200e)
382 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
383 fore200e->name, fore200e->phys_base,
384 fore200e_irq_itoa(fore200e->irq));
386 if (fore200e->state > FORE200E_STATE_RESET) {
387 /* first, reset the board to prevent further interrupts or data transfers */
388 fore200e_reset(fore200e, 0);
391 /* then, release all allocated resources */
392 switch(fore200e->state) {
394 case FORE200E_STATE_COMPLETE:
396 kfree(fore200e->stats);
398 case FORE200E_STATE_IRQ:
399 free_irq(fore200e->irq, fore200e->atm_dev);
401 case FORE200E_STATE_ALLOC_BUF:
402 fore200e_free_rx_buf(fore200e);
404 case FORE200E_STATE_INIT_BSQ:
405 fore200e_uninit_bs_queue(fore200e);
407 case FORE200E_STATE_INIT_RXQ:
408 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
409 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
411 case FORE200E_STATE_INIT_TXQ:
412 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
413 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
415 case FORE200E_STATE_INIT_CMDQ:
416 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
418 case FORE200E_STATE_INITIALIZE:
419 /* nothing to do for that state */
421 case FORE200E_STATE_START_FW:
422 /* nothing to do for that state */
424 case FORE200E_STATE_LOAD_FW:
425 /* nothing to do for that state */
427 case FORE200E_STATE_RESET:
428 /* nothing to do for that state */
430 case FORE200E_STATE_MAP:
431 fore200e->bus->unmap(fore200e);
433 case FORE200E_STATE_CONFIGURE:
434 /* nothing to do for that state */
436 case FORE200E_STATE_REGISTER:
437 /* XXX shouldn't we *start* by deregistering the device? */
438 atm_dev_deregister(fore200e->atm_dev);
440 case FORE200E_STATE_BLANK:
441 /* nothing to do for that state */
448 #ifdef CONFIG_ATM_FORE200E_PCA
450 static u32 fore200e_pca_read(volatile u32* addr)
452 /* on big-endian hosts, the board is configured to convert
453 the endianess of slave RAM accesses */
454 return le32_to_cpu(readl(addr));
458 static void fore200e_pca_write(u32 val, volatile u32* addr)
460 /* on big-endian hosts, the board is configured to convert
461 the endianess of slave RAM accesses */
462 writel(cpu_to_le32(val), addr);
467 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
469 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
471 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
472 virt_addr, size, direction, dma_addr);
479 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
481 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
482 dma_addr, size, direction);
484 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
489 fore200e_pca_dma_sync(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
491 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
493 pci_dma_sync_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
497 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
498 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
501 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
502 int size, int nbr, int alignment)
504 #if defined(__sparc_v9__)
505 /* returned chunks are page-aligned */
506 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
510 if (chunk->alloc_addr == NULL || chunk->dma_addr == 0)
513 chunk->align_addr = chunk->alloc_addr;
515 if (fore200e_chunk_alloc(fore200e, chunk, size * nbr, alignment, FORE200E_DMA_BIDIRECTIONAL) < 0)
523 /* free a DMA consistent chunk of memory */
526 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
528 #if defined(__sparc_v9__)
529 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
534 fore200e_chunk_free(fore200e, chunk);
540 fore200e_pca_irq_check(struct fore200e* fore200e)
542 /* this is a 1 bit register */
543 return readl(fore200e->regs.pca.psr);
548 fore200e_pca_irq_ack(struct fore200e* fore200e)
550 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
555 fore200e_pca_reset(struct fore200e* fore200e)
557 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
559 writel(0, fore200e->regs.pca.hcr);
564 fore200e_pca_map(struct fore200e* fore200e)
566 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
568 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
570 if (fore200e->virt_base == NULL) {
571 printk(FORE200E "can't map device %s\n", fore200e->name);
575 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
577 /* gain access to the PCA-200E specific registers */
578 fore200e->regs.pca.hcr = (u32*)(fore200e->virt_base + PCA200E_HCR_OFFSET);
579 fore200e->regs.pca.imr = (u32*)(fore200e->virt_base + PCA200E_IMR_OFFSET);
580 fore200e->regs.pca.psr = (u32*)(fore200e->virt_base + PCA200E_PSR_OFFSET);
582 fore200e->state = FORE200E_STATE_MAP;
588 fore200e_pca_unmap(struct fore200e* fore200e)
590 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
592 /* XXX iounmap() does nothing on PowerPC (at least in 2.2.12 and 2.3.41),
593 this leads to a kernel panic if the module is loaded and unloaded several times */
594 if (fore200e->virt_base != NULL)
595 iounmap(fore200e->virt_base);
600 fore200e_pca_configure(struct fore200e* fore200e)
602 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
605 DPRINTK(2, "device %s being configured\n", fore200e->name);
607 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
608 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
612 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
614 master_ctrl = master_ctrl
616 | PCA200E_CTRL_DIS_CACHE_RD
617 | PCA200E_CTRL_DIS_WRT_INVAL
619 #if defined(__BIG_ENDIAN)
620 /* request the PCA board to convert the endianess of slave RAM accesses */
621 | PCA200E_CTRL_CONVERT_ENDIAN
623 | PCA200E_CTRL_LARGE_PCI_BURSTS;
625 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
627 fore200e->state = FORE200E_STATE_CONFIGURE;
632 static struct fore200e* __init
633 fore200e_pca_detect(const struct fore200e_bus* bus, int index)
635 struct fore200e* fore200e;
636 struct pci_dev* pci_dev = NULL;
639 if (pci_present() == 0) {
640 printk(FORE200E "no PCI subsystem\n");
645 pci_dev = pci_find_device(PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, pci_dev);
650 if (pci_enable_device(pci_dev))
653 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
654 if (fore200e == NULL)
658 fore200e->bus_dev = pci_dev;
659 fore200e->irq = pci_dev->irq;
660 fore200e->phys_base = pci_resource_start (pci_dev, 0);
662 #if defined(__powerpc__)
663 fore200e->phys_base += KERNELBASE;
666 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
668 pci_set_master(pci_dev);
675 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
677 struct host_cmdq* cmdq = &fore200e->host_cmdq;
678 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
679 struct prom_opcode opcode;
683 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
685 opcode.opcode = OPCODE_GET_PROM;
688 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
690 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
692 *entry->status = STATUS_PENDING;
694 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.prom_block.opcode);
696 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
698 *entry->status = STATUS_FREE;
700 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
703 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
707 #if defined(__BIG_ENDIAN)
709 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
711 /* MAC address is stored as little-endian */
712 swap_here(&prom->mac_addr[0]);
713 swap_here(&prom->mac_addr[4]);
721 fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
723 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
725 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
726 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
729 #endif /* CONFIG_ATM_FORE200E_PCA */
734 #ifdef CONFIG_ATM_FORE200E_SBA
737 fore200e_sba_read(volatile u32* addr)
739 return sbus_readl(addr);
744 fore200e_sba_write(u32 val, volatile u32* addr)
746 sbus_writel(val, addr);
751 fore200e_sba_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
753 u32 dma_addr = sbus_map_single((struct sbus_dev*)fore200e->bus_dev, virt_addr, size, direction);
755 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
756 virt_addr, size, direction, dma_addr);
763 fore200e_sba_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
765 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
766 dma_addr, size, direction);
768 sbus_unmap_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
773 fore200e_sba_dma_sync(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
775 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
777 sbus_dma_sync_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction);
781 /* allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
782 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
785 fore200e_sba_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
786 int size, int nbr, int alignment)
788 chunk->alloc_size = chunk->align_size = size * nbr;
790 /* returned chunks are page-aligned */
791 chunk->alloc_addr = sbus_alloc_consistent((struct sbus_dev*)fore200e->bus_dev,
795 if (chunk->alloc_addr == NULL || chunk->dma_addr == 0)
798 chunk->align_addr = chunk->alloc_addr;
804 /* free a DVMA consistent chunk of memory */
807 fore200e_sba_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
809 sbus_free_consistent((struct sbus_dev*)fore200e->bus_dev,
817 fore200e_sba_irq_enable(struct fore200e* fore200e)
819 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
820 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
825 fore200e_sba_irq_check(struct fore200e* fore200e)
827 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
832 fore200e_sba_irq_ack(struct fore200e* fore200e)
834 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
835 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
840 fore200e_sba_reset(struct fore200e* fore200e)
842 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
844 fore200e->bus->write(0, fore200e->regs.sba.hcr);
849 fore200e_sba_map(struct fore200e* fore200e)
851 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
854 /* gain access to the SBA-200E specific registers */
856 fore200e->regs.sba.hcr = (u32*)sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
857 fore200e->regs.sba.bsr = (u32*)sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
858 fore200e->regs.sba.isr = (u32*)sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
859 fore200e->virt_base = (u32*)sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
861 if (fore200e->virt_base == NULL) {
862 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
866 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
868 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
870 /* get the supported DVMA burst sizes */
871 bursts = prom_getintdefault(sbus_dev->bus->prom_node, "burst-sizes", 0x00);
873 if (sbus_can_dma_64bit(sbus_dev))
874 sbus_set_sbus64(sbus_dev, bursts);
877 if (bursts & DMA_BURST16)
878 fore200e->bus->write(SBA200E_BSR_BURST16, fore200e->regs.sba.bsr);
880 if (bursts & DMA_BURST8)
881 fore200e->bus->write(SBA200E_BSR_BURST8, fore200e->regs.sba.bsr);
883 if (bursts & DMA_BURST4)
884 fore200e->bus->write(SBA200E_BSR_BURST4, fore200e->regs.sba.bsr);
887 fore200e->state = FORE200E_STATE_MAP;
893 fore200e_sba_unmap(struct fore200e* fore200e)
895 sbus_iounmap((ulong)fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
896 sbus_iounmap((ulong)fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
897 sbus_iounmap((ulong)fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
898 sbus_iounmap((ulong)fore200e->virt_base, SBA200E_RAM_LENGTH);
903 fore200e_sba_configure(struct fore200e* fore200e)
905 fore200e->state = FORE200E_STATE_CONFIGURE;
910 static struct fore200e* __init
911 fore200e_sba_detect(const struct fore200e_bus* bus, int index)
913 struct fore200e* fore200e;
914 struct sbus_bus* sbus_bus;
915 struct sbus_dev* sbus_dev = NULL;
917 unsigned int count = 0;
919 for_each_sbus (sbus_bus) {
920 for_each_sbusdev (sbus_dev, sbus_bus) {
921 if (strcmp(sbus_dev->prom_name, SBA200E_PROM_NAME) == 0) {
932 if (sbus_dev->num_registers != 4) {
933 printk(FORE200E "this %s device has %d instead of 4 registers\n",
934 bus->model_name, sbus_dev->num_registers);
939 fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL);
940 if (fore200e == NULL)
944 fore200e->bus_dev = sbus_dev;
945 fore200e->irq = sbus_dev->irqs[ 0 ];
947 fore200e->phys_base = (unsigned long)sbus_dev;
949 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
956 fore200e_sba_prom_read(struct fore200e* fore200e, struct prom_data* prom)
958 struct sbus_dev* sbus_dev = (struct sbus_dev*) fore200e->bus_dev;
961 len = prom_getproperty(sbus_dev->prom_node, "macaddrlo2", &prom->mac_addr[ 4 ], 4);
965 len = prom_getproperty(sbus_dev->prom_node, "macaddrhi4", &prom->mac_addr[ 2 ], 4);
969 prom_getproperty(sbus_dev->prom_node, "serialnumber",
970 (char*)&prom->serial_number, sizeof(prom->serial_number));
972 prom_getproperty(sbus_dev->prom_node, "promversion",
973 (char*)&prom->hw_revision, sizeof(prom->hw_revision));
980 fore200e_sba_proc_read(struct fore200e* fore200e, char *page)
982 struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev;
984 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", sbus_dev->slot, sbus_dev->prom_name);
986 #endif /* CONFIG_ATM_FORE200E_SBA */
990 fore200e_irq_tx(struct fore200e* fore200e)
992 struct host_txq_entry* entry;
995 entry = fore200e->host_txq.host_entry;
997 for (i = 0; i < QUEUE_SIZE_TX; i++) {
999 if (*entry->status & STATUS_COMPLETE) {
1001 DPRINTK(3, "TX COMPLETED: entry = %p, vcc = %p, skb = %p\n", entry, entry->vcc, entry->skb);
1003 /* free copy of misaligned data */
1007 /* remove DMA mapping */
1008 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
1009 FORE200E_DMA_TODEVICE);
1011 /* notify tx completion */
1012 if (entry->vcc->pop)
1013 entry->vcc->pop(entry->vcc, entry->skb);
1015 dev_kfree_skb_irq(entry->skb);
1017 /* check error condition */
1018 if (*entry->status & STATUS_ERROR)
1019 atomic_inc(&entry->vcc->stats->tx_err);
1021 atomic_inc(&entry->vcc->stats->tx);
1023 *entry->status = STATUS_FREE;
1025 fore200e->host_txq.txing--;
1033 fore200e_supply(struct fore200e* fore200e)
1035 int scheme, magn, i;
1037 struct host_bsq* bsq;
1038 struct host_bsq_entry* entry;
1039 struct buffer* buffer;
1041 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1042 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1044 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1046 if (fore200e_rx_buf_nbr[ scheme ][ magn ] - bsq->count > RBD_BLK_SIZE) {
1048 DPRINTK(2, "supplying rx buffers to queue %d / %d, count = %d\n",
1049 scheme, magn, bsq->count);
1051 entry = &bsq->host_entry[ bsq->head ];
1053 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1055 for (i = 0; i < RBD_BLK_SIZE; i++) {
1057 buffer = &bsq->buffer[ bsq->free ];
1059 FORE200E_NEXT_ENTRY(bsq->free, fore200e_rx_buf_nbr[ scheme ][ magn ]);
1061 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1062 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1065 /* increase the number of supplied rx buffers */
1066 bsq->count += RBD_BLK_SIZE;
1068 *entry->status = STATUS_PENDING;
1069 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1077 static struct atm_vcc*
1078 fore200e_find_vcc(struct fore200e* fore200e, struct rpd* rpd)
1080 struct atm_vcc* vcc;
1082 for (vcc = fore200e->atm_dev->vccs; vcc; vcc = vcc->next) {
1084 if (vcc->vpi == rpd->atm_header.vpi && vcc->vci == rpd->atm_header.vci)
1093 fore200e_push_rpd(struct fore200e* fore200e, struct rpd* rpd)
1095 struct atm_vcc* vcc;
1096 struct sk_buff* skb;
1097 struct buffer* buffer;
1098 struct fore200e_vcc* fore200e_vcc;
1100 #ifdef FORE200E_52BYTE_AAL0_SDU
1101 u32 cell_header = 0;
1104 vcc = fore200e_find_vcc(fore200e, rpd);
1107 printk(FORE200E "no vcc found for PDU received on %d.%d.%d\n",
1108 fore200e->atm_dev->number, rpd->atm_header.vpi, rpd->atm_header.vci);
1112 fore200e_vcc = FORE200E_VCC(vcc);
1114 #ifdef FORE200E_52BYTE_AAL0_SDU
1115 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1117 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1118 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1119 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1120 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1121 rpd->atm_header.clp;
1126 /* compute total PDU length */
1127 for (i = 0; i < rpd->nseg; i++)
1128 pdu_len += rpd->rsd[ i ].length;
1130 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1133 printk(FORE200E "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1134 atomic_inc(&vcc->stats->rx_drop);
1138 skb->stamp = vcc->timestamp = xtime;
1140 #ifdef FORE200E_52BYTE_AAL0_SDU
1142 *((u32*)skb_put(skb, 4)) = cell_header;
1146 /* reassemble segments */
1147 for (i = 0; i < rpd->nseg; i++) {
1149 /* rebuild rx buffer address from rsd handle */
1150 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1152 /* ensure DMA synchronisation */
1153 fore200e->bus->dma_sync(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, FORE200E_DMA_FROMDEVICE);
1155 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1158 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1160 if (pdu_len < fore200e_vcc->rx_min_pdu)
1161 fore200e_vcc->rx_min_pdu = pdu_len;
1162 if (pdu_len > fore200e_vcc->rx_max_pdu)
1163 fore200e_vcc->rx_max_pdu = pdu_len;
1166 if (atm_charge(vcc, skb->truesize) == 0) {
1168 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1169 vcc->itf, vcc->vpi, vcc->vci);
1171 dev_kfree_skb_irq(skb);
1175 vcc->push(vcc, skb);
1176 atomic_inc(&vcc->stats->rx);
1181 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1183 struct buffer* buffer;
1186 for (i = 0; i < rpd->nseg; i++) {
1188 /* rebuild rx buffer address from rsd handle */
1189 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1191 /* decrease the number of supplied rx buffers */
1192 fore200e->host_bsq[ buffer->scheme ][ buffer->magn ].count--;
1198 fore200e_irq_rx(struct fore200e* fore200e)
1200 struct host_rxq* rxq = &fore200e->host_rxq;
1201 struct host_rxq_entry* entry;
1205 entry = &rxq->host_entry[ rxq->head ];
1207 /* no more received PDUs */
1208 if ((*entry->status & STATUS_COMPLETE) == 0)
1211 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1213 if ((*entry->status & STATUS_ERROR) == 0) {
1215 fore200e_push_rpd(fore200e, entry->rpd);
1218 printk(FORE200E "damaged PDU on %d.%d.%d\n",
1219 fore200e->atm_dev->number, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1222 fore200e_collect_rpd(fore200e, entry->rpd);
1224 fore200e_supply(fore200e);
1226 /* rewrite the rpd address to ack the received PDU */
1227 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1228 *entry->status = STATUS_FREE;
1234 fore200e_interrupt(int irq, void* dev, struct pt_regs* regs)
1236 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1238 if (fore200e->bus->irq_check(fore200e) == 0) {
1240 DPRINTK(3, "unexpected interrupt on device %c\n", fore200e->name[9]);
1243 DPRINTK(3, "valid interrupt on device %c\n", fore200e->name[9]);
1245 tasklet_schedule(&fore200e->tasklet);
1247 fore200e->bus->irq_ack(fore200e);
1252 fore200e_tasklet(unsigned long data)
1254 struct fore200e* fore200e = (struct fore200e*) data;
1256 fore200e_irq_rx(fore200e);
1258 if (fore200e->host_txq.txing)
1259 fore200e_irq_tx(fore200e);
1265 fore200e_select_scheme(struct atm_vcc* vcc)
1270 /* fairly balance VCs over (identical) buffer schemes */
1271 scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1273 /* bit 7 of VPI magically selects the second buffer scheme */
1274 if (vcc->vpi & (1<<7)) {
1275 vcc->vpi &= ((1<<7) - 1); /* reset the magic bit */
1276 scheme = BUFFER_SCHEME_TWO;
1279 scheme = BUFFER_SCHEME_ONE;
1283 DPRINTK(1, "vpvc %d.%d.%d uses the %s buffer scheme\n",
1284 vcc->itf, vcc->vpi, vcc->vci, scheme == BUFFER_SCHEME_ONE ? "first" : "second");
1292 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1294 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1295 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1296 struct activate_opcode activ_opcode;
1297 struct deactivate_opcode deactiv_opcode;
1300 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1302 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1305 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1307 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1308 activ_opcode.aal = aal;
1309 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1310 activ_opcode.pad = 0;
1313 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1314 deactiv_opcode.pad = 0;
1317 vpvc.vci = vcc->vci;
1318 vpvc.vpi = vcc->vpi;
1320 *entry->status = STATUS_PENDING;
1324 #ifdef FORE200E_52BYTE_AAL0_SDU
1327 /* the MTU is unused by the cp, except in the case of AAL0 */
1328 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1329 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.activate_block.vpvc);
1330 fore200e->bus->write(*(u32*)&activ_opcode, (u32*)&entry->cp_entry->cmd.activate_block.opcode);
1333 fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.deactivate_block.vpvc);
1334 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32*)&entry->cp_entry->cmd.deactivate_block.opcode);
1337 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1339 *entry->status = STATUS_FREE;
1342 printk(FORE200E "unable to %s vpvc %d.%d on device %s\n",
1343 activate ? "open" : "close", vcc->vpi, vcc->vci, fore200e->name);
1347 DPRINTK(1, "vpvc %d.%d %sed on device %s\n", vcc->vpi, vcc->vci,
1348 activate ? "open" : "clos", fore200e->name);
1355 fore200e_walk_vccs(struct atm_vcc *vcc, short *vpi, int *vci)
1357 struct atm_vcc* walk;
1359 /* find a free VPI */
1360 if (*vpi == ATM_VPI_ANY) {
1362 for (*vpi = 0, walk = vcc->dev->vccs; walk; walk = walk->next) {
1364 if ((walk->vci == *vci) && (walk->vpi == *vpi)) {
1366 walk = vcc->dev->vccs;
1371 /* find a free VCI */
1372 if (*vci == ATM_VCI_ANY) {
1374 for (*vci = ATM_NOT_RSV_VCI, walk = vcc->dev->vccs; walk; walk = walk->next) {
1376 if ((walk->vpi = *vpi) && (walk->vci == *vci)) {
1377 *vci = walk->vci + 1;
1378 walk = vcc->dev->vccs;
1387 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1390 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1392 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1394 /* compute the data cells to idle cells ratio from the PCR */
1395 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1396 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1399 /* disable rate control */
1400 rate->data_cells = rate->idle_cells = 0;
1406 fore200e_open(struct atm_vcc *vcc, short vpi, int vci)
1408 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1409 struct fore200e_vcc* fore200e_vcc;
1411 /* find a free VPI/VCI */
1412 fore200e_walk_vccs(vcc, &vpi, &vci);
1417 /* ressource checking only? */
1418 if (vci == ATM_VCI_UNSPEC || vpi == ATM_VPI_UNSPEC)
1421 set_bit(ATM_VF_ADDR, &vcc->flags);
1422 vcc->itf = vcc->dev->number;
1424 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1425 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1426 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1427 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1428 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1429 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1430 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1432 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1434 down(&fore200e->rate_sf);
1435 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1436 up(&fore200e->rate_sf);
1439 /* reserving the pseudo-CBR bandwidth at this point grants us
1440 to reduce the length of the critical section protected
1441 by 'rate_sf'. in counterpart, we have to reset the available
1442 bandwidth if we later encounter an error */
1444 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1445 up(&fore200e->rate_sf);
1448 fore200e_vcc = fore200e_kmalloc(sizeof(struct fore200e_vcc), GFP_KERNEL);
1449 if (fore200e_vcc == NULL) {
1450 down(&fore200e->rate_sf);
1451 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1452 up(&fore200e->rate_sf);
1456 FORE200E_VCC(vcc) = fore200e_vcc;
1458 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1459 kfree(fore200e_vcc);
1460 down(&fore200e->rate_sf);
1461 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1462 up(&fore200e->rate_sf);
1466 /* compute rate control parameters */
1467 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1469 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1471 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1472 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1473 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1474 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1477 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = 65536;
1478 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1480 set_bit(ATM_VF_READY, &vcc->flags);
1487 fore200e_close(struct atm_vcc* vcc)
1489 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1491 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1493 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1495 kfree(FORE200E_VCC(vcc));
1497 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1498 down(&fore200e->rate_sf);
1499 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1500 up(&fore200e->rate_sf);
1503 clear_bit(ATM_VF_READY, &vcc->flags);
1508 #define FORE200E_SYNC_SEND /* wait tx completion before returning */
1513 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1515 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1516 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1517 struct host_txq* txq = &fore200e->host_txq;
1518 struct host_txq_entry* entry;
1520 struct tpd_haddr tpd_haddr;
1521 //unsigned long flags;
1522 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1524 int tx_len = skb->len;
1525 u32* cell_header = NULL;
1526 unsigned char* skb_data;
1529 #ifdef FORE200E_52BYTE_AAL0_SDU
1530 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1531 cell_header = (u32*) skb->data;
1532 skb_data = skb->data + 4; /* skip 4-byte cell header */
1533 skb_len = tx_len = skb->len - 4;
1535 DPRINTK(3, "skipping user-supplied cell header 0x%08x", *cell_header);
1540 skb_data = skb->data;
1546 tasklet_disable(&fore200e->tasklet);
1548 entry = &txq->host_entry[ txq->head ];
1550 if (*entry->status != STATUS_FREE) {
1552 /* try to free completed tx queue entries */
1553 fore200e_irq_tx(fore200e);
1555 if (*entry->status != STATUS_FREE) {
1557 tasklet_enable(&fore200e->tasklet);
1559 /* retry once again? */
1563 atomic_inc(&vcc->stats->tx_err);
1565 printk(FORE200E "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1566 fore200e->name, fore200e->cp_queues->heartbeat);
1577 if (((unsigned long)skb_data) & 0x3) {
1579 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1584 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1586 /* this simply NUKES the PCA-200E board */
1587 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1589 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1594 entry->data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1595 if (entry->data == NULL) {
1597 tasklet_enable(&fore200e->tasklet);
1605 memcpy(entry->data, skb_data, skb_len);
1606 if (skb_len < tx_len)
1607 memset(entry->data + skb_len, 0x00, tx_len - skb_len);
1609 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, entry->data, tx_len, FORE200E_DMA_TODEVICE);
1613 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, skb_data, tx_len, FORE200E_DMA_TODEVICE);
1616 tpd->tsd[ 0 ].length = tx_len;
1618 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1621 tasklet_enable(&fore200e->tasklet);
1623 /* ensure DMA synchronisation */
1624 fore200e->bus->dma_sync(fore200e, tpd->tsd[ 0 ].buffer, tpd->tsd[ 0 ].length, FORE200E_DMA_TODEVICE);
1626 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1627 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1628 tpd->tsd[0].length, skb_len);
1630 if (skb_len < fore200e_vcc->tx_min_pdu)
1631 fore200e_vcc->tx_min_pdu = skb_len;
1632 if (skb_len > fore200e_vcc->tx_max_pdu)
1633 fore200e_vcc->tx_max_pdu = skb_len;
1638 /* set tx rate control information */
1639 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1640 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1643 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1644 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1645 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1646 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1647 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1650 /* set the ATM header, common to all cells conveying the PDU */
1651 tpd->atm_header.clp = 0;
1652 tpd->atm_header.plt = 0;
1653 tpd->atm_header.vci = vcc->vci;
1654 tpd->atm_header.vpi = vcc->vpi;
1655 tpd->atm_header.gfc = 0;
1658 tpd->spec.length = tx_len;
1660 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1661 #ifdef FORE200E_SYNC_SEND
1667 tpd_haddr.size = sizeof(struct tpd) / 32; /* size is expressed in 32 byte blocks */
1669 tpd_haddr.haddr = entry->tpd_dma >> 5; /* shift the address, as we are in a bitfield */
1671 *entry->status = STATUS_PENDING;
1672 fore200e->bus->write(*(u32*)&tpd_haddr, (u32*)&entry->cp_entry->tpd_haddr);
1675 #ifdef FORE200E_SYNC_SEND
1677 int ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 10);
1679 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
1680 FORE200E_DMA_TODEVICE);
1682 /* free tmp copy of misaligned data */
1686 /* notify tx completion */
1693 printk(FORE200E "synchronous tx on %d:%d:%d failed\n", vcc->itf, vcc->vpi, vcc->vci);
1695 atomic_inc(&entry->vcc->stats->tx_err);
1698 atomic_inc(&entry->vcc->stats->tx);
1700 DPRINTK(3, "synchronous tx on %d:%d:%d succeeded\n", vcc->itf, vcc->vpi, vcc->vci);
1710 fore200e_getstats(struct fore200e* fore200e)
1712 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1713 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1714 struct stats_opcode opcode;
1718 if (fore200e->stats == NULL) {
1719 fore200e->stats = fore200e_kmalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1720 if (fore200e->stats == NULL)
1724 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1726 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1728 opcode.opcode = OPCODE_GET_STATS;
1731 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1733 *entry->status = STATUS_PENDING;
1735 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.stats_block.opcode);
1737 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1739 *entry->status = STATUS_FREE;
1741 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
1744 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1753 fore200e_getsockopt (struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1755 // struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1757 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1758 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1765 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
1767 // struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1769 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1770 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1776 #if 0 /* currently unused */
1778 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1780 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1781 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1782 struct oc3_opcode opcode;
1784 u32 oc3_regs_dma_addr;
1786 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1788 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1790 opcode.opcode = OPCODE_GET_OC3;
1795 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1797 *entry->status = STATUS_PENDING;
1799 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1801 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1803 *entry->status = STATUS_FREE;
1805 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
1808 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1818 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1820 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1821 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1822 struct oc3_opcode opcode;
1825 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1827 opcode.opcode = OPCODE_SET_OC3;
1829 opcode.value = value;
1832 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1834 *entry->status = STATUS_PENDING;
1836 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1838 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1840 *entry->status = STATUS_FREE;
1843 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1852 fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1854 u32 mct_value, mct_mask;
1857 if (!capable(CAP_NET_ADMIN))
1860 switch (loop_mode) {
1864 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1867 case ATM_LM_LOC_PHY:
1868 mct_value = mct_mask = SUNI_MCT_DLE;
1871 case ATM_LM_RMT_PHY:
1872 mct_value = mct_mask = SUNI_MCT_LLE;
1879 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1881 fore200e->loop_mode = loop_mode;
1887 static inline unsigned int
1888 fore200e_swap(unsigned int in)
1890 #if defined(__LITTLE_ENDIAN)
1899 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats* arg)
1901 struct sonet_stats tmp;
1903 if (fore200e_getstats(fore200e) < 0)
1906 tmp.section_bip = fore200e_swap(fore200e->stats->oc3.section_bip8_errors);
1907 tmp.line_bip = fore200e_swap(fore200e->stats->oc3.line_bip24_errors);
1908 tmp.path_bip = fore200e_swap(fore200e->stats->oc3.path_bip8_errors);
1909 tmp.line_febe = fore200e_swap(fore200e->stats->oc3.line_febe_errors);
1910 tmp.path_febe = fore200e_swap(fore200e->stats->oc3.path_febe_errors);
1911 tmp.corr_hcs = fore200e_swap(fore200e->stats->oc3.corr_hcs_errors);
1912 tmp.uncorr_hcs = fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors);
1913 tmp.tx_cells = fore200e_swap(fore200e->stats->aal0.cells_transmitted) +
1914 fore200e_swap(fore200e->stats->aal34.cells_transmitted) +
1915 fore200e_swap(fore200e->stats->aal5.cells_transmitted);
1916 tmp.rx_cells = fore200e_swap(fore200e->stats->aal0.cells_received) +
1917 fore200e_swap(fore200e->stats->aal34.cells_received) +
1918 fore200e_swap(fore200e->stats->aal5.cells_received);
1921 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1928 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void* arg)
1930 struct fore200e* fore200e = FORE200E_DEV(dev);
1932 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1937 return fore200e_fetch_stats(fore200e, (struct sonet_stats*)arg);
1940 return put_user(0, (int*)arg) ? -EFAULT : 0;
1943 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1946 return put_user(fore200e->loop_mode, (int*)arg) ? -EFAULT : 0;
1949 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int*)arg) ? -EFAULT : 0;
1952 return -ENOSYS; /* not implemented */
1957 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1959 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1960 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1962 DPRINTK(2, "change_qos %d.%d.%d, "
1963 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1964 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1965 "available_cell_rate = %u",
1966 vcc->itf, vcc->vpi, vcc->vci,
1967 fore200e_traffic_class[ qos->txtp.traffic_class ],
1968 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1969 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1970 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
1971 flags, fore200e->available_cell_rate);
1973 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
1975 down(&fore200e->rate_sf);
1976 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
1977 up(&fore200e->rate_sf);
1981 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1982 fore200e->available_cell_rate -= qos->txtp.max_pcr;
1983 up(&fore200e->rate_sf);
1985 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
1987 /* update rate control parameters */
1988 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
1990 set_bit(ATM_VF_HASQOS, &vcc->flags);
1999 fore200e_irq_request(struct fore200e* fore200e)
2001 if (request_irq(fore200e->irq, fore200e_interrupt, SA_SHIRQ, fore200e->name, fore200e->atm_dev) < 0) {
2003 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2004 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2008 printk(FORE200E "IRQ %s reserved for device %s\n",
2009 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2011 tasklet_init(&fore200e->tasklet, fore200e_tasklet, (unsigned long)fore200e);
2013 fore200e->state = FORE200E_STATE_IRQ;
2019 fore200e_get_esi(struct fore200e* fore200e)
2021 struct prom_data* prom = fore200e_kmalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2026 ok = fore200e->bus->prom_read(fore200e, prom);
2028 fore200e_kfree(prom);
2032 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %02x:%02x:%02x:%02x:%02x:%02x\n",
2034 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
2035 prom->serial_number & 0xFFFF,
2036 prom->mac_addr[ 2 ], prom->mac_addr[ 3 ], prom->mac_addr[ 4 ],
2037 prom->mac_addr[ 5 ], prom->mac_addr[ 6 ], prom->mac_addr[ 7 ]);
2039 for (i = 0; i < ESI_LEN; i++) {
2040 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2043 fore200e_kfree(prom);
2050 fore200e_alloc_rx_buf(struct fore200e* fore200e)
2052 int scheme, magn, nbr, size, i;
2054 struct host_bsq* bsq;
2055 struct buffer* buffer;
2057 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2058 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2060 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2062 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2063 size = fore200e_rx_buf_size[ scheme ][ magn ];
2065 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2067 /* allocate the array of receive buffers */
2068 buffer = bsq->buffer = fore200e_kmalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2073 for (i = 0; i < nbr; i++) {
2075 buffer[ i ].scheme = scheme;
2076 buffer[ i ].magn = magn;
2078 /* allocate the receive buffer body */
2079 if (fore200e_chunk_alloc(fore200e,
2080 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2081 FORE200E_DMA_FROMDEVICE) < 0) {
2084 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2085 fore200e_kfree(buffer);
2090 /* set next free buffer index */
2095 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2101 fore200e_init_bs_queue(struct fore200e* fore200e)
2103 int scheme, magn, i;
2105 struct host_bsq* bsq;
2106 struct cp_bsq_entry* cp_entry;
2108 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2109 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2111 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2113 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2115 /* allocate and align the array of status words */
2116 if (fore200e->bus->dma_chunk_alloc(fore200e,
2118 sizeof(enum status),
2120 fore200e->bus->status_alignment) < 0) {
2124 /* allocate and align the array of receive buffer descriptors */
2125 if (fore200e->bus->dma_chunk_alloc(fore200e,
2127 sizeof(struct rbd_block),
2129 fore200e->bus->descr_alignment) < 0) {
2131 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2135 /* get the base address of the cp resident buffer supply queue entries */
2136 cp_entry = (struct cp_bsq_entry*)(fore200e->virt_base +
2137 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]));
2139 /* fill the host resident and cp resident buffer supply queue entries */
2140 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2142 bsq->host_entry[ i ].status =
2143 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2144 bsq->host_entry[ i ].rbd_block =
2145 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2146 bsq->host_entry[ i ].rbd_block_dma =
2147 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2148 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2150 *bsq->host_entry[ i ].status = STATUS_FREE;
2152 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2153 &cp_entry[ i ].status_haddr);
2158 fore200e->state = FORE200E_STATE_INIT_BSQ;
2164 fore200e_init_rx_queue(struct fore200e* fore200e)
2166 struct host_rxq* rxq = &fore200e->host_rxq;
2167 struct cp_rxq_entry* cp_entry;
2170 DPRINTK(2, "receive queue is being initialized\n");
2172 /* allocate and align the array of status words */
2173 if (fore200e->bus->dma_chunk_alloc(fore200e,
2175 sizeof(enum status),
2177 fore200e->bus->status_alignment) < 0) {
2181 /* allocate and align the array of receive PDU descriptors */
2182 if (fore200e->bus->dma_chunk_alloc(fore200e,
2186 fore200e->bus->descr_alignment) < 0) {
2188 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2192 /* get the base address of the cp resident rx queue entries */
2193 cp_entry = (struct cp_rxq_entry*)(fore200e->virt_base +
2194 fore200e->bus->read(&fore200e->cp_queues->cp_rxq));
2196 /* fill the host resident and cp resident rx entries */
2197 for (i=0; i < QUEUE_SIZE_RX; i++) {
2199 rxq->host_entry[ i ].status =
2200 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2201 rxq->host_entry[ i ].rpd =
2202 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2203 rxq->host_entry[ i ].rpd_dma =
2204 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2205 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2207 *rxq->host_entry[ i ].status = STATUS_FREE;
2209 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2210 &cp_entry[ i ].status_haddr);
2212 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2213 &cp_entry[ i ].rpd_haddr);
2216 /* set the head entry of the queue */
2219 fore200e->state = FORE200E_STATE_INIT_RXQ;
2225 fore200e_init_tx_queue(struct fore200e* fore200e)
2227 struct host_txq* txq = &fore200e->host_txq;
2228 struct cp_txq_entry* cp_entry;
2231 DPRINTK(2, "transmit queue is being initialized\n");
2233 /* allocate and align the array of status words */
2234 if (fore200e->bus->dma_chunk_alloc(fore200e,
2236 sizeof(enum status),
2238 fore200e->bus->status_alignment) < 0) {
2242 /* allocate and align the array of transmit PDU descriptors */
2243 if (fore200e->bus->dma_chunk_alloc(fore200e,
2247 fore200e->bus->descr_alignment) < 0) {
2249 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2253 /* get the base address of the cp resident tx queue entries */
2254 cp_entry = (struct cp_txq_entry*)(fore200e->virt_base +
2255 fore200e->bus->read(&fore200e->cp_queues->cp_txq));
2257 /* fill the host resident and cp resident tx entries */
2258 for (i=0; i < QUEUE_SIZE_TX; i++) {
2260 txq->host_entry[ i ].status =
2261 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2262 txq->host_entry[ i ].tpd =
2263 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2264 txq->host_entry[ i ].tpd_dma =
2265 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2266 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2268 *txq->host_entry[ i ].status = STATUS_FREE;
2270 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2271 &cp_entry[ i ].status_haddr);
2273 /* although there is a one-to-one mapping of tx queue entries and tpds,
2274 we do not write here the DMA (physical) base address of each tpd into
2275 the related cp resident entry, because the cp relies on this write
2276 operation to detect that a new pdu has been submitted for tx */
2279 /* set the head entry of the queue */
2282 fore200e->state = FORE200E_STATE_INIT_TXQ;
2288 fore200e_init_cmd_queue(struct fore200e* fore200e)
2290 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2291 struct cp_cmdq_entry* cp_entry;
2294 DPRINTK(2, "command queue is being initialized\n");
2296 /* allocate and align the array of status words */
2297 if (fore200e->bus->dma_chunk_alloc(fore200e,
2299 sizeof(enum status),
2301 fore200e->bus->status_alignment) < 0) {
2305 /* get the base address of the cp resident cmd queue entries */
2306 cp_entry = (struct cp_cmdq_entry*)(fore200e->virt_base +
2307 fore200e->bus->read(&fore200e->cp_queues->cp_cmdq));
2309 /* fill the host resident and cp resident cmd entries */
2310 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2312 cmdq->host_entry[ i ].status =
2313 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2314 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2316 *cmdq->host_entry[ i ].status = STATUS_FREE;
2318 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2319 &cp_entry[ i ].status_haddr);
2322 /* set the head entry of the queue */
2325 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2331 fore200e_param_bs_queue(struct fore200e* fore200e,
2332 enum buffer_scheme scheme, enum buffer_magn magn,
2333 int queue_length, int pool_size, int supply_blksize)
2335 struct bs_spec* bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2337 /* dumb value; the firmware doesn't allow us to activate a VC while
2338 selecting a buffer scheme with zero-sized rbd pools */
2343 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2344 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2345 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2346 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2351 fore200e_initialize(struct fore200e* fore200e)
2353 struct cp_queues* cpq;
2354 int ok, scheme, magn;
2356 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2358 init_MUTEX(&fore200e->rate_sf);
2360 cpq = fore200e->cp_queues = (struct cp_queues*) (fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET);
2362 /* enable cp to host interrupts */
2363 fore200e->bus->write(1, &cpq->imask);
2365 if (fore200e->bus->irq_enable)
2366 fore200e->bus->irq_enable(fore200e);
2368 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2370 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2371 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2372 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2374 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2375 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2377 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2378 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2379 fore200e_param_bs_queue(fore200e, scheme, magn,
2381 fore200e_rx_buf_nbr[ scheme ][ magn ],
2384 /* issue the initialize command */
2385 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2386 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2388 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2390 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2394 printk(FORE200E "device %s initialized\n", fore200e->name);
2396 fore200e->state = FORE200E_STATE_INITIALIZE;
2402 fore200e_monitor_putc(struct fore200e* fore200e, char c)
2404 struct cp_monitor* monitor = fore200e->cp_monitor;
2409 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2414 fore200e_monitor_getc(struct fore200e* fore200e)
2416 struct cp_monitor* monitor = fore200e->cp_monitor;
2417 unsigned long timeout = jiffies + MSECS(50);
2420 while (time_before(jiffies, timeout)) {
2422 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2424 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2426 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2428 printk("%c", c & 0xFF);
2439 fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2443 /* the i960 monitor doesn't accept any new character if it has something to say */
2444 while (fore200e_monitor_getc(fore200e) >= 0);
2446 fore200e_monitor_putc(fore200e, *str++);
2449 while (fore200e_monitor_getc(fore200e) >= 0);
2454 fore200e_start_fw(struct fore200e* fore200e)
2458 struct fw_header* fw_header = (struct fw_header*) fore200e->bus->fw_data;
2460 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2462 sprintf(cmd, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2464 fore200e_monitor_puts(fore200e, cmd);
2466 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000);
2468 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2472 printk(FORE200E "device %s firmware started\n", fore200e->name);
2474 fore200e->state = FORE200E_STATE_START_FW;
2480 fore200e_load_fw(struct fore200e* fore200e)
2482 u32* fw_data = (u32*) fore200e->bus->fw_data;
2483 u32 fw_size = (u32) *fore200e->bus->fw_size / sizeof(u32);
2485 struct fw_header* fw_header = (struct fw_header*) fw_data;
2487 u32* load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2489 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2490 fore200e->name, load_addr, fw_size);
2493 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2494 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2499 for (; fw_size--; fw_data++, load_addr++)
2500 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2502 fore200e->state = FORE200E_STATE_LOAD_FW;
2508 fore200e_register(struct fore200e* fore200e)
2510 struct atm_dev* atm_dev;
2512 DPRINTK(2, "device %s being registered\n", fore200e->name);
2514 atm_dev = atm_dev_register(fore200e->bus->proc_name, &fore200e_ops, -1,
2516 if (atm_dev == NULL) {
2517 printk(FORE200E "unable to register device %s\n", fore200e->name);
2521 FORE200E_DEV(atm_dev) = fore200e;
2522 fore200e->atm_dev = atm_dev;
2524 atm_dev->ci_range.vpi_bits = 8;
2525 atm_dev->ci_range.vci_bits = 10;
2527 fore200e->available_cell_rate = ATM_OC3_PCR;
2529 fore200e->state = FORE200E_STATE_REGISTER;
2535 fore200e_init(struct fore200e* fore200e)
2537 if (fore200e_register(fore200e) < 0)
2540 if (fore200e->bus->configure(fore200e) < 0)
2543 if (fore200e->bus->map(fore200e) < 0)
2546 if (fore200e_reset(fore200e, 1) < 0)
2549 if (fore200e_load_fw(fore200e) < 0)
2552 if (fore200e_start_fw(fore200e) < 0)
2555 if (fore200e_initialize(fore200e) < 0)
2558 if (fore200e_init_cmd_queue(fore200e) < 0)
2561 if (fore200e_init_tx_queue(fore200e) < 0)
2564 if (fore200e_init_rx_queue(fore200e) < 0)
2567 if (fore200e_init_bs_queue(fore200e) < 0)
2570 if (fore200e_alloc_rx_buf(fore200e) < 0)
2573 if (fore200e_get_esi(fore200e) < 0)
2576 if (fore200e_irq_request(fore200e) < 0)
2579 fore200e_supply(fore200e);
2581 /* all done, board initialization is now complete */
2582 fore200e->state = FORE200E_STATE_COMPLETE;
2588 fore200e_detect(void)
2590 const struct fore200e_bus* bus;
2591 struct fore200e* fore200e;
2594 printk(FORE200E "FORE Systems 200E-series driver - version " FORE200E_VERSION "\n");
2596 /* for each configured bus interface */
2597 for (link = 0, bus = fore200e_bus; bus->model_name; bus++) {
2599 /* detect all boards present on that bus */
2600 for (index = 0; (fore200e = bus->detect(bus, index)); index++) {
2602 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2603 fore200e->bus->model_name,
2604 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2606 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2608 if (fore200e_init(fore200e) < 0) {
2610 fore200e_shutdown(fore200e);
2616 fore200e->next = fore200e_boards;
2617 fore200e_boards = fore200e;
2627 fore200e_cleanup(struct fore200e** head)
2629 struct fore200e* fore200e = *head;
2631 fore200e_shutdown(fore200e);
2633 *head = fore200e->next;
2641 fore200e_proc_read(struct atm_dev *dev,loff_t* pos,char* page)
2643 struct fore200e* fore200e = FORE200E_DEV(dev);
2644 int len, left = *pos;
2648 if (fore200e_getstats(fore200e) < 0)
2651 len = sprintf(page,"\n"
2653 " internal name:\t\t%s\n", fore200e->name);
2655 /* print bus-specific information */
2656 if (fore200e->bus->proc_read)
2657 len += fore200e->bus->proc_read(fore200e, page + len);
2659 len += sprintf(page + len,
2660 " interrupt line:\t\t%s\n"
2661 " physical base address:\t0x%p\n"
2662 " virtual base address:\t0x%p\n"
2663 " factory address (ESI):\t%02x:%02x:%02x:%02x:%02x:%02x\n"
2664 " board serial number:\t\t%d\n\n",
2665 fore200e_irq_itoa(fore200e->irq),
2666 (void*)fore200e->phys_base,
2667 (void*)fore200e->virt_base,
2668 fore200e->esi[0], fore200e->esi[1], fore200e->esi[2],
2669 fore200e->esi[3], fore200e->esi[4], fore200e->esi[5],
2670 fore200e->esi[4] * 256 + fore200e->esi[5]);
2676 return sprintf(page,
2677 " supplied small bufs (1):\t%d\n"
2678 " supplied large bufs (1):\t%d\n"
2679 " supplied small bufs (2):\t%d\n"
2680 " supplied large bufs (2):\t%d\n",
2681 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].count,
2682 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].count,
2683 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].count,
2684 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].count);
2686 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2688 len = sprintf(page,"\n\n"
2689 " cell processor:\n"
2690 " heartbeat state:\t\t");
2692 if (hb >> 16 != 0xDEAD)
2693 len += sprintf(page + len, "0x%08x\n", hb);
2695 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2701 static const char* media_name[] = {
2702 "unshielded twisted pair",
2703 "multimode optical fiber ST",
2704 "multimode optical fiber SC",
2705 "single-mode optical fiber ST",
2706 "single-mode optical fiber SC",
2710 static const char* oc3_mode[] = {
2712 "diagnostic loopback",
2717 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2718 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2719 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2720 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2723 if (media_index < 0 || media_index > 4)
2726 switch (fore200e->loop_mode) {
2727 case ATM_LM_NONE: oc3_index = 0;
2729 case ATM_LM_LOC_PHY: oc3_index = 1;
2731 case ATM_LM_RMT_PHY: oc3_index = 2;
2733 default: oc3_index = 3;
2736 return sprintf(page,
2737 " firmware release:\t\t%d.%d.%d\n"
2738 " monitor release:\t\t%d.%d\n"
2739 " media type:\t\t\t%s\n"
2740 " OC-3 revision:\t\t0x%x\n"
2741 " OC-3 mode:\t\t\t%s",
2742 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2743 mon960_release >> 16, mon960_release << 16 >> 16,
2744 media_name[ media_index ],
2746 oc3_mode[ oc3_index ]);
2750 struct cp_monitor* cp_monitor = fore200e->cp_monitor;
2752 return sprintf(page,
2755 " version number:\t\t%d\n"
2756 " boot status word:\t\t0x%08x\n",
2757 fore200e->bus->read(&cp_monitor->mon_version),
2758 fore200e->bus->read(&cp_monitor->bstat));
2762 return sprintf(page,
2764 " device statistics:\n"
2766 " crc_header_errors:\t\t%10u\n"
2767 " framing_errors:\t\t%10u\n",
2768 fore200e_swap(fore200e->stats->phy.crc_header_errors),
2769 fore200e_swap(fore200e->stats->phy.framing_errors));
2772 return sprintf(page, "\n"
2774 " section_bip8_errors:\t%10u\n"
2775 " path_bip8_errors:\t\t%10u\n"
2776 " line_bip24_errors:\t\t%10u\n"
2777 " line_febe_errors:\t\t%10u\n"
2778 " path_febe_errors:\t\t%10u\n"
2779 " corr_hcs_errors:\t\t%10u\n"
2780 " ucorr_hcs_errors:\t\t%10u\n",
2781 fore200e_swap(fore200e->stats->oc3.section_bip8_errors),
2782 fore200e_swap(fore200e->stats->oc3.path_bip8_errors),
2783 fore200e_swap(fore200e->stats->oc3.line_bip24_errors),
2784 fore200e_swap(fore200e->stats->oc3.line_febe_errors),
2785 fore200e_swap(fore200e->stats->oc3.path_febe_errors),
2786 fore200e_swap(fore200e->stats->oc3.corr_hcs_errors),
2787 fore200e_swap(fore200e->stats->oc3.ucorr_hcs_errors));
2790 return sprintf(page,"\n"
2791 " ATM:\t\t\t\t cells\n"
2794 " vpi out of range:\t\t%10u\n"
2795 " vpi no conn:\t\t%10u\n"
2796 " vci out of range:\t\t%10u\n"
2797 " vci no conn:\t\t%10u\n",
2798 fore200e_swap(fore200e->stats->atm.cells_transmitted),
2799 fore200e_swap(fore200e->stats->atm.cells_received),
2800 fore200e_swap(fore200e->stats->atm.vpi_bad_range),
2801 fore200e_swap(fore200e->stats->atm.vpi_no_conn),
2802 fore200e_swap(fore200e->stats->atm.vci_bad_range),
2803 fore200e_swap(fore200e->stats->atm.vci_no_conn));
2806 return sprintf(page,"\n"
2807 " AAL0:\t\t\t cells\n"
2810 " dropped:\t\t\t%10u\n",
2811 fore200e_swap(fore200e->stats->aal0.cells_transmitted),
2812 fore200e_swap(fore200e->stats->aal0.cells_received),
2813 fore200e_swap(fore200e->stats->aal0.cells_dropped));
2816 return sprintf(page,"\n"
2818 " SAR sublayer:\t\t cells\n"
2821 " dropped:\t\t\t%10u\n"
2822 " CRC errors:\t\t%10u\n"
2823 " protocol errors:\t\t%10u\n\n"
2824 " CS sublayer:\t\t PDUs\n"
2827 " dropped:\t\t\t%10u\n"
2828 " protocol errors:\t\t%10u\n",
2829 fore200e_swap(fore200e->stats->aal34.cells_transmitted),
2830 fore200e_swap(fore200e->stats->aal34.cells_received),
2831 fore200e_swap(fore200e->stats->aal34.cells_dropped),
2832 fore200e_swap(fore200e->stats->aal34.cells_crc_errors),
2833 fore200e_swap(fore200e->stats->aal34.cells_protocol_errors),
2834 fore200e_swap(fore200e->stats->aal34.cspdus_transmitted),
2835 fore200e_swap(fore200e->stats->aal34.cspdus_received),
2836 fore200e_swap(fore200e->stats->aal34.cspdus_dropped),
2837 fore200e_swap(fore200e->stats->aal34.cspdus_protocol_errors));
2840 return sprintf(page,"\n"
2842 " SAR sublayer:\t\t cells\n"
2845 " dropped:\t\t\t%10u\n"
2846 " congestions:\t\t%10u\n\n"
2847 " CS sublayer:\t\t PDUs\n"
2850 " dropped:\t\t\t%10u\n"
2851 " CRC errors:\t\t%10u\n"
2852 " protocol errors:\t\t%10u\n",
2853 fore200e_swap(fore200e->stats->aal5.cells_transmitted),
2854 fore200e_swap(fore200e->stats->aal5.cells_received),
2855 fore200e_swap(fore200e->stats->aal5.cells_dropped),
2856 fore200e_swap(fore200e->stats->aal5.congestion_experienced),
2857 fore200e_swap(fore200e->stats->aal5.cspdus_transmitted),
2858 fore200e_swap(fore200e->stats->aal5.cspdus_received),
2859 fore200e_swap(fore200e->stats->aal5.cspdus_dropped),
2860 fore200e_swap(fore200e->stats->aal5.cspdus_crc_errors),
2861 fore200e_swap(fore200e->stats->aal5.cspdus_protocol_errors));
2864 return sprintf(page,"\n"
2865 " AUX:\t\t allocation failures\n"
2866 " small b1:\t\t\t%10u\n"
2867 " large b1:\t\t\t%10u\n"
2868 " small b2:\t\t\t%10u\n"
2869 " large b2:\t\t\t%10u\n"
2870 " RX PDUs:\t\t\t%10u\n",
2871 fore200e_swap(fore200e->stats->aux.small_b1_failed),
2872 fore200e_swap(fore200e->stats->aux.large_b1_failed),
2873 fore200e_swap(fore200e->stats->aux.small_b2_failed),
2874 fore200e_swap(fore200e->stats->aux.large_b2_failed),
2875 fore200e_swap(fore200e->stats->aux.rpd_alloc_failed));
2878 return sprintf(page,"\n"
2879 " receive carrier:\t\t\t%s\n",
2880 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
2883 struct atm_vcc *vcc;
2884 struct fore200e_vcc* fore200e_vcc;
2886 len = sprintf(page,"\n"
2887 " VCCs:\n address\tVPI.VCI:AAL\t(min/max tx PDU size) (min/max rx PDU size)\n");
2889 for (vcc = fore200e->atm_dev->vccs; vcc; vcc = vcc->next) {
2891 fore200e_vcc = FORE200E_VCC(vcc);
2893 len += sprintf(page + len,
2894 " %x\t%d.%d:%d\t\t(%d/%d)\t(%d/%d)\n",
2895 (u32)(unsigned long)vcc,
2896 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
2897 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
2898 fore200e_vcc->tx_max_pdu,
2899 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
2900 fore200e_vcc->rx_max_pdu
2913 fore200e_module_init(void)
2915 DPRINTK(1, "module loaded\n");
2916 return fore200e_detect() == 0;
2920 fore200e_module_cleanup(void)
2922 while (fore200e_boards) {
2923 fore200e_cleanup(&fore200e_boards);
2925 DPRINTK(1, "module being removed\n");
2928 module_init(fore200e_module_init);
2929 module_exit(fore200e_module_cleanup);
2933 static const struct atmdev_ops fore200e_ops =
2935 open: fore200e_open,
2936 close: fore200e_close,
2937 ioctl: fore200e_ioctl,
2938 getsockopt: fore200e_getsockopt,
2939 setsockopt: fore200e_setsockopt,
2940 send: fore200e_send,
2941 change_qos: fore200e_change_qos,
2942 proc_read: fore200e_proc_read,
2947 #ifdef CONFIG_ATM_FORE200E_PCA
2948 extern const unsigned char _fore200e_pca_fw_data[];
2949 extern const unsigned int _fore200e_pca_fw_size;
2951 #ifdef CONFIG_ATM_FORE200E_SBA
2952 extern const unsigned char _fore200e_sba_fw_data[];
2953 extern const unsigned int _fore200e_sba_fw_size;
2956 static const struct fore200e_bus fore200e_bus[] = {
2957 #ifdef CONFIG_ATM_FORE200E_PCA
2958 { "PCA-200E", "pca200e", 32, 4, 32,
2959 _fore200e_pca_fw_data, &_fore200e_pca_fw_size,
2962 fore200e_pca_dma_map,
2963 fore200e_pca_dma_unmap,
2964 fore200e_pca_dma_sync,
2965 fore200e_pca_dma_chunk_alloc,
2966 fore200e_pca_dma_chunk_free,
2967 fore200e_pca_detect,
2968 fore200e_pca_configure,
2971 fore200e_pca_prom_read,
2974 fore200e_pca_irq_check,
2975 fore200e_pca_irq_ack,
2976 fore200e_pca_proc_read,
2979 #ifdef CONFIG_ATM_FORE200E_SBA
2980 { "SBA-200E", "sba200e", 32, 64, 32,
2981 _fore200e_sba_fw_data, &_fore200e_sba_fw_size,
2984 fore200e_sba_dma_map,
2985 fore200e_sba_dma_unmap,
2986 fore200e_sba_dma_sync,
2987 fore200e_sba_dma_chunk_alloc,
2988 fore200e_sba_dma_chunk_free,
2989 fore200e_sba_detect,
2990 fore200e_sba_configure,
2993 fore200e_sba_prom_read,
2995 fore200e_sba_irq_enable,
2996 fore200e_sba_irq_check,
2997 fore200e_sba_irq_ack,
2998 fore200e_sba_proc_read,
3004 MODULE_LICENSE("GPL");