4 * Armin Kuster akuster@mvista.com
7 * Copyright 2002 MontaVista Softare Inc.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 * Version 1.0 (06/06/02) by Armin kuster
32 * Version 1.1 06/11/02 - armin
33 * fixed mal reset values
34 * moved ISR to enable_mal
35 * fixed channel pointer to match mal channel
39 #include <linux/config.h>
40 #include <linux/module.h>
41 #include <linux/kernel.h>
42 #include <linux/ptrace.h>
43 #include <linux/errno.h>
44 #include <linux/netdevice.h>
48 #include "ibm_ocp_enet.h"
49 #include "ibm_ocp_mal.h"
51 extern dma_addr_t rx_phys_addr;
52 extern dma_addr_t tx_phys_addr;
55 config_mal(struct ocp_enet_private *fep)
58 set_mal_dcrn(fep, DCRN_MALRXCARR, 0xFFFFFFFF);
59 set_mal_dcrn(fep, DCRN_MALTXCARR, 0xFFFFFFFF);
61 set_mal_dcrn(fep, DCRN_MALCR, MALCR_MMSR); /* 384 */
62 /* FIXME: Add delay */
64 /* Set the MAL configuration register */
65 set_mal_dcrn(fep, DCRN_MALCR,
66 MALCR_PLBB | MALCR_OPBBL | MALCR_LEA |
72 disable_mal_chan(struct ocp_enet_private *fep)
74 set_mal_dcrn(fep, DCRN_MALRXCARR, fep->rxchan);
75 set_mal_dcrn(fep, DCRN_MALTXCARR, fep->txchan);
80 enable_mal_chan(struct ocp_enet_private *fep)
82 set_mal_dcrn(fep, DCRN_MALRXCASR,
83 get_mal_dcrn(fep, DCRN_MALRXCASR) | fep->rxchan);
84 set_mal_dcrn(fep, DCRN_MALTXCASR,
85 get_mal_dcrn(fep, DCRN_MALTXCASR) | fep->txchan);
86 set_mal_dcrn(fep, DCRN_MALIER, MALIER_DE |
87 MALIER_NE | MALIER_TE | MALIER_OPBE | MALIER_PLBE);
93 set_mal_chan_addr(struct ocp_enet_private *fep)
96 /* setup MAL tx and rx channel pointers */
97 if (fep->emac_num == 3) {
98 set_mal_dcrn(fep, DCRN_MALTXCTP6R,
99 tx_phys_addr + (fep->emac_num * PAGE_SIZE));
100 set_mal_dcrn(fep, DCRN_MALRXCTP3R,
101 rx_phys_addr + (fep->emac_num * PAGE_SIZE));
102 set_mal_dcrn(fep, DCRN_MALRCBS3, DESC_BUF_SIZE_REG);
104 } else if (fep->emac_num == 2) {
105 set_mal_dcrn(fep, DCRN_MALTXCTP4R,
106 tx_phys_addr + (fep->emac_num * PAGE_SIZE));
107 set_mal_dcrn(fep, DCRN_MALRXCTP2R,
108 rx_phys_addr + (fep->emac_num * PAGE_SIZE));
109 set_mal_dcrn(fep, DCRN_MALRCBS2, DESC_BUF_SIZE_REG);
112 #endif /* CONFIG_440 */
113 if (fep->emac_num == 1) {
114 set_mal_dcrn(fep, DCRN_MALTXCTP2R,
115 tx_phys_addr + (fep->emac_num * PAGE_SIZE));
116 set_mal_dcrn(fep, DCRN_MALRXCTP1R,
117 rx_phys_addr + (fep->emac_num * PAGE_SIZE));
118 set_mal_dcrn(fep, DCRN_MALRCBS1, DESC_BUF_SIZE_REG);
120 } else if (fep->emac_num == 0) {
121 set_mal_dcrn(fep, DCRN_MALTXCTP0R, tx_phys_addr);
122 set_mal_dcrn(fep, DCRN_MALRXCTP0R, rx_phys_addr);
123 set_mal_dcrn(fep, DCRN_MALRCBS0, DESC_BUF_SIZE_REG);