2 * linux/drivers/video/riva/fbdev.c - nVidia RIVA 128/TNT/TNT2 fb driver
4 * Maintained by Ani Joshi <ajoshi@shell.unixbox.com>
6 * Copyright 1999-2000 Jeff Garzik
10 * Ani Joshi: Lots of debugging and cleanup work, really helped
11 * get the driver going
13 * Ferenc Bakonyi: Bug fixes, cleanup, modularization
15 * Jindrich Makovicka: Accel code help, hw cursor, mtrr
17 * Initial template from skeletonfb.c, created 28 Dec 1997 by Geert Uytterhoeven
18 * Includes riva_hw.c from nVidia, see copyright below.
19 * KGI code provided the basis for state storage, init, and mode switching.
21 * This file is subject to the terms and conditions of the GNU General Public
22 * License. See the file COPYING in the main directory of this archive
25 * Known bugs and issues:
26 * restoring text mode fails
27 * doublescan modes are broken
28 * option 'noaccel' has no effect
31 #include <linux/config.h>
32 #include <linux/module.h>
33 #include <linux/kernel.h>
34 #include <linux/errno.h>
35 #include <linux/string.h>
37 #include <linux/selection.h>
38 #include <linux/tty.h>
39 #include <linux/slab.h>
40 #include <linux/delay.h>
42 #include <linux/init.h>
43 #include <linux/pci.h>
44 #include <linux/console.h>
51 #ifndef CONFIG_PCI /* sanity check */
52 #error This driver requires PCI support.
57 /* version number of this driver */
58 #define RIVAFB_VERSION "0.9.3"
62 /* ------------------------------------------------------------------------- *
64 * various helpful macros and constants
66 * ------------------------------------------------------------------------- */
70 #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
72 #define DPRINTK(fmt, args...)
76 #define assert(expr) \
78 printk( "Assertion failed! %s,%s,%s,line=%d\n",\
79 #expr,__FILE__,__FUNCTION__,__LINE__); \
86 #define PFX "rivafb: "
88 /* macro that allows you to set overflow bits */
89 #define SetBitField(value,from,to) SetBF(to,GetBF(value,from))
90 #define SetBit(n) (1<<(n))
91 #define Set8Bits(value) ((value)&0xff)
93 /* HW cursor parameters */
94 #define DEFAULT_CURSOR_BLINK_RATE (40)
95 #define CURSOR_HIDE_DELAY (20)
96 #define CURSOR_SHOW_DELAY (3)
98 #define CURSOR_COLOR 0x7fff
99 #define TRANSPARENT_COLOR 0x0000
104 /* ------------------------------------------------------------------------- *
108 * ------------------------------------------------------------------------- */
110 static void rivafb_blank(int blank, struct fb_info *info);
112 extern void riva_setup_accel(struct rivafb_info *rinfo);
113 extern inline void wait_for_idle(struct rivafb_info *rinfo);
117 /* ------------------------------------------------------------------------- *
119 * card identification
121 * ------------------------------------------------------------------------- */
127 CH_RIVA_UTNT2, /* UTNT2 */
128 CH_RIVA_VTNT2, /* VTNT2 */
129 CH_RIVA_UVTNT2, /* VTNT2 */
130 CH_RIVA_ITNT2, /* ITNT2 */
146 /* directly indexed by riva_chips enum, above */
147 static struct riva_chip_info {
150 } riva_chip_info[] __devinitdata = {
151 { "RIVA-128", NV_ARCH_03 },
152 { "RIVA-TNT", NV_ARCH_04 },
153 { "RIVA-TNT2", NV_ARCH_04 },
154 { "RIVA-UTNT2", NV_ARCH_04 },
155 { "RIVA-VTNT2", NV_ARCH_04 },
156 { "RIVA-UVTNT2", NV_ARCH_04 },
157 { "RIVA-ITNT2", NV_ARCH_04 },
158 { "GeForce-SDR", NV_ARCH_10},
159 { "GeForce-DDR", NV_ARCH_10},
160 { "Quadro", NV_ARCH_10},
161 { "GeForce2-MX", NV_ARCH_10},
162 { "Quadro2-MXR", NV_ARCH_10},
163 { "GeForce2-GTS", NV_ARCH_10},
164 { "GeForce2-ULTRA", NV_ARCH_10},
165 { "Quadro2-PRO", NV_ARCH_10},
166 { "GeForce2-Go", NV_ARCH_10},
167 { "GeForce3", NV_ARCH_20},
168 { "GeForce3 Ti 200", NV_ARCH_20},
169 { "GeForce3 Ti 500", NV_ARCH_20},
170 { "Quadro DDC", NV_ARCH_20}
173 static struct pci_device_id rivafb_pci_tbl[] __devinitdata = {
174 { PCI_VENDOR_ID_NVIDIA_SGS, PCI_DEVICE_ID_NVIDIA_SGS_RIVA128,
175 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_128 },
176 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_TNT,
177 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_TNT },
178 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_TNT2,
179 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_TNT2 },
180 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_UTNT2,
181 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_UTNT2 },
182 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_VTNT2,
183 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_VTNT2 },
184 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_UVTNT2,
185 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_VTNT2 },
186 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_ITNT2,
187 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RIVA_ITNT2 },
188 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE_SDR,
189 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE_SDR },
190 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE_DDR,
191 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE_DDR },
192 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_QUADRO,
193 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_QUADRO },
194 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX,
195 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_MX },
196 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX2,
197 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_MX },
198 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_QUADRO2_MXR,
199 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_QUADRO2_MXR },
200 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS,
201 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_GTS },
202 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2,
203 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_GTS },
204 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA,
205 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_ULTRA },
206 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_QUADRO2_PRO,
207 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_QUADRO2_PRO },
208 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_GO,
209 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE2_GO },
210 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE3,
211 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE3 },
212 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE3_1,
213 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE3_1 },
214 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE3_2,
215 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE3_2 },
216 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_QUADRO_DDC,
217 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_QUADRO_DDC },
218 { 0, } /* terminate list */
220 MODULE_DEVICE_TABLE(pci, rivafb_pci_tbl);
224 /* ------------------------------------------------------------------------- *
226 * framebuffer related structures
228 * ------------------------------------------------------------------------- */
230 #ifdef FBCON_HAS_CFB8
231 extern struct display_switch fbcon_riva8;
233 #ifdef FBCON_HAS_CFB16
234 extern struct display_switch fbcon_riva16;
236 #ifdef FBCON_HAS_CFB32
237 extern struct display_switch fbcon_riva32;
241 /* describes the state of a Riva board */
243 struct riva_regs state; /* state of hw board */
244 __u32 visual; /* FB_VISUAL_xxx */
245 unsigned depth; /* bpp of current mode */
258 unsigned short image[MAX_CURS*MAX_CURS];
259 struct timer_list *timer;
264 /* ------------------------------------------------------------------------- *
268 * ------------------------------------------------------------------------- */
270 struct rivafb_info *riva_boards = NULL;
272 /* command line data, set in rivafb_setup() */
273 static char fontname[40] __initdata = { 0 };
274 static char noaccel __initdata = 0;
275 static char nomove = 0;
276 static char nohwcursor __initdata = 0;
277 static char noblink = 0;
279 static char nomtrr __initdata = 0;
283 static char *mode_option __initdata = NULL;
285 static char *font = NULL;
288 static struct fb_var_screeninfo rivafb_default_var = {
314 vmode: FB_VMODE_NONINTERLACED
318 static const struct riva_regs reg_template = {
319 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* ATTR */
320 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
321 0x41, 0x01, 0x0F, 0x00, 0x00},
322 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* CRT */
323 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
324 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE3, /* 0x10 */
325 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
326 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x20 */
327 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
328 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x30 */
329 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
332 {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, /* GRA */
334 {0x03, 0x01, 0x0F, 0x00, 0x0E}, /* SEQ */
340 /* ------------------------------------------------------------------------- *
344 * ------------------------------------------------------------------------- */
346 static inline void CRTCout(struct rivafb_info *rinfo, unsigned char index,
349 VGA_WR08(rinfo->riva.PCIO, 0x3d4, index);
350 VGA_WR08(rinfo->riva.PCIO, 0x3d5, val);
353 static inline unsigned char CRTCin(struct rivafb_info *rinfo,
356 VGA_WR08(rinfo->riva.PCIO, 0x3d4, index);
357 return (VGA_RD08(rinfo->riva.PCIO, 0x3d5));
360 static inline void GRAout(struct rivafb_info *rinfo, unsigned char index,
363 VGA_WR08(rinfo->riva.PVIO, 0x3ce, index);
364 VGA_WR08(rinfo->riva.PVIO, 0x3cf, val);
367 static inline unsigned char GRAin(struct rivafb_info *rinfo,
370 VGA_WR08(rinfo->riva.PVIO, 0x3ce, index);
371 return (VGA_RD08(rinfo->riva.PVIO, 0x3cf));
374 static inline void SEQout(struct rivafb_info *rinfo, unsigned char index,
377 VGA_WR08(rinfo->riva.PVIO, 0x3c4, index);
378 VGA_WR08(rinfo->riva.PVIO, 0x3c5, val);
381 static inline unsigned char SEQin(struct rivafb_info *rinfo,
384 VGA_WR08(rinfo->riva.PVIO, 0x3c4, index);
385 return (VGA_RD08(rinfo->riva.PVIO, 0x3c5));
388 static inline void ATTRout(struct rivafb_info *rinfo, unsigned char index,
391 VGA_WR08(rinfo->riva.PCIO, 0x3c0, index);
392 VGA_WR08(rinfo->riva.PCIO, 0x3c0, val);
395 static inline unsigned char ATTRin(struct rivafb_info *rinfo,
398 VGA_WR08(rinfo->riva.PCIO, 0x3c0, index);
399 return (VGA_RD08(rinfo->riva.PCIO, 0x3c1));
402 static inline void MISCout(struct rivafb_info *rinfo, unsigned char val)
404 VGA_WR08(rinfo->riva.PVIO, 0x3c2, val);
407 static inline unsigned char MISCin(struct rivafb_info *rinfo)
409 return (VGA_RD08(rinfo->riva.PVIO, 0x3cc));
414 /* ------------------------------------------------------------------------- *
418 * ------------------------------------------------------------------------- */
421 * riva_cursor_timer_handler - blink timer
422 * @dev_addr: pointer to rivafb_info object containing info for current riva board
425 * Cursor blink timer.
427 static void riva_cursor_timer_handler(unsigned long dev_addr)
429 struct rivafb_info *rinfo = (struct rivafb_info *)dev_addr;
431 if (!rinfo->cursor) return;
433 if (!rinfo->cursor->enable) goto out;
435 if (rinfo->cursor->last_move_delay < 1000)
436 rinfo->cursor->last_move_delay++;
438 if (rinfo->cursor->vbl_cnt && --rinfo->cursor->vbl_cnt == 0) {
439 rinfo->cursor->on ^= 1;
440 if (rinfo->cursor->on)
441 *(rinfo->riva.CURSORPOS) = (rinfo->cursor->pos.x & 0xFFFF)
442 | (rinfo->cursor->pos.y << 16);
443 rinfo->riva.ShowHideCursor(&rinfo->riva, rinfo->cursor->on);
445 rinfo->cursor->vbl_cnt = rinfo->cursor->blink_rate;
448 rinfo->cursor->timer->expires = jiffies + (HZ / 100);
449 add_timer(rinfo->cursor->timer);
453 * rivafb_init_cursor - allocates cursor structure and starts blink timer
454 * @rinfo: pointer to rivafb_info object containing info for current riva board
457 * Allocates cursor structure and starts blink timer.
460 * Pointer to allocated cursor structure.
465 static struct riva_cursor * __init rivafb_init_cursor(struct rivafb_info *rinfo)
467 struct riva_cursor *cursor;
469 cursor = kmalloc(sizeof(struct riva_cursor), GFP_KERNEL);
470 if (!cursor) return 0;
471 memset(cursor, 0, sizeof(*cursor));
473 cursor->timer = kmalloc(sizeof(*cursor->timer), GFP_KERNEL);
474 if (!cursor->timer) {
478 memset(cursor->timer, 0, sizeof(*cursor->timer));
480 cursor->blink_rate = DEFAULT_CURSOR_BLINK_RATE;
482 init_timer(cursor->timer);
483 cursor->timer->expires = jiffies + (HZ / 100);
484 cursor->timer->data = (unsigned long)rinfo;
485 cursor->timer->function = riva_cursor_timer_handler;
486 add_timer(cursor->timer);
492 * rivafb_exit_cursor - stops blink timer and releases cursor structure
493 * @rinfo: pointer to rivafb_info object containing info for current riva board
496 * Stops blink timer and releases cursor structure.
500 * rivafb_remove_one()
502 static void rivafb_exit_cursor(struct rivafb_info *rinfo)
504 struct riva_cursor *cursor = rinfo->cursor;
508 del_timer_sync(cursor->timer);
509 kfree(cursor->timer);
517 * rivafb_download_cursor - writes cursor shape into card registers
518 * @rinfo: pointer to rivafb_info object containing info for current riva board
521 * Writes cursor shape into card registers.
524 * riva_load_video_mode()
526 static void rivafb_download_cursor(struct rivafb_info *rinfo)
531 if (!rinfo->cursor) return;
533 image = (int *)rinfo->cursor->image;
534 save = rinfo->riva.ShowHideCursor(&rinfo->riva, 0);
535 for (i = 0; i < (MAX_CURS*MAX_CURS*2)/sizeof(int); i++)
536 writel(image[i], rinfo->riva.CURSOR + i);
538 rinfo->riva.ShowHideCursor(&rinfo->riva, save);
542 * rivafb_create_cursor - sets rectangular cursor
543 * @rinfo: pointer to rivafb_info object containing info for current riva board
544 * @width: cursor width in pixels
545 * @height: cursor height in pixels
548 * Sets rectangular cursor.
554 static void rivafb_create_cursor(struct rivafb_info *rinfo, int width, int height)
556 struct riva_cursor *c = rinfo->cursor;
560 if (width <= 0 || height <= 0) {
564 if (width > MAX_CURS) width = MAX_CURS;
565 if (height > MAX_CURS) height = MAX_CURS;
572 for (i = 0; i < height; i++) {
573 for (j = 0; j < width; j++,idx++)
574 c->image[idx] = CURSOR_COLOR;
575 for (j = width; j < MAX_CURS; j++,idx++)
576 c->image[idx] = TRANSPARENT_COLOR;
578 for (i = height; i < MAX_CURS; i++)
579 for (j = 0; j < MAX_CURS; j++,idx++)
580 c->image[idx] = TRANSPARENT_COLOR;
585 * rivafb_set_font - change font size
586 * @p: pointer to display object
587 * @width: font width in pixels
588 * @height: font height in pixels
591 * Callback function called if font settings changed.
594 * 1 (Always succeeds.)
596 static int rivafb_set_font(struct display *p, int width, int height)
598 struct rivafb_info *fb = (struct rivafb_info *)(p->fb_info);
600 rivafb_create_cursor(fb, width, height);
605 * rivafb_cursor - cursor handler
606 * @p: pointer to display object
607 * @mode: cursor mode (see CM_*)
608 * @x: cursor x coordinate in characters
609 * @y: cursor y coordinate in characters
614 static void rivafb_cursor(struct display *p, int mode, int x, int y)
616 struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info);
617 struct riva_cursor *c = rinfo->cursor;
621 x = x * fontwidth(p) - p->var.xoffset;
622 y = y * fontheight(p) - p->var.yoffset;
624 if (c->pos.x == x && c->pos.y == y && (mode == CM_ERASE) == !c->enable)
628 if (c->on) rinfo->riva.ShowHideCursor(&rinfo->riva, 0);
639 if (c->last_move_delay <= 1) { /* rapid cursor movement */
640 c->vbl_cnt = CURSOR_SHOW_DELAY;
642 *(rinfo->riva.CURSORPOS) = (x & 0xFFFF) | (y << 16);
643 rinfo->riva.ShowHideCursor(&rinfo->riva, 1);
644 if (!noblink) c->vbl_cnt = CURSOR_HIDE_DELAY;
647 c->last_move_delay = 0;
655 /* ------------------------------------------------------------------------- *
657 * general utility functions
659 * ------------------------------------------------------------------------- */
662 * riva_set_dispsw - sets dispsw
663 * @rinfo: pointer to internal driver struct for a given Riva card
664 * @disp: pointer to display object
667 * Sets up console low level operations depending on the current? color depth
675 static void riva_set_dispsw(struct rivafb_info *rinfo, struct display *disp)
677 int accel = disp->var.accel_flags & FB_ACCELF_TEXT;
681 assert(rinfo != NULL);
683 disp->dispsw_data = NULL;
685 disp->screen_base = rinfo->fb_base;
686 disp->type = FB_TYPE_PACKED_PIXELS;
690 disp->can_soft_blank = 1;
693 switch (disp->var.bits_per_pixel) {
694 #ifdef FBCON_HAS_CFB8
696 rinfo->dispsw = accel ? fbcon_riva8 : fbcon_cfb8;
697 disp->dispsw = &rinfo->dispsw;
698 disp->line_length = disp->var.xres_virtual;
699 disp->visual = FB_VISUAL_PSEUDOCOLOR;
702 #ifdef FBCON_HAS_CFB16
704 rinfo->dispsw = accel ? fbcon_riva16 : fbcon_cfb16;
705 disp->dispsw_data = &rinfo->con_cmap.cfb16;
706 disp->dispsw = &rinfo->dispsw;
707 disp->line_length = disp->var.xres_virtual * 2;
708 disp->visual = FB_VISUAL_DIRECTCOLOR;
711 #ifdef FBCON_HAS_CFB32
713 rinfo->dispsw = accel ? fbcon_riva32 : fbcon_cfb32;
714 disp->dispsw_data = rinfo->con_cmap.cfb32;
715 disp->dispsw = &rinfo->dispsw;
716 disp->line_length = disp->var.xres_virtual * 4;
717 disp->visual = FB_VISUAL_DIRECTCOLOR;
721 DPRINTK("Setting fbcon_dummy renderer\n");
722 rinfo->dispsw = fbcon_dummy;
723 disp->dispsw = &rinfo->dispsw;
726 /* FIXME: verify that the above code sets dsp->* fields correctly */
729 rinfo->dispsw.cursor = rivafb_cursor;
730 rinfo->dispsw.set_font = rivafb_set_font;
737 * riva_wclut - set CLUT entry
738 * @chip: pointer to RIVA_HW_INST object
739 * @regnum: register number
740 * @red: red component
741 * @green: green component
742 * @blue: blue component
745 * Sets color register @regnum.
750 static void riva_wclut(RIVA_HW_INST *chip,
751 unsigned char regnum, unsigned char red,
752 unsigned char green, unsigned char blue)
754 VGA_WR08(chip->PDIO, 0x3c8, regnum);
755 VGA_WR08(chip->PDIO, 0x3c9, red);
756 VGA_WR08(chip->PDIO, 0x3c9, green);
757 VGA_WR08(chip->PDIO, 0x3c9, blue);
761 * riva_save_state - saves current chip state
762 * @rinfo: pointer to rivafb_info object containing info for current riva board
763 * @regs: pointer to riva_regs object
766 * Saves current chip state to @regs.
772 static void riva_save_state(struct rivafb_info *rinfo, struct riva_regs *regs)
776 rinfo->riva.LockUnlock(&rinfo->riva, 0);
778 rinfo->riva.UnloadStateExt(&rinfo->riva, ®s->ext);
780 regs->misc_output = MISCin(rinfo);
782 for (i = 0; i < NUM_CRT_REGS; i++) {
783 regs->crtc[i] = CRTCin(rinfo, i);
786 for (i = 0; i < NUM_ATC_REGS; i++) {
787 regs->attr[i] = ATTRin(rinfo, i);
790 for (i = 0; i < NUM_GRC_REGS; i++) {
791 regs->gra[i] = GRAin(rinfo, i);
794 for (i = 0; i < NUM_SEQ_REGS; i++) {
795 regs->seq[i] = SEQin(rinfo, i);
800 * riva_load_state - loads current chip state
801 * @rinfo: pointer to rivafb_info object containing info for current riva board
802 * @regs: pointer to riva_regs object
805 * Loads chip state from @regs.
808 * riva_load_video_mode()
810 * rivafb_remove_one()
813 static void riva_load_state(struct rivafb_info *rinfo, struct riva_regs *regs)
816 RIVA_HW_STATE *state = ®s->ext;
818 CRTCout(rinfo, 0x11, 0x00);
820 rinfo->riva.LockUnlock(&rinfo->riva, 0);
822 rinfo->riva.LoadStateExt(&rinfo->riva, state);
824 MISCout(rinfo, regs->misc_output);
826 for (i = 0; i < NUM_CRT_REGS; i++) {
832 CRTCout(rinfo, i, regs->crtc[i]);
836 for (i = 0; i < NUM_ATC_REGS; i++) {
837 ATTRout(rinfo, i, regs->attr[i]);
840 for (i = 0; i < NUM_GRC_REGS; i++) {
841 GRAout(rinfo, i, regs->gra[i]);
844 for (i = 0; i < NUM_SEQ_REGS; i++) {
845 SEQout(rinfo, i, regs->seq[i]);
850 * riva_load_video_mode - calculate timings
851 * @rinfo: pointer to rivafb_info object containing info for current riva board
852 * @video_mode: video mode to set
855 * Calculate some timings and then send em off to riva_load_state().
860 static void riva_load_video_mode(struct rivafb_info *rinfo,
861 struct fb_var_screeninfo *video_mode)
863 struct riva_regs newmode;
864 int bpp, width, hDisplaySize, hDisplay, hStart,
865 hEnd, hTotal, height, vDisplay, vStart, vEnd, vTotal, dotClock;
867 /* time to calculate */
869 rivafb_blank(1, (struct fb_info *)rinfo);
871 bpp = video_mode->bits_per_pixel;
872 if (bpp == 16 && video_mode->green.length == 5)
874 width = video_mode->xres_virtual;
875 hDisplaySize = video_mode->xres;
876 hDisplay = (hDisplaySize / 8) - 1;
877 hStart = (hDisplaySize + video_mode->right_margin) / 8 + 2;
878 hEnd = (hDisplaySize + video_mode->right_margin +
879 video_mode->hsync_len) / 8 - 1;
880 hTotal = (hDisplaySize + video_mode->right_margin +
881 video_mode->hsync_len + video_mode->left_margin) / 8 - 1;
882 height = video_mode->yres_virtual;
883 vDisplay = video_mode->yres - 1;
884 vStart = video_mode->yres + video_mode->lower_margin - 1;
885 vEnd = video_mode->yres + video_mode->lower_margin +
886 video_mode->vsync_len - 1;
887 vTotal = video_mode->yres + video_mode->lower_margin +
888 video_mode->vsync_len + video_mode->upper_margin + 2;
889 dotClock = 1000000000 / video_mode->pixclock;
891 memcpy(&newmode, ®_template, sizeof(struct riva_regs));
893 newmode.crtc[0x0] = Set8Bits (hTotal - 4);
894 newmode.crtc[0x1] = Set8Bits (hDisplay);
895 newmode.crtc[0x2] = Set8Bits (hDisplay);
896 newmode.crtc[0x3] = SetBitField (hTotal, 4: 0, 4:0) | SetBit (7);
897 newmode.crtc[0x4] = Set8Bits (hStart);
898 newmode.crtc[0x5] = SetBitField (hTotal, 5: 5, 7:7)
899 | SetBitField (hEnd, 4: 0, 4:0);
900 newmode.crtc[0x6] = SetBitField (vTotal, 7: 0, 7:0);
901 newmode.crtc[0x7] = SetBitField (vTotal, 8: 8, 0:0)
902 | SetBitField (vDisplay, 8: 8, 1:1)
903 | SetBitField (vStart, 8: 8, 2:2)
904 | SetBitField (vDisplay, 8: 8, 3:3)
906 | SetBitField (vTotal, 9: 9, 5:5)
907 | SetBitField (vDisplay, 9: 9, 6:6)
908 | SetBitField (vStart, 9: 9, 7:7);
909 newmode.crtc[0x9] = SetBitField (vDisplay, 9: 9, 5:5)
911 newmode.crtc[0x10] = Set8Bits (vStart);
912 newmode.crtc[0x11] = SetBitField (vEnd, 3: 0, 3:0)
914 newmode.crtc[0x12] = Set8Bits (vDisplay);
915 newmode.crtc[0x13] = ((width / 8) * ((bpp + 1) / 8)) & 0xFF;
916 newmode.crtc[0x15] = Set8Bits (vDisplay);
917 newmode.crtc[0x16] = Set8Bits (vTotal + 1);
919 newmode.ext.bpp = bpp;
920 newmode.ext.width = width;
921 newmode.ext.height = height;
923 rinfo->riva.CalcStateExt(&rinfo->riva, &newmode.ext, bpp, width,
924 hDisplaySize, hDisplay, hStart, hEnd,
925 hTotal, height, vDisplay, vStart, vEnd,
928 rinfo->current_state = newmode;
929 riva_load_state(rinfo, &rinfo->current_state);
931 rinfo->riva.LockUnlock(&rinfo->riva, 0); /* important for HW cursor */
932 rivafb_download_cursor(rinfo);
936 * riva_board_list_add - maintains board list
937 * @board_list: root node of list of boards
938 * @new_node: new node to be added
941 * Adds @new_node to the list referenced by @board_list.
949 static struct rivafb_info *riva_board_list_add(struct rivafb_info *board_list,
950 struct rivafb_info *new_node)
952 struct rivafb_info *i_p = board_list;
954 new_node->next = NULL;
956 if (board_list == NULL)
959 while (i_p->next != NULL)
961 i_p->next = new_node;
967 * riva_board_list_del - maintains board list
968 * @board_list: root node of list of boards
969 * @del_node: node to be removed
972 * Removes @del_node from the list referenced by @board_list.
978 * rivafb_remove_one()
980 static struct rivafb_info *riva_board_list_del(struct rivafb_info *board_list,
981 struct rivafb_info *del_node)
983 struct rivafb_info *i_p = board_list;
985 if (board_list == del_node)
986 return del_node->next;
988 while (i_p->next != del_node)
990 i_p->next = del_node->next;
996 * rivafb_do_maximize -
997 * @rinfo: pointer to rivafb_info object containing info for current riva board
1007 * -EINVAL on failure, 0 on success
1013 static int rivafb_do_maximize(struct rivafb_info *rinfo,
1014 struct fb_var_screeninfo *var,
1015 struct fb_var_screeninfo *v,
1030 /* use highest possible virtual resolution */
1031 if (v->xres_virtual == -1 && v->yres_virtual == -1) {
1032 printk(KERN_WARNING PFX
1033 "using maximum available virtual resolution\n");
1034 for (i = 0; modes[i].xres != -1; i++) {
1035 if (modes[i].xres * nom / den * modes[i].yres <
1036 rinfo->ram_amount / 2)
1039 if (modes[i].xres == -1) {
1041 "could not find a virtual resolution that fits into video memory!!\n");
1042 DPRINTK("EXIT - EINVAL error\n");
1045 v->xres_virtual = modes[i].xres;
1046 v->yres_virtual = modes[i].yres;
1048 printk(KERN_INFO PFX
1049 "virtual resolution set to maximum of %dx%d\n",
1050 v->xres_virtual, v->yres_virtual);
1051 } else if (v->xres_virtual == -1) {
1052 v->xres_virtual = (rinfo->ram_amount * den /
1053 (nom * v->yres_virtual * 2)) & ~15;
1054 printk(KERN_WARNING PFX
1055 "setting virtual X resolution to %d\n", v->xres_virtual);
1056 } else if (v->yres_virtual == -1) {
1057 v->xres_virtual = (v->xres_virtual + 15) & ~15;
1058 v->yres_virtual = rinfo->ram_amount * den /
1059 (nom * v->xres_virtual * 2);
1060 printk(KERN_WARNING PFX
1061 "setting virtual Y resolution to %d\n", v->yres_virtual);
1063 v->xres_virtual = (v->xres_virtual + 15) & ~15;
1064 if (v->xres_virtual * nom / den * v->yres_virtual > rinfo->ram_amount) {
1066 "mode %dx%dx%d rejected...resolution too high to fit into video memory!\n",
1067 var->xres, var->yres, var->bits_per_pixel);
1068 DPRINTK("EXIT - EINVAL error\n");
1073 if (v->xres_virtual * nom / den >= 8192) {
1074 printk(KERN_WARNING PFX
1075 "virtual X resolution (%d) is too high, lowering to %d\n",
1076 v->xres_virtual, 8192 * den / nom - 16);
1077 v->xres_virtual = 8192 * den / nom - 16;
1080 if (v->xres_virtual < v->xres) {
1082 "virtual X resolution (%d) is smaller than real\n", v->xres_virtual);
1086 if (v->yres_virtual < v->yres) {
1088 "virtual Y resolution (%d) is smaller than real\n", v->yres_virtual);
1097 /* ------------------------------------------------------------------------- *
1099 * internal fb_ops helper functions
1101 * ------------------------------------------------------------------------- */
1104 * riva_get_cmap_len - query current color map length
1105 * @var: standard kernel fb changeable data
1108 * Get current color map length.
1111 * Length of color map
1119 static int riva_get_cmap_len(const struct fb_var_screeninfo *var)
1121 int rc = 16; /* reasonable default */
1123 assert(var != NULL);
1125 switch (var->bits_per_pixel) {
1126 #ifdef FBCON_HAS_CFB8
1128 rc = 256; /* pseudocolor... 256 entries HW palette */
1131 #ifdef FBCON_HAS_CFB16
1133 rc = 15; /* fix for 15 bpp depths on Riva 128 based cards */
1136 rc = 16; /* directcolor... 16 entries SW palette */
1137 break; /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
1139 #ifdef FBCON_HAS_CFB32
1141 rc = 16; /* directcolor... 16 entries SW palette */
1142 break; /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
1145 /* should not occur */
1154 * @regno: register index
1155 * @red: red component
1156 * @green: green component
1157 * @blue: blue component
1158 * @transp: transparency
1159 * @info: pointer to rivafb_info object containing info for current riva board
1162 * Read a single color register and split it into colors/transparent.
1163 * The return values must have a 16 bit magnitude.
1166 * Return != 0 for invalid regno.
1171 * fbcmap.c:fb_get_cmap()
1172 * fbgen.c:fbgen_get_cmap()
1173 * fbgen.c:fbgen_switch()
1175 static int riva_getcolreg(unsigned regno, unsigned *red, unsigned *green,
1176 unsigned *blue, unsigned *transp,
1177 struct fb_info *info)
1179 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1181 if (regno >= riva_get_cmap_len(&rivainfo->currcon_display->var))
1184 *red = rivainfo->palette[regno].red;
1185 *green = rivainfo->palette[regno].green;
1186 *blue = rivainfo->palette[regno].blue;
1194 * @regno: register index
1195 * @red: red component
1196 * @green: green component
1197 * @blue: blue component
1198 * @transp: transparency
1199 * @info: pointer to rivafb_info object containing info for current riva board
1202 * Set a single color register. The values supplied have a 16 bit
1206 * Return != 0 for invalid regno.
1210 * fbcmap.c:fb_set_cmap()
1211 * fbgen.c:fbgen_get_cmap()
1212 * fbgen.c:fbgen_install_cmap()
1213 * fbgen.c:fbgen_set_var()
1214 * fbgen.c:fbgen_switch()
1215 * fbgen.c:fbgen_blank()
1216 * fbgen.c:fbgen_blank()
1218 static int riva_setcolreg(unsigned regno, unsigned red, unsigned green,
1219 unsigned blue, unsigned transp,
1220 struct fb_info *info)
1222 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1223 RIVA_HW_INST *chip = &rivainfo->riva;
1228 assert(rivainfo != NULL);
1229 assert(rivainfo->currcon_display != NULL);
1231 p = rivainfo->currcon_display;
1233 if (regno >= riva_get_cmap_len(&p->var))
1236 rivainfo->palette[regno].red = red;
1237 rivainfo->palette[regno].green = green;
1238 rivainfo->palette[regno].blue = blue;
1240 if (p->var.grayscale) {
1241 /* gray = 0.30*R + 0.59*G + 0.11*B */
1242 red = green = blue =
1243 (red * 77 + green * 151 + blue * 28) >> 8;
1246 switch (p->var.bits_per_pixel) {
1247 #ifdef FBCON_HAS_CFB8
1249 /* "transparent" stuff is completely ignored. */
1250 riva_wclut(chip, regno, red >> 8, green >> 8, blue >> 8);
1252 #endif /* FBCON_HAS_CFB8 */
1253 #ifdef FBCON_HAS_CFB16
1256 if (p->var.green.length == 5) {
1257 /* 0rrrrrgg gggbbbbb */
1258 rivainfo->con_cmap.cfb16[regno] =
1259 ((red & 0xf800) >> 1) |
1260 ((green & 0xf800) >> 6) | ((blue & 0xf800) >> 11);
1262 /* rrrrrggg gggbbbbb */
1263 rivainfo->con_cmap.cfb16[regno] =
1264 ((red & 0xf800) >> 0) |
1265 ((green & 0xf800) >> 5) | ((blue & 0xf800) >> 11);
1268 #endif /* FBCON_HAS_CFB16 */
1269 #ifdef FBCON_HAS_CFB32
1272 rivainfo->con_cmap.cfb32[regno] =
1273 ((red & 0xff00) << 8) |
1274 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1276 #endif /* FBCON_HAS_CFB32 */
1287 /* ------------------------------------------------------------------------- *
1289 * framebuffer operations
1291 * ------------------------------------------------------------------------- */
1293 static int rivafb_get_fix(struct fb_fix_screeninfo *fix, int con,
1294 struct fb_info *info)
1296 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1301 assert(fix != NULL);
1302 assert(info != NULL);
1303 assert(rivainfo->drvr_name && rivainfo->drvr_name[0]);
1304 assert(rivainfo->fb_base_phys > 0);
1305 assert(rivainfo->ram_amount > 0);
1307 p = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1309 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
1310 sprintf(fix->id, "nVidia %s", rivainfo->drvr_name);
1312 fix->type = p->type;
1313 fix->type_aux = p->type_aux;
1314 fix->visual = p->visual;
1318 fix->ywrapstep = 0; /* FIXME: no ywrap for now */
1320 fix->line_length = p->line_length;
1322 fix->mmio_start = rivainfo->ctrl_base_phys;
1323 fix->mmio_len = rivainfo->base0_region_size;
1324 fix->smem_start = rivainfo->fb_base_phys;
1325 fix->smem_len = rivainfo->ram_amount;
1327 switch (rivainfo->riva.Architecture) {
1329 fix->accel = FB_ACCEL_NV3;
1331 case NV_ARCH_04: /* riva_hw.c now doesn't distinguish between TNT & TNT2 */
1332 fix->accel = FB_ACCEL_NV4;
1334 case NV_ARCH_10: /* FIXME: ID for GeForce */
1336 fix->accel = FB_ACCEL_NV4;
1341 DPRINTK("EXIT, returning 0\n");
1346 static int rivafb_get_var(struct fb_var_screeninfo *var, int con,
1347 struct fb_info *info)
1349 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1353 assert(info != NULL);
1354 assert(var != NULL);
1356 *var = (con < 0) ? rivainfo->disp.var : fb_display[con].var;
1358 DPRINTK("EXIT, returning 0\n");
1363 static int rivafb_set_var(struct fb_var_screeninfo *var, int con,
1364 struct fb_info *info)
1366 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1367 struct display *dsp;
1368 struct fb_var_screeninfo v;
1369 int nom, den; /* translating from pixels->bytes */
1371 unsigned chgvar = 0;
1375 assert(info != NULL);
1376 assert(var != NULL);
1378 DPRINTK("Requested: %dx%dx%d\n", var->xres, var->yres,
1379 var->bits_per_pixel);
1380 DPRINTK(" virtual: %dx%d\n", var->xres_virtual,
1382 DPRINTK(" offset: (%d,%d)\n", var->xoffset, var->yoffset);
1383 DPRINTK("grayscale: %d\n", var->grayscale);
1385 dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1386 assert(dsp != NULL);
1388 /* if var has changed, we should call changevar() later */
1390 chgvar = ((dsp->var.xres != var->xres) ||
1391 (dsp->var.yres != var->yres) ||
1392 (dsp->var.xres_virtual != var->xres_virtual) ||
1393 (dsp->var.yres_virtual != var->yres_virtual) ||
1394 (dsp->var.accel_flags != var->accel_flags) ||
1395 (dsp->var.bits_per_pixel != var->bits_per_pixel)
1396 || memcmp(&dsp->var.red, &var->red,
1398 || memcmp(&dsp->var.green, &var->green,
1400 || memcmp(&dsp->var.blue, &var->blue,
1401 sizeof(var->blue)));
1404 memcpy(&v, var, sizeof(v));
1406 accel = v.accel_flags & FB_ACCELF_TEXT;
1408 switch (v.bits_per_pixel) {
1409 #ifdef FBCON_HAS_CFB8
1411 v.bits_per_pixel = 8;
1422 #ifdef FBCON_HAS_CFB16
1427 v.bits_per_pixel = 16;
1430 if (v.green.length == 5) {
1431 /* 0rrrrrgg gggbbbbb */
1439 /* rrrrrggg gggbbbbb */
1449 #ifdef FBCON_HAS_CFB32
1451 v.bits_per_pixel = 32;
1464 "mode %dx%dx%d rejected...color depth not supported.\n",
1465 var->xres, var->yres, var->bits_per_pixel);
1466 DPRINTK("EXIT, returning -EINVAL\n");
1470 if (rivafb_do_maximize(rivainfo, var, &v, nom, den) < 0)
1478 /* truncate xoffset and yoffset to maximum if too high */
1479 if (v.xoffset > v.xres_virtual - v.xres)
1480 v.xoffset = v.xres_virtual - v.xres - 1;
1482 if (v.yoffset > v.yres_virtual - v.yres)
1483 v.yoffset = v.yres_virtual - v.yres - 1;
1488 v.transp.offset = v.transp.length = v.transp.msb_right = 0;
1490 switch (v.activate & FB_ACTIVATE_MASK) {
1491 case FB_ACTIVATE_TEST:
1492 DPRINTK("EXIT - FB_ACTIVATE_TEST\n");
1494 case FB_ACTIVATE_NXTOPEN: /* ?? */
1495 case FB_ACTIVATE_NOW:
1496 break; /* continue */
1498 DPRINTK("EXIT - unknown activation type\n");
1499 return -EINVAL; /* unknown */
1502 memcpy(&dsp->var, &v, sizeof(v));
1504 riva_set_dispsw(rivainfo, dsp);
1508 dsp->scrollmode = SCROLL_YNOMOVE;
1510 dsp->scrollmode = 0;
1512 dsp->scrollmode = SCROLL_YREDRAW;
1514 if (info && info->changevar)
1515 info->changevar(con);
1518 rivafb_create_cursor(rivainfo, fontwidth(dsp), fontheight(dsp));
1519 riva_load_video_mode(rivainfo, &v);
1520 if (accel) riva_setup_accel(rivainfo);
1522 DPRINTK("EXIT, returning 0\n");
1526 static int rivafb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
1527 struct fb_info *info)
1529 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1530 struct display *dsp;
1534 assert(rivainfo != NULL);
1535 assert(cmap != NULL);
1537 dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1539 if (con == rivainfo->currcon) { /* current console? */
1540 int rc = fb_get_cmap(cmap, kspc, riva_getcolreg, info);
1541 DPRINTK("EXIT - returning %d\n", rc);
1543 } else if (dsp->cmap.len) /* non default colormap? */
1544 fb_copy_cmap(&dsp->cmap, cmap, kspc ? 0 : 2);
1546 fb_copy_cmap(fb_default_cmap
1547 (riva_get_cmap_len(&dsp->var)), cmap,
1550 DPRINTK("EXIT, returning 0\n");
1555 static int rivafb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
1556 struct fb_info *info)
1558 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1559 struct display *dsp;
1560 unsigned int cmap_len;
1564 assert(rivainfo != NULL);
1565 assert(cmap != NULL);
1567 dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1569 cmap_len = riva_get_cmap_len(&dsp->var);
1570 if (dsp->cmap.len != cmap_len) {
1571 int err = fb_alloc_cmap(&dsp->cmap, cmap_len, 0);
1573 DPRINTK("EXIT - returning %d\n", err);
1577 if (con == rivainfo->currcon) { /* current console? */
1578 int rc = fb_set_cmap(cmap, kspc, riva_setcolreg, info);
1579 DPRINTK("EXIT - returning %d\n", rc);
1582 fb_copy_cmap(cmap, &dsp->cmap, kspc ? 0 : 1);
1584 DPRINTK("EXIT, returning 0\n");
1590 * rivafb_pan_display
1591 * @var: standard kernel fb changeable data
1593 * @info: pointer to rivafb_info object containing info for current riva board
1596 * Pan (or wrap, depending on the `vmode' field) the display using the
1597 * `xoffset' and `yoffset' fields of the `var' structure.
1598 * If the values don't fit, return -EINVAL.
1600 * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
1602 static int rivafb_pan_display(struct fb_var_screeninfo *var, int con,
1603 struct fb_info *info)
1606 struct display *dsp;
1607 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1611 assert(rivainfo != NULL);
1613 if (var->xoffset > (var->xres_virtual - var->xres))
1615 if (var->yoffset > (var->yres_virtual - var->yres))
1618 dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1620 if (var->vmode & FB_VMODE_YWRAP) {
1621 if (var->yoffset < 0
1622 || var->yoffset >= dsp->var.yres_virtual
1623 || var->xoffset) return -EINVAL;
1625 if (var->xoffset + dsp->var.xres > dsp->var.xres_virtual ||
1626 var->yoffset + dsp->var.yres > dsp->var.yres_virtual)
1630 base = var->yoffset * dsp->line_length + var->xoffset;
1632 if (con == rivainfo->currcon) {
1633 rivainfo->riva.SetStartAddress(&rivainfo->riva, base);
1636 dsp->var.xoffset = var->xoffset;
1637 dsp->var.yoffset = var->yoffset;
1639 if (var->vmode & FB_VMODE_YWRAP)
1640 dsp->var.vmode |= FB_VMODE_YWRAP;
1642 dsp->var.vmode &= ~FB_VMODE_YWRAP;
1644 DPRINTK("EXIT, returning 0\n");
1649 static int rivafb_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
1650 unsigned long arg, int con, struct fb_info *info)
1652 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1656 assert(rivainfo != NULL);
1658 /* no rivafb-specific ioctls */
1660 DPRINTK("EXIT, returning -EINVAL\n");
1665 static int rivafb_rasterimg(struct fb_info *info, int start)
1667 struct rivafb_info *rinfo = (struct rivafb_info *)info;
1669 wait_for_idle(rinfo);
1674 static int rivafb_switch(int con, struct fb_info *info)
1676 struct rivafb_info *rivainfo = (struct rivafb_info *)info;
1677 struct fb_cmap *cmap;
1678 struct display *dsp;
1682 assert(rivainfo != NULL);
1684 dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
1686 if (rivainfo->currcon >= 0) {
1687 /* Do we have to save the colormap? */
1688 cmap = &(rivainfo->currcon_display->cmap);
1689 DPRINTK("switch1: con = %d, cmap.len = %d\n",
1690 rivainfo->currcon, cmap->len);
1693 DPRINTK("switch1a: %p %p %p %p\n", cmap->red,
1694 cmap->green, cmap->blue, cmap->transp);
1695 fb_get_cmap(cmap, 1, riva_getcolreg, info);
1698 rivainfo->currcon = con;
1699 rivainfo->currcon_display = dsp;
1701 rivafb_set_var(&dsp->var, con, info);
1702 riva_set_dispsw(rivainfo, dsp);
1704 DPRINTK("EXIT, returning 0\n");
1708 static int rivafb_updatevar(int con, struct fb_info *info)
1714 rc = (con < 0) ? -EINVAL : rivafb_pan_display(&fb_display[con].var,
1716 DPRINTK("EXIT, returning %d\n", rc);
1720 static void rivafb_blank(int blank, struct fb_info *info)
1722 unsigned char tmp, vesa;
1723 struct rivafb_info *rinfo = (struct rivafb_info *)info;
1727 assert(rinfo != NULL);
1729 tmp = SEQin(rinfo, 0x01) & ~0x20; /* screen on/off */
1730 vesa = CRTCin(rinfo, 0x1a) & ~0xc0; /* sync on/off */
1734 switch (blank - 1) {
1735 case VESA_NO_BLANKING:
1737 case VESA_VSYNC_SUSPEND:
1740 case VESA_HSYNC_SUSPEND:
1743 case VESA_POWERDOWN:
1749 SEQout(rinfo, 0x01, tmp);
1750 CRTCout(rinfo, 0x1a, vesa);
1757 /* ------------------------------------------------------------------------- *
1759 * initialization helper functions
1761 * ------------------------------------------------------------------------- */
1763 /* kernel interface */
1764 static struct fb_ops riva_fb_ops = {
1766 fb_get_fix: rivafb_get_fix,
1767 fb_get_var: rivafb_get_var,
1768 fb_set_var: rivafb_set_var,
1769 fb_get_cmap: rivafb_get_cmap,
1770 fb_set_cmap: rivafb_set_cmap,
1771 fb_pan_display: rivafb_pan_display,
1772 fb_ioctl: rivafb_ioctl,
1773 fb_rasterimg: rivafb_rasterimg,
1776 static int __devinit riva_init_disp_var(struct rivafb_info *rinfo)
1780 fb_find_mode(&rinfo->disp.var, &rinfo->info, mode_option,
1786 static int __devinit riva_init_disp(struct rivafb_info *rinfo)
1788 struct fb_info *info;
1789 struct display *disp;
1793 assert(rinfo != NULL);
1795 info = &rinfo->info;
1796 disp = &rinfo->disp;
1798 disp->var = rivafb_default_var;
1801 disp->var.accel_flags &= ~FB_ACCELF_TEXT;
1803 disp->var.accel_flags |= FB_ACCELF_TEXT;
1807 /* FIXME: assure that disp->cmap is completely filled out */
1809 rinfo->currcon_display = disp;
1811 if ((riva_init_disp_var(rinfo)) < 0) {
1812 DPRINTK("EXIT, returning -1\n");
1816 riva_set_dispsw(rinfo, disp);
1818 DPRINTK("EXIT, returning 0\n");
1823 static int __devinit riva_set_fbinfo(struct rivafb_info *rinfo)
1825 struct fb_info *info;
1827 assert(rinfo != NULL);
1829 info = &rinfo->info;
1831 strcpy(info->modename, rinfo->drvr_name);
1833 info->flags = FBINFO_FLAG_DEFAULT;
1834 info->fbops = &riva_fb_ops;
1836 /* FIXME: set monspecs to what??? */
1838 info->display_fg = NULL;
1839 strncpy(info->fontname, fontname, sizeof(info->fontname));
1840 info->fontname[sizeof(info->fontname) - 1] = 0;
1842 info->changevar = NULL;
1843 info->switch_con = rivafb_switch;
1844 info->updatevar = rivafb_updatevar;
1845 info->blank = rivafb_blank;
1847 if (riva_init_disp(rinfo) < 0) /* must be done last */
1855 /* ------------------------------------------------------------------------- *
1859 * ------------------------------------------------------------------------- */
1861 static int __devinit rivafb_init_one(struct pci_dev *pd,
1862 const struct pci_device_id *ent)
1864 struct rivafb_info *rinfo;
1865 struct riva_chip_info *rci = &riva_chip_info[ent->driver_data];
1868 assert(rci != NULL);
1870 rinfo = kmalloc(sizeof(struct rivafb_info), GFP_KERNEL);
1874 memset(rinfo, 0, sizeof(struct rivafb_info));
1876 rinfo->drvr_name = rci->name;
1877 rinfo->riva.Architecture = rci->arch_rev;
1880 rinfo->base0_region_size = pci_resource_len(pd, 0);
1881 rinfo->base1_region_size = pci_resource_len(pd, 1);
1883 rinfo->ctrl_base_phys = pci_resource_start(rinfo->pd, 0);
1884 rinfo->fb_base_phys = pci_resource_start(rinfo->pd, 1);
1886 if (!request_mem_region(rinfo->ctrl_base_phys,
1887 rinfo->base0_region_size, "rivafb")) {
1888 printk(KERN_ERR PFX "cannot reserve MMIO region\n");
1892 rinfo->ctrl_base = ioremap(rinfo->ctrl_base_phys,
1893 rinfo->base0_region_size);
1894 if (!rinfo->ctrl_base) {
1895 printk(KERN_ERR PFX "cannot ioremap MMIO base\n");
1896 goto err_out_free_base1;
1899 rinfo->riva.EnableIRQ = 0;
1900 rinfo->riva.PRAMDAC = (unsigned *)(rinfo->ctrl_base + 0x00680000);
1901 rinfo->riva.PFB = (unsigned *)(rinfo->ctrl_base + 0x00100000);
1902 rinfo->riva.PFIFO = (unsigned *)(rinfo->ctrl_base + 0x00002000);
1903 rinfo->riva.PGRAPH = (unsigned *)(rinfo->ctrl_base + 0x00400000);
1904 rinfo->riva.PEXTDEV = (unsigned *)(rinfo->ctrl_base + 0x00101000);
1905 rinfo->riva.PTIMER = (unsigned *)(rinfo->ctrl_base + 0x00009000);
1906 rinfo->riva.PMC = (unsigned *)(rinfo->ctrl_base + 0x00000000);
1907 rinfo->riva.FIFO = (unsigned *)(rinfo->ctrl_base + 0x00800000);
1909 rinfo->riva.PCIO = (U008 *)(rinfo->ctrl_base + 0x00601000);
1910 rinfo->riva.PDIO = (U008 *)(rinfo->ctrl_base + 0x00681000);
1911 rinfo->riva.PVIO = (U008 *)(rinfo->ctrl_base + 0x000C0000);
1913 rinfo->riva.IO = (MISCin(rinfo) & 0x01) ? 0x3D0 : 0x3B0;
1915 if (rinfo->riva.Architecture == NV_ARCH_03) {
1917 * We have to map the full BASE_1 aperture for Riva128's
1918 * because they use the PRAMIN set in "framebuffer" space
1920 if (!request_mem_region(rinfo->fb_base_phys,
1921 rinfo->base1_region_size, "rivafb")) {
1922 printk(KERN_ERR PFX "cannot reserve FB region\n");
1923 goto err_out_free_base0;
1926 rinfo->fb_base = ioremap(rinfo->fb_base_phys,
1927 rinfo->base1_region_size);
1928 if (!rinfo->fb_base) {
1929 printk(KERN_ERR PFX "cannot ioremap FB base\n");
1930 goto err_out_iounmap_ctrl;
1935 switch (rinfo->riva.Architecture) {
1937 rinfo->riva.PRAMIN = (unsigned *)(rinfo->fb_base + 0x00C00000);
1942 rinfo->riva.PCRTC = (unsigned *)(rinfo->ctrl_base + 0x00600000);
1943 rinfo->riva.PRAMIN = (unsigned *)(rinfo->ctrl_base + 0x00710000);
1947 RivaGetConfig(&rinfo->riva);
1949 rinfo->ram_amount = rinfo->riva.RamAmountKBytes * 1024;
1950 rinfo->dclk_max = rinfo->riva.MaxVClockFreqKHz * 1000;
1952 if (rinfo->riva.Architecture != NV_ARCH_03) {
1954 * Now the _normal_ chipsets can just map the amount of
1955 * real physical ram instead of the whole aperture
1957 if (!request_mem_region(rinfo->fb_base_phys,
1958 rinfo->ram_amount, "rivafb")) {
1959 printk(KERN_ERR PFX "cannot reserve FB region\n");
1960 goto err_out_free_base0;
1963 rinfo->fb_base = ioremap(rinfo->fb_base_phys,
1965 if (!rinfo->fb_base) {
1966 printk(KERN_ERR PFX "cannot ioremap FB base\n");
1967 goto err_out_iounmap_ctrl;
1973 rinfo->mtrr.vram = mtrr_add(rinfo->fb_base_phys,
1975 MTRR_TYPE_WRCOMB, 1);
1976 if (rinfo->mtrr.vram < 0) {
1977 printk(KERN_ERR PFX "unable to setup MTRR\n");
1979 rinfo->mtrr.vram_valid = 1;
1980 /* let there be speed */
1981 printk(KERN_INFO PFX "RIVA MTRR set to ON\n");
1984 #endif /* CONFIG_MTRR */
1987 CRTCout(rinfo, 0x11, 0xFF); /* vgaHWunlock() + riva unlock (0x7F) */
1988 rinfo->riva.LockUnlock(&rinfo->riva, 0);
1990 riva_save_state(rinfo, &rinfo->initial_state);
1992 if (!nohwcursor) rinfo->cursor = rivafb_init_cursor(rinfo);
1994 if (riva_set_fbinfo(rinfo) < 0) {
1995 printk(KERN_ERR PFX "error setting initial video mode\n");
1996 goto err_out_cursor;
1999 if (register_framebuffer((struct fb_info *)rinfo) < 0) {
2001 "error registering riva framebuffer\n");
2002 goto err_out_load_state;
2005 riva_boards = riva_board_list_add(riva_boards, rinfo);
2007 pci_set_drvdata(pd, rinfo);
2009 printk(KERN_INFO PFX
2010 "PCI nVidia NV%x framebuffer ver %s (%s, %dMB @ 0x%lX)\n",
2011 rinfo->riva.Architecture,
2014 rinfo->ram_amount / (1024 * 1024),
2015 rinfo->fb_base_phys);
2020 riva_load_state(rinfo, &rinfo->initial_state);
2022 rivafb_exit_cursor(rinfo);
2023 /* err_out_iounmap_fb: */
2024 iounmap(rinfo->fb_base);
2025 err_out_iounmap_ctrl:
2026 iounmap(rinfo->ctrl_base);
2028 release_mem_region(rinfo->fb_base_phys, rinfo->base1_region_size);
2030 release_mem_region(rinfo->ctrl_base_phys, rinfo->base0_region_size);
2037 static void __devexit rivafb_remove_one(struct pci_dev *pd)
2039 struct rivafb_info *board = pci_get_drvdata(pd);
2044 riva_boards = riva_board_list_del(riva_boards, board);
2046 riva_load_state(board, &board->initial_state);
2048 unregister_framebuffer((struct fb_info *)board);
2050 rivafb_exit_cursor(board);
2053 if (board->mtrr.vram_valid)
2054 mtrr_del(board->mtrr.vram, board->fb_base_phys,
2056 #endif /* CONFIG_MTRR */
2058 iounmap(board->ctrl_base);
2059 iounmap(board->fb_base);
2061 release_mem_region(board->ctrl_base_phys,
2062 board->base0_region_size);
2063 release_mem_region(board->fb_base_phys,
2068 pci_set_drvdata(pd, NULL);
2073 /* ------------------------------------------------------------------------- *
2077 * ------------------------------------------------------------------------- */
2080 int __init rivafb_setup(char *options)
2084 if (!options || !*options)
2087 while ((this_opt = strsep(&options, ",")) != NULL) {
2090 if (!strncmp(this_opt, "font:", 5)) {
2095 for (i = 0; i < sizeof(fontname) - 1; i++)
2096 if (!*p || *p == ' ' || *p == ',')
2098 memcpy(fontname, this_opt + 5, i);
2101 } else if (!strncmp(this_opt, "noblink", 7)) {
2103 } else if (!strncmp(this_opt, "noaccel", 7)) {
2105 } else if (!strncmp(this_opt, "nomove", 6)) {
2108 } else if (!strncmp(this_opt, "nomtrr", 6)) {
2111 } else if (!strncmp(this_opt, "nohwcursor", 10)) {
2114 mode_option = this_opt;
2118 #endif /* !MODULE */
2120 static struct pci_driver rivafb_driver = {
2122 id_table: rivafb_pci_tbl,
2123 probe: rivafb_init_one,
2124 remove: __devexit_p(rivafb_remove_one),
2129 /* ------------------------------------------------------------------------- *
2133 * ------------------------------------------------------------------------- */
2135 int __init rivafb_init(void)
2139 if (font) strncpy(fontname, font, sizeof(fontname)-1);
2141 err = pci_module_init(&rivafb_driver);
2149 static void __exit rivafb_exit(void)
2151 pci_unregister_driver(&rivafb_driver);
2154 module_init(rivafb_init);
2155 module_exit(rivafb_exit);
2157 MODULE_PARM(font, "s");
2158 MODULE_PARM_DESC(font, "Specifies one of the compiled-in fonts (default=none)");
2159 MODULE_PARM(noaccel, "i");
2160 MODULE_PARM_DESC(noaccel, "Disables hardware acceleration (0 or 1=disabled) (default=0)");
2161 MODULE_PARM(nomove, "i");
2162 MODULE_PARM_DESC(nomove, "Enables YSCROLL_NOMOVE (0 or 1=enabled) (default=0)");
2163 MODULE_PARM(nohwcursor, "i");
2164 MODULE_PARM_DESC(nohwcursor, "Disables hardware cursor (0 or 1=disabled) (default=0)");
2165 MODULE_PARM(noblink, "i");
2166 MODULE_PARM_DESC(noblink, "Disables hardware cursor blinking (0 or 1=disabled) (default=0)");
2168 MODULE_PARM(nomtrr, "i");
2169 MODULE_PARM_DESC(nomtrr, "Disables MTRR support (0 or 1=disabled) (default=0)");
2173 MODULE_AUTHOR("Ani Joshi, maintainer");
2174 MODULE_DESCRIPTION("Framebuffer driver for nVidia Riva 128, TNT, TNT2");
2175 MODULE_LICENSE("GPL");