6 #include <linux/spinlock.h>
7 #include <asm/scatterlist.h>
8 #include <asm/machvec.h>
11 * The following structure is used to manage multiple PCI busses.
17 struct pci_iommu_arena;
20 /* A controller. Used to manage multiple PCI busses. */
22 struct pci_controller {
23 struct pci_controller *next;
25 struct resource *io_space;
26 struct resource *mem_space;
28 /* The following are for reporting to userland. The invariant is
29 that if we report a BWX-capable dense memory, we do not report
30 a sparse memory at all, even if it exists. */
31 unsigned long sparse_mem_base;
32 unsigned long dense_mem_base;
33 unsigned long sparse_io_base;
34 unsigned long dense_io_base;
36 /* This one's for the kernel only. It's in KSEG somewhere. */
37 unsigned long config_space_base;
40 unsigned int first_busno;
41 unsigned int last_busno;
43 struct pci_iommu_arena *sg_pci;
44 struct pci_iommu_arena *sg_isa;
49 /* Override the logic in pci_scan_bus for skipping already-configured
52 #define pcibios_assign_all_busses() 1
54 #define PCIBIOS_MIN_IO alpha_mv.min_io_address
55 #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
57 extern void pcibios_set_master(struct pci_dev *dev);
59 extern inline void pcibios_penalize_isa_irq(int irq)
61 /* We don't do dynamic PCI IRQ allocation */
66 /* The PCI address space does not equal the physical memory address space.
67 The networking and block device layers use this boolean for bounce buffer
69 #define PCI_DMA_BUS_IS_PHYS 0
71 /* Allocate and map kernel buffer using consistant mode DMA for PCI
72 device. Returns non-NULL cpu-view pointer to the buffer if
73 successful and sets *DMA_ADDRP to the pci side dma address as well,
74 else DMA_ADDRP is undefined. */
76 extern void *pci_alloc_consistent(struct pci_dev *, size_t, dma_addr_t *);
78 /* Free and unmap a consistant DMA buffer. CPU_ADDR and DMA_ADDR must
79 be values that were returned from pci_alloc_consistant. SIZE must
80 be the same as what as passed into pci_alloc_consistant.
81 References to the memory and mappings assosciated with CPU_ADDR or
82 DMA_ADDR past this call are illegal. */
84 extern void pci_free_consistent(struct pci_dev *, size_t, void *, dma_addr_t);
86 /* Map a single buffer of the indicate size for PCI DMA in streaming
87 mode. The 32-bit PCI bus mastering address to use is returned.
88 Once the device is given the dma address, the device owns this memory
89 until either pci_unmap_single or pci_dma_sync_single is performed. */
91 extern dma_addr_t pci_map_single(struct pci_dev *, void *, size_t, int);
93 /* Likewise, but for a page instead of an address. */
94 extern dma_addr_t pci_map_page(struct pci_dev *, struct page *,
95 unsigned long, size_t, int);
97 /* Unmap a single streaming mode DMA translation. The DMA_ADDR and
98 SIZE must match what was provided for in a previous pci_map_single
99 call. All other usages are undefined. After this call, reads by
100 the cpu to the buffer are guarenteed to see whatever the device
103 extern void pci_unmap_single(struct pci_dev *, dma_addr_t, size_t, int);
104 extern void pci_unmap_page(struct pci_dev *, dma_addr_t, size_t, int);
106 /* pci_unmap_{single,page} is not a nop, thus... */
107 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
108 dma_addr_t ADDR_NAME;
109 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
111 #define pci_unmap_addr(PTR, ADDR_NAME) \
113 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
114 (((PTR)->ADDR_NAME) = (VAL))
115 #define pci_unmap_len(PTR, LEN_NAME) \
117 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
118 (((PTR)->LEN_NAME) = (VAL))
120 /* Map a set of buffers described by scatterlist in streaming mode for
121 PCI DMA. This is the scather-gather version of the above
122 pci_map_single interface. Here the scatter gather list elements
123 are each tagged with the appropriate PCI dma address and length.
124 They are obtained via sg_dma_{address,length}(SG).
126 NOTE: An implementation may be able to use a smaller number of DMA
127 address/length pairs than there are SG table elements. (for
128 example via virtual mapping capabilities) The routine returns the
129 number of addr/length pairs actually used, at most nents.
131 Device ownership issues as mentioned above for pci_map_single are
134 extern int pci_map_sg(struct pci_dev *, struct scatterlist *, int, int);
136 /* Unmap a set of streaming mode DMA translations. Again, cpu read
137 rules concerning calls here are the same as for pci_unmap_single()
140 extern void pci_unmap_sg(struct pci_dev *, struct scatterlist *, int, int);
142 /* Make physical memory consistant for a single streaming mode DMA
143 translation after a transfer.
145 If you perform a pci_map_single() but wish to interrogate the
146 buffer using the cpu, yet do not wish to teardown the PCI dma
147 mapping, you must call this function before doing so. At the next
148 point you give the PCI dma address back to the card, the device
149 again owns the buffer. */
152 pci_dma_sync_single(struct pci_dev *dev, dma_addr_t dma_addr, long size,
158 /* Make physical memory consistant for a set of streaming mode DMA
159 translations after a transfer. The same as pci_dma_sync_single but
160 for a scatter-gather list, same rules and usage. */
163 pci_dma_sync_sg(struct pci_dev *dev, struct scatterlist *sg, int nents,
169 /* Return whether the given PCI device DMA address mask can
170 be supported properly. For example, if your device can
171 only drive the low 24-bits during PCI bus mastering, then
172 you would pass 0x00ffffff as the mask to this function. */
174 extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
176 /* True if the machine supports DAC addressing, and DEV can
177 make use of it given MASK. */
178 extern int pci_dac_dma_supported(struct pci_dev *hwdev, u64 mask);
180 /* Convert to/from DAC dma address and struct page. */
181 extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *, struct page *, unsigned long, int);
182 extern struct page *pci_dac_dma_to_page(struct pci_dev *, dma64_addr_t);
183 extern unsigned long pci_dac_dma_to_offset(struct pci_dev *, dma64_addr_t);
185 static __inline__ void
186 pci_dac_dma_sync_single(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
191 /* Return the index of the PCI controller for device PDEV. */
192 extern int pci_controller_num(struct pci_dev *pdev);
193 #endif /* __KERNEL__ */
195 /* Values for the `which' argument to sys_pciconfig_iobase. */
196 #define IOBASE_HOSE 0
197 #define IOBASE_SPARSE_MEM 1
198 #define IOBASE_DENSE_MEM 2
199 #define IOBASE_SPARSE_IO 3
200 #define IOBASE_DENSE_IO 4
201 #define IOBASE_ROOT_BUS 5
202 #define IOBASE_FROM_HOSE 0x10000
204 #endif /* __ALPHA_PCI_H */