1 #ifndef _ALPHA_PGALLOC_H
2 #define _ALPHA_PGALLOC_H
4 #include <linux/config.h>
6 #ifndef __EXTERN_INLINE
7 #define __EXTERN_INLINE extern inline
8 #define __MMU_EXTERN_INLINE
11 extern void __load_new_mm_context(struct mm_struct *);
14 /* Caches aren't brain-dead on the Alpha. */
15 #define flush_cache_all() do { } while (0)
16 #define flush_cache_mm(mm) do { } while (0)
17 #define flush_cache_range(mm, start, end) do { } while (0)
18 #define flush_cache_page(vma, vmaddr) do { } while (0)
19 #define flush_page_to_ram(page) do { } while (0)
20 #define flush_dcache_page(page) do { } while (0)
22 /* Note that the following two definitions are _highly_ dependent
23 on the contexts in which they are used in the kernel. I personally
24 think it is criminal how loosely defined these macros are. */
26 /* We need to flush the kernel's icache after loading modules. The
27 only other use of this macro is in load_aout_interp which is not
30 Note that this definition should *not* be used for userspace
31 icache flushing. While functional, it is _way_ overkill. The
32 icache is tagged with ASNs and it suffices to allocate a new ASN
35 #define flush_icache_range(start, end) imb()
37 #define flush_icache_range(start, end) smp_imb()
38 extern void smp_imb(void);
43 * Use a few helper functions to hide the ugly broken ASN
44 * numbers on early Alphas (ev4 and ev45)
48 ev4_flush_tlb_current(struct mm_struct *mm)
50 __load_new_mm_context(mm);
55 ev5_flush_tlb_current(struct mm_struct *mm)
57 __load_new_mm_context(mm);
61 flush_tlb_other(struct mm_struct *mm)
63 long * mmc = &mm->context[smp_processor_id()];
65 * Check it's not zero first to avoid cacheline ping pong when
72 /* We need to flush the userspace icache after setting breakpoints in
75 Instead of indiscriminately using imb, take advantage of the fact
76 that icache entries are tagged with the ASN and load a new mm context. */
77 /* ??? Ought to use this in arch/alpha/kernel/signal.c too. */
81 flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
82 unsigned long addr, int len)
84 if (vma->vm_flags & VM_EXEC) {
85 struct mm_struct *mm = vma->vm_mm;
86 if (current->active_mm == mm)
87 __load_new_mm_context(mm);
89 mm->context[smp_processor_id()] = 0;
93 extern void flush_icache_user_range(struct vm_area_struct *vma,
94 struct page *page, unsigned long addr, int len);
97 /* this is used only in do_no_page and do_swap_page */
98 #define flush_icache_page(vma, page) flush_icache_user_range((vma), (page), 0, 0)
101 * Flush just one page in the current TLB set.
102 * We need to be very careful about the icache here, there
103 * is no way to invalidate a specific icache page..
107 ev4_flush_tlb_current_page(struct mm_struct * mm,
108 struct vm_area_struct *vma,
112 if (vma->vm_flags & VM_EXEC) {
113 __load_new_mm_context(mm);
120 ev5_flush_tlb_current_page(struct mm_struct * mm,
121 struct vm_area_struct *vma,
124 if (vma->vm_flags & VM_EXEC)
125 __load_new_mm_context(mm);
131 #ifdef CONFIG_ALPHA_GENERIC
132 # define flush_tlb_current alpha_mv.mv_flush_tlb_current
133 # define flush_tlb_current_page alpha_mv.mv_flush_tlb_current_page
135 # ifdef CONFIG_ALPHA_EV4
136 # define flush_tlb_current ev4_flush_tlb_current
137 # define flush_tlb_current_page ev4_flush_tlb_current_page
139 # define flush_tlb_current ev5_flush_tlb_current
140 # define flush_tlb_current_page ev5_flush_tlb_current_page
144 #ifdef __MMU_EXTERN_INLINE
145 #undef __EXTERN_INLINE
146 #undef __MMU_EXTERN_INLINE
150 * Flush current user mapping.
152 static inline void flush_tlb(void)
154 flush_tlb_current(current->active_mm);
158 * Flush a specified range of user mapping page tables
160 * Although Alpha uses VPTE caches, this can be a nop, as Alpha does
161 * not have finegrained tlb flushing, so it will flush VPTE stuff
162 * during next flush_tlb_range.
164 static inline void flush_tlb_pgtables(struct mm_struct *mm,
165 unsigned long start, unsigned long end)
171 * Flush everything (kernel mapping may also have
172 * changed due to vmalloc/vfree)
174 static inline void flush_tlb_all(void)
180 * Flush a specified user mapping
182 static inline void flush_tlb_mm(struct mm_struct *mm)
184 if (mm == current->active_mm)
185 flush_tlb_current(mm);
191 * Page-granular tlb flush.
193 * do a tbisd (type = 2) normally, and a tbis (type = 3)
194 * if it is an executable mapping. We want to avoid the
195 * itlb flush, because that potentially also does a
198 static inline void flush_tlb_page(struct vm_area_struct *vma,
201 struct mm_struct * mm = vma->vm_mm;
203 if (mm == current->active_mm)
204 flush_tlb_current_page(mm, vma, addr);
210 * Flush a specified range of user mapping: on the
211 * Alpha we flush the whole user tlb.
213 static inline void flush_tlb_range(struct mm_struct *mm,
214 unsigned long start, unsigned long end)
219 #else /* CONFIG_SMP */
221 extern void flush_tlb_all(void);
222 extern void flush_tlb_mm(struct mm_struct *);
223 extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
224 extern void flush_tlb_range(struct mm_struct *, unsigned long, unsigned long);
226 #endif /* CONFIG_SMP */
229 * Allocate and free page tables. The xxx_kernel() versions are
230 * used to allocate a kernel page table - this turns on ASN bits
234 extern struct pgtable_cache_struct {
235 unsigned long *pgd_cache;
236 unsigned long *pmd_cache;
237 unsigned long *pte_cache;
238 unsigned long pgtable_cache_sz;
242 #define quicklists cpu_data[smp_processor_id()]
244 #define pgd_quicklist (quicklists.pgd_cache)
245 #define pmd_quicklist (quicklists.pmd_cache)
246 #define pte_quicklist (quicklists.pte_cache)
247 #define pgtable_cache_size (quicklists.pgtable_cache_sz)
249 #define pmd_populate(mm, pmd, pte) pmd_set(pmd, pte)
250 #define pgd_populate(mm, pgd, pmd) pgd_set(pgd, pmd)
252 extern pgd_t *get_pgd_slow(void);
254 static inline pgd_t *get_pgd_fast(void)
258 if ((ret = pgd_quicklist) != NULL) {
259 pgd_quicklist = (unsigned long *)(*ret);
261 pgtable_cache_size--;
263 ret = (unsigned long *)get_pgd_slow();
267 static inline void free_pgd_fast(pgd_t *pgd)
269 *(unsigned long *)pgd = (unsigned long) pgd_quicklist;
270 pgd_quicklist = (unsigned long *) pgd;
271 pgtable_cache_size++;
274 static inline void free_pgd_slow(pgd_t *pgd)
276 free_page((unsigned long)pgd);
279 static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
281 pmd_t *ret = (pmd_t *)__get_free_page(GFP_KERNEL);
287 static inline pmd_t *pmd_alloc_one_fast(struct mm_struct *mm, unsigned long address)
291 if ((ret = (unsigned long *)pte_quicklist) != NULL) {
292 pte_quicklist = (unsigned long *)(*ret);
294 pgtable_cache_size--;
299 static inline void pmd_free_fast(pmd_t *pmd)
301 *(unsigned long *)pmd = (unsigned long) pte_quicklist;
302 pte_quicklist = (unsigned long *) pmd;
303 pgtable_cache_size++;
306 static inline void pmd_free_slow(pmd_t *pmd)
308 free_page((unsigned long)pmd);
311 static inline pte_t *pte_alloc_one(struct mm_struct *mm, unsigned long address)
313 pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL);
319 static inline pte_t *pte_alloc_one_fast(struct mm_struct *mm, unsigned long address)
323 if ((ret = (unsigned long *)pte_quicklist) != NULL) {
324 pte_quicklist = (unsigned long *)(*ret);
326 pgtable_cache_size--;
331 static inline void pte_free_fast(pte_t *pte)
333 *(unsigned long *)pte = (unsigned long) pte_quicklist;
334 pte_quicklist = (unsigned long *) pte;
335 pgtable_cache_size++;
338 static inline void pte_free_slow(pte_t *pte)
340 free_page((unsigned long)pte);
343 #define pte_free(pte) pte_free_fast(pte)
344 #define pmd_free(pmd) pmd_free_fast(pmd)
345 #define pgd_free(pgd) free_pgd_fast(pgd)
346 #define pgd_alloc(mm) get_pgd_fast()
348 extern int do_check_pgt_cache(int, int);
350 #endif /* _ALPHA_PGALLOC_H */