4 #include <asm/page.h> /* for __va, __pa */
5 #include <asm/svinto.h>
6 #include <linux/sched.h>
7 #include <asm/pgtable.h>
8 #include <linux/config.h>
10 /* Console I/O for simulated etrax100. Use #ifdef so erroneous
11 use will be evident. */
12 #ifdef CONFIG_SVINTO_SIM
13 /* Let's use the ucsim interface since it lets us do write(2, ...) */
14 #define SIMCOUT(s,len) \
15 asm ("moveq 4,$r9 \n\t" \
17 "move.d %0,$r11 \n\t" \
18 "move.d %1,$r12 \n\t" \
24 : : "rm" (s), "rm" (len) : "r9","r10","r11","r12","memory")
25 #define TRACE_ON() __extension__ \
26 ({ int _Foofoo; __asm__ volatile ("bmod [%0],%0" : "=r" (_Foofoo) : "0" \
29 #define TRACE_OFF() do { __asm__ volatile ("bmod [%0],%0" :: "r" (254)); } while (0)
30 #define SIM_END() do { __asm__ volatile ("bmod [%0],%0" :: "r" (28)); } while (0)
31 #define CRIS_CYCLES() __extension__ \
32 ({ unsigned long c; asm ("bmod [%1],%0" : "=r" (c) : "r" (27)); c;})
33 #else /* ! defined CONFIG_SVINTO_SIM */
34 /* FIXME: Is there a reliable cycle counter available in some chip? Use
36 #define CRIS_CYCLES() 0
37 #endif /* ! defined CONFIG_SVINTO_SIM */
39 /* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */
41 extern unsigned long port_g_data_shadow;
42 extern unsigned char port_pa_dir_shadow;
43 extern unsigned char port_pa_data_shadow;
44 extern unsigned char port_pb_i2c_shadow;
45 extern unsigned char port_pb_config_shadow;
46 extern unsigned char port_pb_dir_shadow;
47 extern unsigned char port_pb_data_shadow;
48 extern unsigned long r_timer_ctrl_shadow;
50 extern unsigned long port_cse1_shadow;
51 extern unsigned long port_csp0_shadow;
52 extern unsigned long port_csp4_shadow;
54 extern volatile unsigned long *port_cse1_addr;
55 extern volatile unsigned long *port_csp0_addr;
56 extern volatile unsigned long *port_csp4_addr;
58 /* macro for setting regs through a shadow -
59 * r = register name (like R_PORT_PA_DATA)
60 * s = shadow name (like port_pa_data_shadow)
65 #define REG_SHADOW_SET(r,s,b,v) *r = s = (s & ~(1 << (b))) | ((v) << (b))
67 /* The LED's on various Etrax-based products are set differently. */
69 #if defined(CONFIG_ETRAX_NO_LEDS) || defined(CONFIG_SVINTO_SIM)
70 #undef CONFIG_ETRAX_PA_LEDS
71 #undef CONFIG_ETRAX_PB_LEDS
72 #undef CONFIG_ETRAX_CSP0_LEDS
73 #define LED_NETWORK_SET_G(x)
74 #define LED_NETWORK_SET_R(x)
75 #define LED_ACTIVE_SET_G(x)
76 #define LED_ACTIVE_SET_R(x)
77 #define LED_DISK_WRITE(x)
78 #define LED_DISK_READ(x)
81 #if !defined(CONFIG_ETRAX_CSP0_LEDS)
82 #define LED_BIT_SET(x)
83 #define LED_BIT_CLR(x)
87 #define LED_GREEN 0x01
89 #define LED_ORANGE (LED_GREEN | LED_RED)
91 #if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
92 #define LED_NETWORK_SET(x) \
94 LED_NETWORK_SET_G((x) & LED_GREEN); \
97 #define LED_NETWORK_SET(x) \
99 LED_NETWORK_SET_G((x) & LED_GREEN); \
100 LED_NETWORK_SET_R((x) & LED_RED); \
103 #if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R
104 #define LED_ACTIVE_SET(x) \
106 LED_ACTIVE_SET_G((x) & LED_GREEN); \
109 #define LED_ACTIVE_SET(x) \
111 LED_ACTIVE_SET_G((x) & LED_GREEN); \
112 LED_ACTIVE_SET_R((x) & LED_RED); \
116 #ifdef CONFIG_ETRAX_PA_LEDS
117 #define LED_NETWORK_SET_G(x) \
118 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x))
119 #define LED_NETWORK_SET_R(x) \
120 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x))
121 #define LED_ACTIVE_SET_G(x) \
122 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x))
123 #define LED_ACTIVE_SET_R(x) \
124 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x))
125 #define LED_DISK_WRITE(x) \
127 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
128 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
130 #define LED_DISK_READ(x) \
131 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x))
134 #ifdef CONFIG_ETRAX_PB_LEDS
135 #define LED_NETWORK_SET_G(x) \
136 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x))
137 #define LED_NETWORK_SET_R(x) \
138 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x))
139 #define LED_ACTIVE_SET_G(x) \
140 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x))
141 #define LED_ACTIVE_SET_R(x) \
142 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x))
143 #define LED_DISK_WRITE(x) \
145 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
146 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
148 #define LED_DISK_READ(x) \
149 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x))
152 #ifdef CONFIG_ETRAX_CSP0_LEDS
153 #define CONFIGURABLE_LEDS\
154 ((1 << CONFIG_ETRAX_LED1G ) | (1 << CONFIG_ETRAX_LED1R ) |\
155 (1 << CONFIG_ETRAX_LED2G ) | (1 << CONFIG_ETRAX_LED2R ) |\
156 (1 << CONFIG_ETRAX_LED3G ) | (1 << CONFIG_ETRAX_LED3R ) |\
157 (1 << CONFIG_ETRAX_LED4G ) | (1 << CONFIG_ETRAX_LED4R ) |\
158 (1 << CONFIG_ETRAX_LED5G ) | (1 << CONFIG_ETRAX_LED5R ) |\
159 (1 << CONFIG_ETRAX_LED6G ) | (1 << CONFIG_ETRAX_LED6R ) |\
160 (1 << CONFIG_ETRAX_LED7G ) | (1 << CONFIG_ETRAX_LED7R ) |\
161 (1 << CONFIG_ETRAX_LED8Y ) | (1 << CONFIG_ETRAX_LED9Y ) |\
162 (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\
163 (1 << CONFIG_ETRAX_LED12R ))
165 #define LED_NETWORK_SET_G(x) \
166 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x))
167 #define LED_NETWORK_SET_R(x) \
168 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x))
169 #define LED_ACTIVE_SET_G(x) \
170 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x))
171 #define LED_ACTIVE_SET_R(x) \
172 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x))
173 #define LED_DISK_WRITE(x) \
175 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\
176 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\
178 #define LED_DISK_READ(x) \
179 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x))
180 #define LED_BIT_SET(x)\
182 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
183 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\
185 #define LED_BIT_CLR(x)\
187 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
188 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\
193 #ifdef CONFIG_ETRAX_SOFT_SHUTDOWN
194 #define SOFT_SHUTDOWN() \
195 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_SHUTDOWN_BIT, 1)
197 #define SOFT_SHUTDOWN()
201 * Change virtual addresses to physical addresses and vv.
204 extern inline unsigned long virt_to_phys(volatile void * address)
206 return __pa(address);
209 extern inline void * phys_to_virt(unsigned long address)
211 return __va(address);
214 #define page_to_phys(page) __pa(__page_address(page))
216 extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
218 extern inline void * ioremap (unsigned long offset, unsigned long size)
220 return __ioremap(offset, size, 0);
223 extern void iounmap(void *addr);
226 * IO bus memory addresses are also 1:1 with the physical address
228 #define virt_to_bus virt_to_phys
229 #define bus_to_virt phys_to_virt
232 * readX/writeX() are used to access memory mapped devices. On some
233 * architectures the memory mapped IO stuff needs to be accessed
234 * differently. On the CRIS architecture, we just read/write the
235 * memory location directly.
237 #define readb(addr) (*(volatile unsigned char *) (addr))
238 #define readw(addr) (*(volatile unsigned short *) (addr))
239 #define readl(addr) (*(volatile unsigned int *) (addr))
241 #define writeb(b,addr) ((*(volatile unsigned char *) (addr)) = (b))
242 #define writew(b,addr) ((*(volatile unsigned short *) (addr)) = (b))
243 #define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b))
245 #define memset_io(a,b,c) memset((void *)(a),(b),(c))
246 #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
247 #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
250 * Again, CRIS does not require mem IO specific function.
253 #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void *)(b),(c),(d))
255 /* The following is junk needed for the arch-independant code but which
256 * we never use in the CRIS port
259 #define IO_SPACE_LIMIT 0xffff