2 * Machine dependent access functions for RTC registers.
4 #ifndef _ASM_MC146818RTC_H
5 #define _ASM_MC146818RTC_H
9 #define RTC_ALWAYS_BCD 1
11 /* FIXME:RTC Interrupt feature is not implemented yet. */
16 #define RTC_PORT(n) (R64CNT+(n)*2)
17 #define CMOS_READ(addr) __CMOS_READ(addr,b)
18 #define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,b)
20 #elif defined(__SH4__)
21 #define RTC_PORT(n) (R64CNT+(n)*4)
22 #define CMOS_READ(addr) __CMOS_READ(addr,w)
23 #define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,w)
26 #define __CMOS_READ(addr, s) ({ \
27 unsigned char val=0, rcr1, rcr2, r64cnt, retry; \
30 val = ctrl_inb(RSECCNT); \
32 case RTC_SECONDS_ALARM: \
33 val = ctrl_inb(RSECAR); \
36 val = ctrl_inb(RMINCNT); \
38 case RTC_MINUTES_ALARM: \
39 val = ctrl_inb(RMINAR); \
42 val = ctrl_inb(RHRCNT); \
44 case RTC_HOURS_ALARM: \
45 val = ctrl_inb(RHRAR); \
47 case RTC_DAY_OF_WEEK: \
48 val = ctrl_inb(RWKCNT); \
50 case RTC_DAY_OF_MONTH: \
51 val = ctrl_inb(RDAYCNT); \
54 val = ctrl_inb(RMONCNT); \
57 val = ctrl_in##s(RYRCNT); \
59 case RTC_REG_A: /* RTC_FREQ_SELECT */ \
60 rcr2 = ctrl_inb(RCR2); \
61 val = (rcr2 & RCR2_PESMASK) >> 4; \
62 rcr1 = ctrl_inb(RCR1); \
63 rcr1 = (rcr1 & (RCR1_CIE | RCR1_AIE)) | RCR1_AF;\
66 ctrl_outb(rcr1, RCR1); /* clear CF */ \
67 r64cnt = ctrl_inb(R64CNT); \
68 } while((ctrl_inb(RCR1) & RCR1_CF) && retry++ < 1000);\
69 r64cnt ^= RTC_BIT_INVERTED; \
70 if(r64cnt == 0x7f || r64cnt == 0) \
73 case RTC_REG_B: /* RTC_CONTROL */ \
74 rcr1 = ctrl_inb(RCR1); \
75 rcr2 = ctrl_inb(RCR2); \
76 if(rcr1 & RCR1_CIE) val |= RTC_UIE; \
77 if(rcr1 & RCR1_AIE) val |= RTC_AIE; \
78 if(rcr2 & RCR2_PESMASK) val |= RTC_PIE; \
79 if(!(rcr2 & RCR2_START))val |= RTC_SET; \
82 case RTC_REG_C: /* RTC_INTR_FLAGS */ \
83 rcr1 = ctrl_inb(RCR1); \
84 rcr1 &= ~(RCR1_CF | RCR1_AF); \
85 ctrl_outb(rcr1, RCR1); \
86 rcr2 = ctrl_inb(RCR2); \
88 ctrl_outb(rcr2, RCR2); \
90 case RTC_REG_D: /* RTC_VALID */ \
91 /* Always valid ... */ \
100 #define __CMOS_WRITE(val, addr, s) ({ \
101 unsigned char rcr1,rcr2; \
104 ctrl_outb(val, RSECCNT); \
106 case RTC_SECONDS_ALARM: \
107 ctrl_outb(val, RSECAR); \
110 ctrl_outb(val, RMINCNT); \
112 case RTC_MINUTES_ALARM: \
113 ctrl_outb(val, RMINAR); \
116 ctrl_outb(val, RHRCNT); \
118 case RTC_HOURS_ALARM: \
119 ctrl_outb(val, RHRAR); \
121 case RTC_DAY_OF_WEEK: \
122 ctrl_outb(val, RWKCNT); \
124 case RTC_DAY_OF_MONTH: \
125 ctrl_outb(val, RDAYCNT); \
128 ctrl_outb(val, RMONCNT); \
131 ctrl_out##s((ctrl_in##s(RYRCNT) & 0xff00) | (val & 0xff), RYRCNT);\
133 case RTC_REG_A: /* RTC_FREQ_SELECT */ \
134 rcr2 = ctrl_inb(RCR2); \
135 if((val & RTC_DIV_CTL) == RTC_DIV_RESET2) \
136 rcr2 |= RCR2_RESET; \
137 ctrl_outb(rcr2, RCR2); \
139 case RTC_REG_B: /* RTC_CONTROL */ \
140 rcr1 = (ctrl_inb(RCR1) & 0x99) | RCR1_AF; \
141 if(val & RTC_AIE) rcr1 |= RCR1_AIE; \
142 else rcr1 &= ~RCR1_AIE; \
143 if(val & RTC_UIE) rcr1 |= RCR1_CIE; \
144 else rcr1 &= ~RCR1_CIE; \
145 ctrl_outb(rcr1, RCR1); \
146 rcr2 = ctrl_inb(RCR2); \
147 if(val & RTC_SET) rcr2 &= ~RCR2_START; \
148 else rcr2 |= RCR2_START; \
149 ctrl_outb(rcr2, RCR2); \
151 case RTC_REG_C: /* RTC_INTR_FLAGS */ \
153 case RTC_REG_D: /* RTC_VALID */ \
159 #endif /* _ASM_MC146818RTC_H */