2 * linux/arch/alpha/kernel/sys_sx164.c
4 * Copyright (C) 1995 David A Rusling
5 * Copyright (C) 1996 Jay A Estabrook
6 * Copyright (C) 1998, 1999, 2000 Richard Henderson
8 * Code supporting the SX164 (PCA56+PYXIS).
11 #include <linux/kernel.h>
12 #include <linux/types.h>
14 #include <linux/sched.h>
15 #include <linux/pci.h>
16 #include <linux/init.h>
18 #include <asm/ptrace.h>
19 #include <asm/system.h>
22 #include <asm/bitops.h>
23 #include <asm/mmu_context.h>
25 #include <asm/pgtable.h>
26 #include <asm/core_cia.h>
27 #include <asm/hwrpb.h>
32 #include "machvec_impl.h"
38 outb(0, DMA1_RESET_REG);
39 outb(0, DMA2_RESET_REG);
40 outb(DMA_MODE_CASCADE, DMA2_MODE_REG);
41 outb(0, DMA2_MASK_REG);
44 alpha_mv.device_interrupt = srm_device_interrupt;
48 /* Not interested in the bogus interrupts (0,3,4,5,40-47),
49 NMI (1), or HALT (2). */
51 init_srm_irqs(40, 0x3f0000);
53 init_pyxis_irqs(0xff00003f0000);
55 setup_irq(16+6, &timer_cascade_irqaction);
59 * PCI Fixup configuration.
61 * Summary @ PYXIS_INT_REQ:
69 * 6 Interval timer (RTC)
71 * 8 Interrupt Line A from slot 3
72 * 9 Interrupt Line A from slot 2
73 *10 Interrupt Line A from slot 1
74 *11 Interrupt Line A from slot 0
75 *12 Interrupt Line B from slot 3
76 *13 Interrupt Line B from slot 2
77 *14 Interrupt Line B from slot 1
78 *15 Interrupt line B from slot 0
79 *16 Interrupt Line C from slot 3
80 *17 Interrupt Line C from slot 2
81 *18 Interrupt Line C from slot 1
82 *19 Interrupt Line C from slot 0
83 *20 Interrupt Line D from slot 3
84 *21 Interrupt Line D from slot 2
85 *22 Interrupt Line D from slot 1
86 *23 Interrupt Line D from slot 0
89 * 5 32 bit PCI option slot 2
90 * 6 64 bit PCI option slot 0
91 * 7 64 bit PCI option slot 1
93 * 9 32 bit PCI option slot 3
97 sx164_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
99 static char irq_tab[5][5] __initdata = {
100 /*INT INTA INTB INTC INTD */
101 { 16+ 9, 16+ 9, 16+13, 16+17, 16+21}, /* IdSel 5 slot 2 J17 */
102 { 16+11, 16+11, 16+15, 16+19, 16+23}, /* IdSel 6 slot 0 J19 */
103 { 16+10, 16+10, 16+14, 16+18, 16+22}, /* IdSel 7 slot 1 J18 */
104 { -1, -1, -1, -1, -1}, /* IdSel 8 SIO */
105 { 16+ 8, 16+ 8, 16+12, 16+16, 16+20} /* IdSel 9 slot 3 J15 */
107 const long min_idsel = 5, max_idsel = 9, irqs_per_slot = 5;
108 return COMMON_TABLE_LOOKUP;
119 sx164_init_arch(void)
122 * OSF palcode v1.23 forgets to enable PCA56 Motion Video
123 * Instructions. Let's enable it.
124 * We have to check palcode revision because CSERVE interface
125 * is subject to change without notice. For example, it
126 * has been changed completely since v1.16 (found in MILO
127 * distribution). -ink
129 struct percpu_struct *cpu = (struct percpu_struct*)
130 ((char*)hwrpb + hwrpb->processor_offset);
132 if (amask(AMASK_MAX) != 0
134 && (cpu->pal_revision & 0xffff) == 0x117) {
135 __asm__ __volatile__(
137 "call_pal 9\n" /* Allow PALRES insns in kernel mode */
138 ".long 0x64000118\n\n" /* hw_mfpr $0,icsr */
139 "ldah $16,(1<<(19-16))($31)\n"
140 "or $0,$16,$0\n" /* set MVE bit */
141 ".long 0x74000118\n" /* hw_mtpr $0,icsr */
143 "call_pal 9" /* Disable PALRES insns */
145 printk("PCA56 MVI set enabled\n");
155 struct alpha_machine_vector sx164_mv __initmv = {
156 vector_name: "SX164",
161 machine_check: cia_machine_check,
162 max_dma_address: ALPHA_MAX_DMA_ADDRESS,
163 min_io_address: DEFAULT_IO_BASE,
164 min_mem_address: DEFAULT_MEM_BASE,
165 pci_dac_offset: PYXIS_DAC_OFFSET,
168 device_interrupt: pyxis_device_interrupt,
170 init_arch: sx164_init_arch,
171 init_irq: sx164_init_irq,
172 init_rtc: common_init_rtc,
173 init_pci: sx164_init_pci,
174 kill_arch: cia_kill_arch,
175 pci_map_irq: sx164_map_irq,
176 pci_swizzle: common_swizzle,