2 * Low-Level PCI Access for i386 machines.
4 * (c) 1999 Martin Mares <mj@ucw.cz>
10 #define DBG(x...) printk(x)
15 #define PCI_PROBE_BIOS 0x0001
16 #define PCI_PROBE_CONF1 0x0002
17 #define PCI_PROBE_CONF2 0x0004
18 #define PCI_NO_SORT 0x0100
19 #define PCI_BIOS_SORT 0x0200
20 #define PCI_NO_CHECKS 0x0400
21 #define PCI_ASSIGN_ROMS 0x1000
22 #define PCI_BIOS_IRQ_SCAN 0x2000
23 #define PCI_ASSIGN_ALL_BUSSES 0x4000
25 extern unsigned int pci_probe;
29 extern unsigned int pcibios_max_latency;
30 extern u8 pci_cache_line_size;
32 void pcibios_resource_survey(void);
33 void pcibios_set_cacheline_size(void);
34 int pcibios_enable_resources(struct pci_dev *, int);
38 extern int pcibios_last_bus;
39 extern struct pci_bus *pci_root_bus;
40 extern struct pci_ops *pci_root_ops;
45 u8 bus, devfn; /* Bus, device and function */
47 u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
48 u16 bitmap; /* Available IRQs */
49 } __attribute__((packed)) irq[4];
50 u8 slot; /* Slot number, 0=onboard */
52 } __attribute__((packed));
54 struct irq_routing_table {
55 u32 signature; /* PIRQ_SIGNATURE should be here */
56 u16 version; /* PIRQ_VERSION */
57 u16 size; /* Table size in bytes */
58 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
59 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
60 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
61 u32 miniport_data; /* Crap */
63 u8 checksum; /* Modulo 256 checksum must give zero */
64 struct irq_info slots[0];
65 } __attribute__((packed));
67 extern unsigned int pcibios_irq_mask;
69 void pcibios_irq_init(void);
70 void pcibios_fixup_irqs(void);
71 void pcibios_enable_irq(struct pci_dev *dev);