3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Au1x00 board setup.
6 * Copyright 2000 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 #include <linux/config.h>
31 #include <linux/init.h>
32 #include <linux/sched.h>
33 #include <linux/ioport.h>
35 #include <linux/console.h>
36 #include <linux/mc146818rtc.h>
37 #include <linux/delay.h>
40 #include <asm/bootinfo.h>
42 #include <asm/keyboard.h>
43 #include <asm/mipsregs.h>
44 #include <asm/reboot.h>
45 #include <asm/pgtable.h>
46 #include <asm/au1000.h>
49 #ifdef CONFIG_BLK_DEV_INITRD
50 extern unsigned long initrd_start, initrd_end;
51 extern void * __rd_start, * __rd_end;
54 #ifdef CONFIG_BLK_DEV_IDE
55 extern struct ide_ops no_ide_ops;
56 extern struct ide_ops std_ide_ops;
57 extern struct ide_ops *ide_ops;
60 extern struct rtc_ops no_rtc_ops;
61 extern char * __init prom_getcmdline(void);
62 extern void __init board_setup(void);
63 extern void au1000_restart(char *);
64 extern void au1000_halt(void);
65 extern void au1000_power_off(void);
66 extern struct resource ioport_resource;
67 extern struct resource iomem_resource;
68 #if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
69 extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size);
70 static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size);
72 extern void au1xxx_time_init(void);
73 extern void au1xxx_timer_setup(void);
74 extern void set_cpuspec(void);
76 void __init au1x00_setup(void)
80 unsigned long prid, cpupll, bclk;
85 board_setup(); /* board specific setup */
87 prid = read_c0_prid();
88 cpupll = (au_readl(0xB1900060) & 0x3F) * 12;
90 printk("%s (PRId %08X) @ %dMHZ\n", sp->cpu_name, prid, cpupll);
94 /* Enable BCLK switching */
95 bclk = au_readl(0xB190003C);
96 au_writel(bclk | 0x60, 0xB190003C);
97 printk("BCLK switching enabled!\n");
101 /* Various early Au1000 Errata corrected by this */
102 set_c0_config(1<<19); /* Set Config[OD] */
105 /* Clear to obtain best system bus performance */
106 clear_c0_config(1<<19); /* Clear Config[OD] */
109 argptr = prom_getcmdline();
111 #ifdef CONFIG_AU1X00_SERIAL_CONSOLE
112 if ((argptr = strstr(argptr, "console=")) == NULL) {
113 argptr = prom_getcmdline();
114 strcat(argptr, " console=ttyS0,115200");
118 #ifdef CONFIG_FB_AU1100
119 if ((argptr = strstr(argptr, "video=")) == NULL) {
120 argptr = prom_getcmdline();
122 //strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");
123 #ifdef CONFIG_MIPS_HYDROGEN3
124 strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor");
126 strcat(argptr, " video=au1100fb:panel:s10,nohwcursor");
131 #ifdef CONFIG_FB_E1356
132 if ((argptr = strstr(argptr, "video=")) == NULL) {
133 argptr = prom_getcmdline();
134 #ifdef CONFIG_MIPS_PB1000
135 strcat(argptr, " video=e1356fb:system:pb1000,mmunalign:1");
137 strcat(argptr, " video=e1356fb:system:pb1500");
142 #ifdef CONFIG_FB_XPERT98
143 if ((argptr = strstr(argptr, "video=")) == NULL) {
144 argptr = prom_getcmdline();
145 strcat(argptr, " video=atyfb:1024x768-8@70");
149 #if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
150 // au1000 does not support vra, au1500 and au1100 do
151 strcat(argptr, " au1000_audio=vra");
152 argptr = prom_getcmdline();
154 _machine_restart = au1000_restart;
155 _machine_halt = au1000_halt;
156 _machine_power_off = au1000_power_off;
157 #if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
158 fixup_bigphys_addr = au1500_fixup_bigphys_addr;
161 board_time_init = au1xxx_time_init;
162 board_timer_setup = au1xxx_timer_setup;
166 ioport_resource.start = IOPORT_RESOURCE_START;
167 ioport_resource.end = IOPORT_RESOURCE_END;
168 iomem_resource.start = IOMEM_RESOURCE_START;
169 iomem_resource.end = IOMEM_RESOURCE_END;
171 #ifdef CONFIG_BLK_DEV_INITRD
172 ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
173 initrd_start = (unsigned long)&__rd_start;
174 initrd_end = (unsigned long)&__rd_end;
177 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
178 #ifdef CONFIG_USB_OHCI
179 if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
181 argptr = prom_getcmdline();
182 memset(usb_args, 0, sizeof(usb_args));
183 sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
184 USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
185 strcat(argptr, usb_args);
189 #ifdef CONFIG_USB_OHCI
190 // enable host controller and wait for reset done
191 au_writel(0x08, USB_HOST_CONFIG);
193 au_writel(0x0E, USB_HOST_CONFIG);
195 au_readl(USB_HOST_CONFIG); // throw away first read
196 while (!(au_readl(USB_HOST_CONFIG) & 0x10))
197 au_readl(USB_HOST_CONFIG);
199 #endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
202 // Needed if PCI video card in use
203 conswitchp = &dummy_con;
206 #ifndef CONFIG_SERIAL_NONSTANDARD
207 /* don't touch the default serial console */
208 au_writel(0, UART0_ADDR + UART_CLK);
211 #ifdef CONFIG_BLK_DEV_IDE
212 /* Board setup takes precedence for unique devices.
214 if ((ide_ops == NULL) || (ide_ops == &no_ide_ops))
215 ide_ops = &std_ide_ops;
218 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
219 au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
221 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
222 au_writel(0, SYS_TOYTRIM);
225 #if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
226 /* This routine should be valid for all Au1500 based boards */
227 static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size)
229 u32 pci_start = (u32)Au1500_PCI_MEM_START;
230 u32 pci_end = (u32)Au1500_PCI_MEM_END;
232 /* Don't fixup 36 bit addresses */
233 if ((phys_addr >> 32) != 0) return phys_addr;
235 /* check for pci memory window */
236 if ((phys_addr >= pci_start) && ((phys_addr + size) < pci_end)) {
237 return (phys_t)((phys_addr - pci_start) +
238 Au1500_PCI_MEM_START);