2 * arch/ppc/platforms/setup.c
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Synergy Microsystems board support by Dan Cox (dan@synergymicro.com)
11 #include <linux/config.h>
12 #include <linux/stddef.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/errno.h>
16 #include <linux/reboot.h>
17 #include <linux/pci.h>
18 #include <linux/time.h>
19 #include <linux/kdev_t.h>
20 #include <linux/types.h>
21 #include <linux/major.h>
22 #include <linux/blk.h>
23 #include <linux/console.h>
24 #include <linux/irq.h>
25 #include <linux/seq_file.h>
27 #include <asm/system.h>
28 #include <asm/pgtable.h>
32 #include <asm/m48t35.h>
33 #include <platforms/gemini.h>
35 #include <asm/open_pic.h>
36 #include <asm/bootinfo.h>
37 #include <asm/hardirq.h> /* for heartbeat */
39 void gemini_find_bridges(void);
40 static int gemini_get_clock_speed(void);
41 extern void gemini_pcibios_fixup(void);
43 static char *gemini_board_families[] = {
44 "VGM", "VSS", "KGM", "VGR", "VCM", "VCS", "KCM", "VCR"
46 static int gemini_board_count = sizeof(gemini_board_families) /
47 sizeof(gemini_board_families[0]);
49 static unsigned int cpu_7xx[16] = {
50 0, 15, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0
52 static unsigned int cpu_6xx[16] = {
53 0, 0, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 0, 12, 7, 0
57 * prom_init is the Gemini version of prom.c:prom_init. We only need
58 * the BSS clearing code, so I copied that out of prom.c. This is a
59 * lot simpler than hacking prom.c so it will build with Gemini. -VAL
62 #define PTRRELOC(x) ((typeof(x))((unsigned long)(x) + offset))
67 unsigned long offset = reloc_offset();
69 extern char __bss_start, _end;
71 /* First zero the BSS -- use memset, some arches don't have
73 memset_io(PTRRELOC(&__bss_start),0 , &_end - &__bss_start);
76 phys = offset + KERNELBASE;
84 gemini_show_cpuinfo(struct seq_file *m)
86 unsigned char reg, rev;
90 reg = readb(GEMINI_FEAT);
91 family = gemini_board_families[((reg>>4) & 0xf)];
92 if (((reg>>4) & 0xf) > gemini_board_count)
93 printk(KERN_ERR "cpuinfo(): unable to determine board family\n");
95 reg = readb(GEMINI_BREV);
96 type = (reg>>4) & 0xf;
99 reg = readb(GEMINI_BECO);
101 seq_printf(m, "machine\t\t: Gemini %s%d, rev %c, eco %d\n",
102 family, type, (rev + 'A'), (reg & 0xf));
104 seq_printf(m, "board\t\t: Gemini %s", family);
106 seq_printf(m, "%c", (type - 10) + 'A');
108 seq_printf(m, "%d", type);
110 seq_printf(m, ", rev %c, eco %d\n", (rev + 'A'), (reg & 0xf));
112 seq_printf(m, "clock\t\t: %dMhz\n", gemini_get_clock_speed());
117 static u_char gemini_openpic_initsenses[] = {
118 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 0 */
119 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 1 */
120 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 2 */
121 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 3 */
122 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 4 */
123 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 5 */
124 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 6 */
125 /* remainder are level-triggered */
128 #define GEMINI_MPIC_ADDR (0xfcfc0000)
129 #define GEMINI_MPIC_PCI_CFG (0x80005800)
131 void __init gemini_openpic_init(void)
134 OpenPIC_Addr = (volatile struct OpenPIC *)
135 grackle_read(GEMINI_MPIC_PCI_CFG + 0x10);
136 OpenPIC_InitSenses = gemini_openpic_initsenses;
137 OpenPIC_NumInitSenses = sizeof( gemini_openpic_initsenses );
139 ioremap( GEMINI_MPIC_ADDR, OPENPIC_SIZE);
143 extern unsigned long loops_per_jiffy;
144 extern int root_mountflags;
145 extern char cmd_line[];
148 gemini_heartbeat(void)
150 static unsigned long led = GEMINI_LEDBASE+(4*8);
151 static char direction = 8;
153 /* We only want to do this on 1 CPU */
154 if (smp_processor_id()) {
155 static short ratelimit;
157 printk(KERN_ERR "%s: unexpected heartbeat on cpu %d\n",
158 __FUNCTION__, smp_processor_id());
162 if ( (led + direction) > (GEMINI_LEDBASE+(7*8)) ||
163 (led + direction) < (GEMINI_LEDBASE+(4*8)) )
169 void __init gemini_setup_arch(void)
171 extern char cmd_line[];
174 loops_per_jiffy = 50000000/HZ;
176 #ifdef CONFIG_BLK_DEV_INITRD
177 /* bootable off CDROM */
179 ROOT_DEV = MKDEV(SCSI_CDROM_MAJOR, 0);
182 ROOT_DEV = to_kdev_t(0x0801);
184 /* nothing but serial consoles... */
185 sprintf(cmd_line, "%s console=ttyS0", cmd_line);
187 printk("Boot arguments: %s\n", cmd_line);
189 ppc_md.heartbeat = gemini_heartbeat;
190 /* only run on cpu 0 */
191 heartbeat_reset(0) = HZ/8;
192 heartbeat_count(0) = 1;
194 /* Lookup PCI hosts */
195 gemini_find_bridges();
196 /* take special pains to map the MPIC, since it isn't mapped yet */
197 gemini_openpic_init();
204 gemini_get_clock_speed(void)
206 unsigned long hid1, pvr;
210 hid1 = (mfspr(HID1) >> 28) & 0xf;
211 if (PVR_VER(pvr) == 8 ||
213 hid1 = cpu_7xx[hid1];
215 hid1 = cpu_6xx[hid1];
217 switch((readb(GEMINI_BSTAT) & 0xc) >> 2) {
221 clock = (hid1*100)/3;
225 clock = (hid1*125)/3;
236 void __init gemini_init_l2(void)
238 unsigned char reg, brev, fam, creg;
242 reg = readb(GEMINI_L2CFG);
243 brev = readb(GEMINI_BREV);
244 fam = readb(GEMINI_FEAT);
247 switch(PVR_VER(pvr)) {
251 cache = (((reg >> 6) & 0x3) << 28);
256 /* Pre-3.0 processor revs had snooping errata. Leave
257 their L2's disabled with SMP. -- Dan */
258 if (PVR_CFG(pvr) < 3) {
259 printk("Pre-3.0 750; L2 left disabled!\n");
262 #endif /* CONFIG_SMP */
264 /* Special case: VGM5-B's came before L2 ratios were set on
265 the board. Processor speed shouldn't be too high, so
266 set L2 ratio to 1:1.5. */
267 if ((brev == 0x51) && ((fam & 0xa0) >> 4) == 0)
270 /* determine best cache ratio based upon what the board
271 tells us (which sometimes _may_ not be true) and
272 the processor speed. */
274 if (gemini_get_clock_speed() > 250)
280 static unsigned long l2_size_val = 0;
283 l2_size_val = _get_L2CR();
289 creg = readb(GEMINI_CPUSTAT);
290 if (((creg & 0xc) >> 2) != 1)
291 printk("Dual-604 boards don't support the use of L2\n");
293 writeb(1, GEMINI_L2CFG);
296 printk("Unknown processor; L2 left disabled\n");
300 cache |= ((1<<reg) << 25);
301 cache |= (L2CR_L2RAM_MASK|L2CR_L2CTL|L2CR_L2DO);
303 _set_L2CR(cache | L2CR_L2E);
308 gemini_restart(char *cmd)
311 /* make a clean restart, not via the MPIC */
317 gemini_power_off(void)
325 gemini_restart(NULL);
328 void __init gemini_init_IRQ(void)
330 /* gemini has no 8259 */
334 #define gemini_rtc_read(x) (readb(GEMINI_RTC+(x)))
335 #define gemini_rtc_write(val,x) (writeb((val),(GEMINI_RTC+(x))))
337 /* ensure that the RTC is up and running */
338 long __init gemini_time_init(void)
342 reg = gemini_rtc_read(M48T35_RTC_CONTROL);
344 if ( reg & M48T35_RTC_STOPPED ) {
345 printk(KERN_INFO "M48T35 real-time-clock was stopped. Now starting...\n");
346 gemini_rtc_write((reg & ~(M48T35_RTC_STOPPED)), M48T35_RTC_CONTROL);
347 gemini_rtc_write((reg | M48T35_RTC_SET), M48T35_RTC_CONTROL);
355 gemini_get_rtc_time(void)
357 unsigned int year, mon, day, hour, min, sec;
360 reg = gemini_rtc_read(M48T35_RTC_CONTROL);
361 gemini_rtc_write((reg|M48T35_RTC_READ), M48T35_RTC_CONTROL);
363 printk("get rtc: reg = %x\n", reg);
367 sec = gemini_rtc_read(M48T35_RTC_SECONDS);
368 min = gemini_rtc_read(M48T35_RTC_MINUTES);
369 hour = gemini_rtc_read(M48T35_RTC_HOURS);
370 day = gemini_rtc_read(M48T35_RTC_DOM);
371 mon = gemini_rtc_read(M48T35_RTC_MONTH);
372 year = gemini_rtc_read(M48T35_RTC_YEAR);
373 } while( sec != gemini_rtc_read(M48T35_RTC_SECONDS));
375 printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n",
376 sec, min, hour, day, mon, year);
379 gemini_rtc_write(reg, M48T35_RTC_CONTROL);
388 if ((year += 1900) < 1970)
391 printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n",
392 sec, min, hour, day, mon, year);
395 return mktime( year, mon, day, hour, min, sec );
400 gemini_set_rtc_time( unsigned long now )
407 reg = gemini_rtc_read(M48T35_RTC_CONTROL);
409 printk("set rtc: reg = %x\n", reg);
412 gemini_rtc_write((reg|M48T35_RTC_SET), M48T35_RTC_CONTROL);
414 printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n",
415 tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year);
419 BIN_TO_BCD(tm.tm_sec);
420 BIN_TO_BCD(tm.tm_min);
421 BIN_TO_BCD(tm.tm_hour);
422 BIN_TO_BCD(tm.tm_mon);
423 BIN_TO_BCD(tm.tm_mday);
424 BIN_TO_BCD(tm.tm_year);
426 printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n",
427 tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year);
430 gemini_rtc_write(tm.tm_sec, M48T35_RTC_SECONDS);
431 gemini_rtc_write(tm.tm_min, M48T35_RTC_MINUTES);
432 gemini_rtc_write(tm.tm_hour, M48T35_RTC_HOURS);
433 gemini_rtc_write(tm.tm_mday, M48T35_RTC_DOM);
434 gemini_rtc_write(tm.tm_mon, M48T35_RTC_MONTH);
435 gemini_rtc_write(tm.tm_year, M48T35_RTC_YEAR);
438 gemini_rtc_write(reg, M48T35_RTC_CONTROL);
440 if ((time_state == TIME_ERROR) || (time_state == TIME_BAD))
441 time_state = TIME_OK;
446 /* use the RTC to determine the decrementer count */
447 void __init gemini_calibrate_decr(void)
452 /* determine processor bus speed */
453 reg = readb(GEMINI_BSTAT);
455 switch(((reg & 0x0c)>>2)&0x3) {
470 tb_ticks_per_jiffy = freq / HZ / divisor;
471 tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
474 unsigned long __init gemini_find_end_of_memory(void)
479 reg = readb(GEMINI_MEMCFG);
480 total = ((1<<((reg & 0x7) - 1)) *
481 (8<<((reg >> 3) & 0x7)));
482 total *= (1024*1024);
489 io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
490 io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
495 smp_gemini_probe(void)
499 nr = (readb(GEMINI_CPUSTAT) & GEMINI_CPU_COUNT_MASK) >> 2;
504 openpic_request_IPIs();
505 for (i = 1; i < nr; ++i)
513 smp_gemini_kick_cpu(int nr)
515 openpic_reset_processor_phys(1 << nr);
516 openpic_reset_processor_phys(0);
520 smp_gemini_setup_cpu(int cpu_nr)
523 do_openpic_setup_cpu();
528 static struct smp_ops_t gemini_smp_ops = {
529 smp_openpic_message_pass,
532 smp_gemini_setup_cpu,
534 #endif /* CONFIG_SMP */
536 void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
537 unsigned long r6, unsigned long r7)
541 parse_bootinfo(find_bootinfo());
543 for(i = 0; i < GEMINI_LEDS; i++)
546 ISA_DMA_THRESHOLD = 0;
550 #ifdef CONFIG_BLK_DEV_INITRD
553 initrd_start = r4 + KERNELBASE;
554 initrd_end = r5 + KERNELBASE;
558 ppc_md.setup_arch = gemini_setup_arch;
559 ppc_md.show_cpuinfo = gemini_show_cpuinfo;
560 ppc_md.irq_cannonicalize = NULL;
561 ppc_md.init_IRQ = gemini_init_IRQ;
562 ppc_md.get_irq = openpic_get_irq;
565 ppc_md.restart = gemini_restart;
566 ppc_md.power_off = gemini_power_off;
567 ppc_md.halt = gemini_halt;
569 ppc_md.time_init = gemini_time_init;
570 ppc_md.set_rtc_time = gemini_set_rtc_time;
571 ppc_md.get_rtc_time = gemini_get_rtc_time;
572 ppc_md.calibrate_decr = gemini_calibrate_decr;
574 ppc_md.find_end_of_memory = gemini_find_end_of_memory;
575 ppc_md.setup_io_mappings = gemini_map_io;
577 /* no keyboard/mouse/video stuff yet.. */
578 ppc_md.kbd_setkeycode = NULL;
579 ppc_md.kbd_getkeycode = NULL;
580 ppc_md.kbd_translate = NULL;
581 ppc_md.kbd_unexpected_up = NULL;
582 ppc_md.kbd_leds = NULL;
583 ppc_md.kbd_init_hw = NULL;
584 ppc_md.ppc_kbd_sysrq_xlate = NULL;
585 ppc_md.pcibios_fixup_bus = gemini_pcibios_fixup;
588 ppc_md.smp_ops = &gemini_smp_ops;
589 #endif /* CONFIG_SMP */