arch/ppc/platforms/ibm440gp.c

   1 /*
   2  * arch/ppc/platforms/ibm440gp.c
   3  *
   4  * PPC440GP I/O descriptions
   5  *
   6  * Matt Porter <mporter@mvista.com>
   7  * Copyright 2002-2003 MontaVista Software Inc.
   8  *
   9  * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
  10  * Copyright (c) 2003 Zultys Technologies
  11  *
  12  * This program is free software; you can redistribute  it and/or modify it
  13  * under  the terms of  the GNU General  Public License as published by the
  14  * Free Software Foundation;  either version 2 of the  License, or (at your
  15  * option) any later version.
  16  *
  17  */
  18 #include <linux/init.h>
  19 #include <linux/module.h>
  20 #include <platforms/ibm440gp.h>
  21 #include <asm/ocp.h>
  22
  23 #if defined(EMAC_NUMS) && EMAC_NUMS > 0
  24 u32 emac_phy_map[EMAC_NUMS];
  25 EXPORT_SYMBOL(emac_phy_map);
  26 #endif
  27
  28 static struct ocp_func_emac_data ibm440gp_emac0_def = {
  29         .zmii_idx       = 0,            /* ZMII device index */
  30         .zmii_mux       = 0,            /* ZMII input of this EMAC */
  31         .mal_idx        = 0,            /* MAL device index */
  32         .mal_rx_chan    = 0,            /* MAL rx channel number */
  33         .mal_tx1_chan   = 0,            /* MAL tx channel 1 number */
  34         .mal_tx2_chan   = 1,            /* MAL tx channel 2 number */
  35         .wol_irq        = BL_MAC_WOL,   /* WOL interrupt number */
  36         .mdio_idx       = -1,           /* No shared MDIO */
  37 };
  38
  39 static struct ocp_func_emac_data ibm440gp_emac1_def = {
  40         .zmii_idx       = 0,            /* ZMII device index */
  41         .zmii_mux       = 1,            /* ZMII input of this EMAC */
  42         .mal_idx        = 0,            /* MAL device index */
  43         .mal_rx_chan    = 1,            /* MAL rx channel number */
  44         .mal_tx1_chan   = 2,            /* MAL tx channel 1 number */
  45         .mal_tx2_chan   = 3,            /* MAL tx channel 2 number */
  46         .wol_irq        = BL_MAC_WOL1,   /* WOL interrupt number */
  47         .mdio_idx       = -1,           /* No shared MDIO */
  48 };
  49
  50 static struct ocp_func_mal_data ibm440gp_mal0_def = {
  51         .num_tx_chans   = 2*EMAC_NUMS,  /* Number of TX channels */
  52         .num_rx_chans   = EMAC_NUMS,    /* Number of RX channels */
  53 };
  54
  55 struct ocp_def core_ocp[] __initdata = {
  56         { .vendor       = OCP_VENDOR_IBM,
  57           .function     = OCP_FUNC_OPB,
  58           .index        = 0,
  59           .paddr        = PPC440GP_OPB_BASE_START,
  60           .irq          = OCP_IRQ_NA,
  61           .pm           = OCP_CPM_NA,
  62         },
  63         { .vendor       = OCP_VENDOR_IBM,
  64           .function     = OCP_FUNC_16550,
  65           .index        = 0,
  66           .paddr        = PPC440GP_UART0_ADDR,
  67           .irq          = UART0_INT,
  68           .pm           = IBM_CPM_UART0,
  69         },
  70         { .vendor       = OCP_VENDOR_IBM,
  71           .function     = OCP_FUNC_16550,
  72           .index        = 1,
  73           .paddr        = PPC440GP_UART1_ADDR,
  74           .irq          = UART1_INT,
  75           .pm           = IBM_CPM_UART1,
  76         },
  77         { .vendor       = OCP_VENDOR_IBM,
  78           .function     = OCP_FUNC_IIC,
  79           .index        = 0,
  80           .paddr        = PPC440GP_IIC0_ADDR,
  81           .irq          = IIC0_IRQ,
  82           .pm           = IBM_CPM_IIC0,
  83         },
  84         { .vendor       = OCP_VENDOR_IBM,
  85           .function     = OCP_FUNC_IIC,
  86           .index        = 1,
  87           .paddr        = PPC440GP_IIC1_ADDR,
  88           .irq          = IIC1_IRQ,
  89           .pm           = IBM_CPM_IIC1,
  90         },
  91         { .vendor       = OCP_VENDOR_IBM,
  92           .function     = OCP_FUNC_GPIO,
  93           .index        = 0,
  94           .paddr        = PPC440GP_GPIO0_ADDR,
  95           .irq          = OCP_IRQ_NA,
  96           .pm           = IBM_CPM_GPIO0,
  97         },
  98         { .vendor       = OCP_VENDOR_IBM,
  99           .function     = OCP_FUNC_MAL,
 100           .paddr        = OCP_PADDR_NA,
 101           .irq          = OCP_IRQ_NA,
 102           .pm           = OCP_CPM_NA,
 103           .additions    = &ibm440gp_mal0_def,
 104         },
 105         { .vendor       = OCP_VENDOR_IBM,
 106           .function     = OCP_FUNC_EMAC,
 107           .index        = 0,
 108           .paddr        = PPC440GP_EMAC0_ADDR,
 109           .irq          = BL_MAC_ETH0,
 110           .pm           = OCP_CPM_NA,
 111           .additions    = &ibm440gp_emac0_def,
 112         },
 113         { .vendor       = OCP_VENDOR_IBM,
 114           .function     = OCP_FUNC_EMAC,
 115           .index        = 1,
 116           .paddr        = PPC440GP_EMAC1_ADDR,
 117           .irq          = BL_MAC_ETH1,
 118           .pm           = OCP_CPM_NA,
 119           .additions    = &ibm440gp_emac1_def,
 120         },
 121         { .vendor       = OCP_VENDOR_IBM,
 122           .function     = OCP_FUNC_ZMII,
 123           .paddr        = PPC440GP_ZMII_ADDR,
 124           .irq          = OCP_IRQ_NA,
 125           .pm           = OCP_CPM_NA,
 126         },
 127         { .vendor       = OCP_VENDOR_INVALID
 128         }
 129 };