2 * arch/ppc/platforms/prpmc750_setup.c
4 * Board setup routines for Motorola PrPMC750
6 * Author: Matt Porter <mporter@mvista.com>
8 * 2001-2003 (c) MontaVista, Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
14 #include <linux/config.h>
15 #include <linux/stddef.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/errno.h>
19 #include <linux/reboot.h>
20 #include <linux/pci.h>
21 #include <linux/kdev_t.h>
22 #include <linux/types.h>
23 #include <linux/major.h>
24 #include <linux/blk.h>
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/irq.h>
28 #include <linux/seq_file.h>
29 #include <linux/ide.h>
31 #include <asm/system.h>
32 #include <asm/pgtable.h>
36 #include <asm/machdep.h>
38 #include <platforms/prpmc750.h>
39 #include <asm/open_pic.h>
40 #include <asm/bootinfo.h>
41 #include <asm/pplus.h>
43 #include "prpmc750_serial.h"
45 extern int mpic_init(void);
46 extern unsigned long loops_per_jiffy;
47 extern void gen550_progress(char *, unsigned short);
49 static u_char prpmc750_openpic_initsenses[] __initdata =
51 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT0 */
52 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UART */
53 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_DEBUGINT */
54 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HAWK_WDT */
55 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
56 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_ABORT */
57 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT1 */
58 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT2 */
59 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT3 */
60 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTA */
61 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTB */
62 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTC */
63 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTD */
64 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
65 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
66 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
70 * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
71 * Combined irq tables. Only Base has IDSEL 14, only Carrier has 21 and 22.
74 prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
76 static char pci_irq_table[][4] =
78 * PCI IDSEL/INTPIN->INTLINE
82 {12, 0, 0, 0}, /* IDSEL 14 - Ethernet, base */
83 {0, 0, 0, 0}, /* IDSEL 15 - unused */
84 {10, 11, 12, 9}, /* IDSEL 16 - PMC A1, PMC1 */
85 {10, 11, 12, 9}, /* IDSEL 17 - PrPMC-A-B, PMC2-B */
86 {11, 12, 9, 10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
87 {0, 0, 0, 0}, /* IDSEL 19 - unused */
88 {9, 10, 11, 12}, /* IDSEL 20 - P2P Bridge */
89 {11, 12, 9, 10}, /* IDSEL 21 - PMC A2, carrier */
90 {12, 9, 10, 11}, /* IDSEL 22 - PMC A2-B, carrier */
92 const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
93 return PCI_IRQ_TABLE_LOOKUP;
97 prpmc750_pcibios_fixup(void)
103 * Kludge to clean up after PPC6BUG which doesn't
104 * configure the CL5446 VGA card. Also the
105 * resource subsystem doesn't fixup the
106 * PCI mem resources on the CL5446.
108 if ((dev = pci_find_device(PCI_VENDOR_ID_CIRRUS,
109 PCI_DEVICE_ID_CIRRUS_5446, 0)))
111 dev->resource[0].start += PRPMC750_PCI_PHY_MEM_BASE;
112 dev->resource[0].end += PRPMC750_PCI_PHY_MEM_BASE;
113 pci_read_config_word(dev,
116 pci_write_config_word(dev,
119 /* Enable Color mode in MISC reg */
121 /* Select DRAM config reg */
123 /* Set proper DRAM config */
129 prpmc750_find_bridges(void)
131 struct pci_controller* hose;
133 hose = pcibios_alloc_controller();
137 hose->first_busno = 0;
138 hose->last_busno = 0xff;
139 hose->pci_mem_offset = PRPMC750_PCI_PHY_MEM_BASE;
141 pci_init_resource(&hose->io_resource,
142 PRPMC750_PCI_LOWER_IO,
143 PRPMC750_PCI_UPPER_IO,
147 pci_init_resource(&hose->mem_resources[0],
148 PRPMC750_PCI_LOWER_MEM + PRPMC750_PCI_PHY_MEM_BASE,
149 PRPMC750_PCI_UPPER_MEM + PRPMC750_PCI_PHY_MEM_BASE,
153 hose->io_space.start = PRPMC750_PCI_LOWER_IO;
154 hose->io_space.end = PRPMC750_PCI_UPPER_IO;
155 hose->mem_space.start = PRPMC750_PCI_LOWER_MEM;
156 hose->mem_space.end = PRPMC750_PCI_UPPER_MEM_AUTO;
158 hose->io_base_virt = (void *)PRPMC750_ISA_IO_BASE;
160 setup_indirect_pci(hose,
161 PRPMC750_PCI_CONFIG_ADDR,
162 PRPMC750_PCI_CONFIG_DATA);
165 * Disable MPIC response to PCI I/O space (BAR 0).
166 * Make MPIC respond to PCI Mem space at specified address.
169 early_write_config_dword(hose,
175 early_write_config_dword(hose,
179 (PRPMC750_HAWK_MPIC_BASE -
180 PRPMC750_PCI_MEM_OFFSET) | 0x0);
182 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
184 ppc_md.pcibios_fixup = prpmc750_pcibios_fixup;
185 ppc_md.pci_swizzle = common_swizzle;
186 ppc_md.pci_map_irq = prpmc_map_irq;
190 prpmc750_show_cpuinfo(struct seq_file *m)
192 seq_printf(m, "machine\t\t: PrPMC750\n");
198 prpmc750_setup_arch(void)
200 /* init to some ~sane value until calibrate_delay() runs */
201 loops_per_jiffy = 50000000/HZ;
203 /* Lookup PCI host bridges */
204 prpmc750_find_bridges();
206 #ifdef CONFIG_BLK_DEV_INITRD
208 ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); /* /dev/ram */
211 #ifdef CONFIG_ROOT_NFS
212 ROOT_DEV = to_kdev_t(0x00ff); /* /dev/nfs pseudo device */
214 ROOT_DEV = to_kdev_t(0x0802); /* /dev/sda2 */
217 #ifdef CONFIG_DUMMY_CONSOLE
218 conswitchp = &dummy_con;
221 /* Find and map our OpenPIC */
222 pplus_mpic_init(PRPMC750_PCI_MEM_OFFSET);
223 OpenPIC_InitSenses = prpmc750_openpic_initsenses;
224 OpenPIC_NumInitSenses = sizeof(prpmc750_openpic_initsenses);
228 * Compute the PrPMC750's bus speed using the baud clock as a
231 static unsigned long __init
232 prpmc750_get_bus_speed(void)
234 unsigned long tbl_start, tbl_end;
235 unsigned long current_state, old_state, bus_speed;
236 unsigned char lcr, dll, dlm;
237 int baud_divisor, count;
239 /* Read the UART's baud clock divisor */
240 lcr = readb(PRPMC750_SERIAL_0_LCR);
241 writeb(lcr | UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR);
242 dll = readb(PRPMC750_SERIAL_0_DLL);
243 dlm = readb(PRPMC750_SERIAL_0_DLM);
244 writeb(lcr & ~UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR);
245 baud_divisor = (dlm << 8) | dll;
248 * Use the baud clock divisor and base baud clock
249 * to determine the baud rate and use that as
250 * the number of baud clock edges we use for
251 * the time base sample. Make it half the baud
254 count = PRPMC750_BASE_BAUD / (baud_divisor * 16);
256 /* Find the first edge of the baud clock */
257 old_state = readb(PRPMC750_STATUS_REG) & PRPMC750_BAUDOUT_MASK;
259 current_state = readb(PRPMC750_STATUS_REG) &
260 PRPMC750_BAUDOUT_MASK;
261 } while(old_state == current_state);
263 old_state = current_state;
265 /* Get the starting time base value */
266 tbl_start = get_tbl();
269 * Loop until we have found a number of edges equal
270 * to half the count (half the baud rate)
274 current_state = readb(PRPMC750_STATUS_REG) &
275 PRPMC750_BAUDOUT_MASK;
276 } while(old_state == current_state);
277 old_state = current_state;
280 /* Get the ending time base value */
283 /* Compute bus speed */
284 bus_speed = (tbl_end-tbl_start)*128;
290 prpmc750_calibrate_decr(void)
295 freq = prpmc750_get_bus_speed();
297 tb_ticks_per_jiffy = freq / (HZ * divisor);
298 tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
302 prpmc750_restart(char *cmd)
305 writeb(PRPMC750_MODRST_MASK, PRPMC750_MODRST_REG);
317 prpmc750_power_off(void)
323 prpmc750_init_IRQ(void)
329 * Set BAT 3 to map 0xf0000000 to end of physical memory space.
331 static __inline__ void
332 prpmc750_set_bat(void)
335 mtspr(DBAT1U, 0xf0001ffe);
336 mtspr(DBAT1L, 0xf000002a);
341 * We need to read the Falcon/Hawk memory controller
342 * to properly determine this value
344 static unsigned long __init
345 prpmc750_find_end_of_memory(void)
347 /* Read the memory size from the Hawk SMC */
348 return pplus_get_mem_size(PRPMC750_HAWK_SMC_BASE);
352 prpmc750_map_io(void)
354 io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
355 io_block_mapping(0xf0000000, 0xc0000000, 0x08000000, _PAGE_IO);
356 io_block_mapping(0xf8000000, 0xf8000000, 0x08000000, _PAGE_IO);
360 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
361 unsigned long r6, unsigned long r7)
363 parse_bootinfo(find_bootinfo());
365 isa_io_base = PRPMC750_ISA_IO_BASE;
366 isa_mem_base = PRPMC750_ISA_MEM_BASE;
367 pci_dram_offset = PRPMC750_SYS_MEM_BASE;
371 ppc_md.setup_arch = prpmc750_setup_arch;
372 ppc_md.show_cpuinfo = prpmc750_show_cpuinfo;
373 ppc_md.init_IRQ = prpmc750_init_IRQ;
374 ppc_md.get_irq = openpic_get_irq;
376 ppc_md.find_end_of_memory = prpmc750_find_end_of_memory;
377 ppc_md.setup_io_mappings = prpmc750_map_io;
379 ppc_md.restart = prpmc750_restart;
380 ppc_md.power_off = prpmc750_power_off;
381 ppc_md.halt = prpmc750_halt;
383 /* PrPMC750 has no timekeeper part */
384 ppc_md.time_init = NULL;
385 ppc_md.get_rtc_time = NULL;
386 ppc_md.set_rtc_time = NULL;
387 ppc_md.calibrate_decr = prpmc750_calibrate_decr;
389 #ifdef CONFIG_SERIAL_TEXT_DEBUG
390 ppc_md.progress = gen550_progress;
391 #endif /* CONFIG_SERIAL_TEXT_DEBUG */