2 * arch/ppc/platforms/sandpoint_pci.c
4 * PCI setup routines for the Motorola SPS Sandpoint Test Platform
6 * Author: Mark A. Greer
9 * Copyright 2000-2002 MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/pci.h>
19 #include <linux/slab.h>
21 #include <asm/byteorder.h>
24 #include <asm/uaccess.h>
25 #include <asm/machdep.h>
26 #include <asm/pci-bridge.h>
27 #include <asm/mpc10x.h>
29 #include "sandpoint.h"
32 * Motorola SPS Sandpoint interrupt routing.
34 #if 0 //REX: by MUSENKI
36 sandpoint_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
38 static char pci_irq_table[][4] =
40 * PCI IDSEL/INTPIN->INTLINE
45 0, 0, 0 }, /* IDSEL 11 - i8259 on Winbond */
46 { 0, 0, 0, 0 }, /* IDSEL 12 - unused */
47 #ifdef CONFIG_SANDPOINT_X3
48 { 17, 18, 19, 20 }, /* IDSEL 13 - PCI slot 1 */
49 { 18, 19, 20, 17 }, /* IDSEL 14 - PCI slot 2 */
50 { 19, 20, 17, 18 }, /* IDSEL 15 - PCI slot 3 */
51 { 20, 17, 18, 19 }, /* IDSEL 16 - PCI slot 4 */
53 { 16, 19, 18, 17 }, /* IDSEL 13 - PCI slot 1 */
54 { 17, 16, 19, 18 }, /* IDSEL 14 - PCI slot 2 */
55 { 18, 17, 16, 19 }, /* IDSEL 15 - PCI slot 3 */
56 { 19, 18, 17, 16 }, /* IDSEL 16 - PCI slot 4 */
60 const long min_idsel = 11, max_idsel = 16, irqs_per_slot = 4;
61 return PCI_IRQ_TABLE_LOOKUP;
64 #if 0 //+Bing modified 11252004
66 sandpoint_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
68 static char pci_irq_table[][4] =
70 * PCI IDSEL/INTPIN->INTLINE
74 { 3, 0, 0, 0 }, /* IDSEL 17 - disable */
75 { 0, 0, 0, 0 }, /* IDSEL 18 - PCI slot1*/
76 { 2, 0, 0, 0 }, /* IDSEL 19 - LAN 83815 */
77 { 1, 0, 4, 0 } /* IDSEL 20 - PCI slot2 */
80 const long min_idsel = 17, max_idsel = 20, irqs_per_slot = 4;
81 return PCI_IRQ_TABLE_LOOKUP;
85 sandpoint_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
87 static char pci_irq_table[][4] =
89 * PCI IDSEL/INTPIN->INTLINE
93 { 0, 0, 0, 0 }, /* IDSEL 13 - mini-PCI */
94 { 1, -1, 2, 0 }, /* IDSEL 14 - NEC USB2.0 */
95 { 3, 0, 0, 0 }, /* IDSEL 15 - ADM983 */
99 const long min_idsel = 13, max_idsel = 16, irqs_per_slot = 4;
100 return PCI_IRQ_TABLE_LOOKUP;
102 #endif //+Bing modified 11252004
106 sandpoint_setup_winbond_83553(struct pci_controller *hose)
111 * Route IDE interrupts directly to the 8259's IRQ 14 & 15.
112 * We can't route the IDE interrupt to PCI INTC# or INTD# because those
113 * woule interfere with the PMC's INTC# and INTD# lines.
118 devfn = PCI_DEVFN(11,0);
120 early_write_config_byte(hose,
123 0x43, /* IDE Interrupt Routing Control */
125 early_write_config_word(hose,
128 0x44, /* PCI Interrupt Routing Control */
131 /* Want ISA memory cycles to be forwarded to PCI bus */
132 early_write_config_byte(hose,
135 0x48, /* ISA-to-PCI Addr Decoder Control */
138 /* Enable RTC and Keyboard address locations. */
139 early_write_config_byte(hose,
142 0x4d, /* Chip Select Control Register */
145 /* Enable Port 92. */
146 early_write_config_byte(hose,
149 0x4e, /* AT System Control Register */
154 devfn = PCI_DEVFN(11,1);
156 /* Put IDE controller into native mode. */
157 early_write_config_byte(hose,
160 0x09, /* Programming interface Register */
163 /* Init IRQ routing, enable both ports, disable fast 16 */
164 early_write_config_dword(hose,
167 0x40, /* IDE Control/Status Register */
173 #ifndef CONFIG_SANDPOINT_X3
174 /* On the sandpoint X2, we must avoid sending configuration cycles to
175 * device #12 (IDSEL addr = AD12).
178 sandpoint_exclude_device(u_char bus, u_char devfn)
181 if ((bus == 0) && (PCI_SLOT(devfn) == SANDPOINT_HOST_BRIDGE_IDSEL))
182 return PCIBIOS_DEVICE_NOT_FOUND;
184 return PCIBIOS_SUCCESSFUL;
187 printk("REX_DBG_PCI: dev-fun is %X:%X.\n",PCI_SLOT(devfn), PCI_FUNC(devfn));
189 if ((bus == 0) && (PCI_SLOT(devfn) == SANDPOINT_HOST_BRIDGE_IDSEL))
191 return PCIBIOS_DEVICE_NOT_FOUND;
195 return PCIBIOS_SUCCESSFUL;
202 sandpoint_find_bridges(void)
204 struct pci_controller *hose;
206 hose = pcibios_alloc_controller();
210 printk("pcibios_alloc_controller alloc memory fail \n");
214 hose->first_busno = 0;
215 hose->last_busno = 0xff;
218 if (mpc10x_bridge_init(hose,
221 MPC10X_MAPB_EUMB_BASE) == 0) {
223 if (mpc10x_bridge_init(hose,
228 /* Do early winbond init, then scan PCI bus */
230 //sandpoint_setup_winbond_83553(hose);
231 #ifndef CONFIG_SANDPOINT_X3
232 ppc_md.pci_exclude_device = sandpoint_exclude_device;
234 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
236 ppc_md.pcibios_fixup = NULL;
237 ppc_md.pcibios_fixup_bus = NULL;
238 ppc_md.pci_swizzle = common_swizzle;
239 ppc_md.pci_map_irq = sandpoint_map_irq;
243 ppc_md.progress("Bridge init failed", 0x100);
244 printk("Host bridge init failed\n");