1 /* $Id: pcic.c,v 1.22.2.1 2002/01/23 14:35:45 davem Exp $
2 * pcic.c: Sparc/PCI controller support
4 * Copyright (C) 1998 V. Roganov and G. Raiko
6 * Code is derived from Ultra/PCI PSYCHO controller support, see that
9 * Support for diverse IIep based platforms by Pete Zaitcev.
10 * CP-1200 by Eric Brower.
13 #include <linux/config.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/init.h>
18 #include <linux/slab.h>
21 #include <asm/sbus.h> /* for sanity check... */
22 #include <asm/swift.h> /* for cache flushing. */
25 #include <linux/ctype.h>
26 #include <linux/pci.h>
27 #include <linux/timex.h>
28 #include <linux/interrupt.h>
31 #include <asm/oplib.h>
33 #include <asm/timer.h>
34 #include <asm/uaccess.h>
38 asmlinkage int sys_pciconfig_read(unsigned long bus,
47 asmlinkage int sys_pciconfig_write(unsigned long bus,
58 #ifdef CONFIG_SUN_JSFLASH
59 extern int jsflash_init(void);
62 struct pci_fixup pcibios_fixups[] = {
66 unsigned int pcic_pin_to_irq(unsigned int pin, char *name);
69 * I studied different documents and many live PROMs both from 2.30
70 * family and 3.xx versions. I came to the amazing conclusion: there is
71 * absolutely no way to route interrupts in IIep systems relying on
72 * information which PROM presents. We must hardcode interrupt routing
73 * schematics. And this actually sucks. -- zaitcev 1999/05/12
75 * To find irq for a device we determine which routing map
76 * is in effect or, in other words, on which machine we are running.
77 * We use PROM name for this although other techniques may be used
78 * in special cases (Gleb reports a PROMless IIep based system).
79 * Once we know the map we take device configuration address and
80 * find PCIC pin number where INT line goes. Then we may either program
81 * preferred irq into the PCIC or supply the preexisting irq to the device.
84 unsigned char busno; /* PCI bus number */
85 unsigned char devfn; /* Configuration address */
86 unsigned char pin; /* PCIC external interrupt pin */
87 unsigned char irq; /* Preferred IRQ (mappable in PCIC) */
88 unsigned int force; /* Enforce preferred IRQ */
93 struct pcic_ca2irq *intmap;
98 * JavaEngine-1 apparently has different versions.
100 * According to communications with Sun folks, for P2 build 501-4628-03:
101 * pin 0 - parallel, audio;
104 * pin 3 - PS/2 kbd and mouse.
106 * OEM manual (805-1486):
109 * pin 2: IGA (unused)
110 * pin 3: Not connected
111 * OEM manual says that 501-4628 & 501-4811 are the same thing,
112 * only the latter has NAND flash in place.
114 * So far unofficial Sun wins over the OEM manual. Poor OEMs...
116 static struct pcic_ca2irq pcic_i_je1a[] = { /* 501-4811-03 */
117 { 0, 0x00, 2, 12, 0 }, /* EBus: hogs all */
118 { 0, 0x01, 1, 6, 1 }, /* Happy Meal */
119 { 0, 0x80, 0, 7, 0 }, /* IGA (unused) */
122 /* XXX JS-E entry is incomplete - PCI Slot 2 address (pin 7)? */
123 static struct pcic_ca2irq pcic_i_jse[] = {
124 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */
125 { 0, 0x01, 1, 6, 0 }, /* hme */
126 { 0, 0x08, 2, 9, 0 }, /* VGA - we hope not used :) */
127 { 0, 0x10, 6, 8, 0 }, /* PCI INTA# in Slot 1 */
128 { 0, 0x18, 7, 12, 0 }, /* PCI INTA# in Slot 2, shared w. RTC */
129 { 0, 0x38, 4, 9, 0 }, /* All ISA devices. Read 8259. */
130 { 0, 0x80, 5, 11, 0 }, /* EIDE */
131 /* {0,0x88, 0,0,0} - unknown device... PMU? Probably no interrupt. */
132 { 0, 0xA0, 4, 9, 0 }, /* USB */
134 * Some pins belong to non-PCI devices, we hardcode them in drivers.
135 * sun4m timers - irq 10, 14
136 * PC style RTC - pin 7, irq 4 ?
137 * Smart card, Parallel - pin 4 shared with USB, ISA
138 * audio - pin 3, irq 5 ?
142 /* SPARCengine-6 was the original release name of CP1200.
143 * The documentation differs between the two versions
145 static struct pcic_ca2irq pcic_i_se6[] = {
146 { 0, 0x08, 0, 2, 0 }, /* SCSI */
147 { 0, 0x01, 1, 6, 0 }, /* HME */
148 { 0, 0x00, 3, 13, 0 }, /* EBus */
152 * Krups (courtesy of Varol Kaptan)
153 * No documentation available, but it was easy to guess
154 * because it was very similar to Espresso.
156 * pin 0 - kbd, mouse, serial;
158 * pin 2 - igs (we do not use it);
160 * pin 4,5,6 - unused;
161 * pin 7 - RTC (from P2 onwards as David B. says).
163 static struct pcic_ca2irq pcic_i_jk[] = {
164 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */
165 { 0, 0x01, 1, 6, 0 }, /* hme */
169 * Several entries in this list may point to the same routing map
170 * as several PROMs may be installed on the same physical board.
172 #define SN2L_INIT(name, map) \
173 { name, map, sizeof(map)/sizeof(struct pcic_ca2irq) }
175 static struct pcic_sn2list pcic_known_sysnames[] = {
176 SN2L_INIT("SUNW,JavaEngine1", pcic_i_je1a), /* JE1, PROM 2.32 */
177 SN2L_INIT("SUNW,JS-E", pcic_i_jse), /* PROLL JavaStation-E */
178 SN2L_INIT("SUNW,SPARCengine-6", pcic_i_se6), /* SPARCengine-6/CP-1200 */
179 SN2L_INIT("SUNW,JS-NC", pcic_i_jk), /* PROLL JavaStation-NC */
180 SN2L_INIT("SUNW,JSIIep", pcic_i_jk), /* OBP JavaStation-NC */
185 * Only one PCIC per IIep,
186 * and since we have no SMP IIep, only one per system.
189 static struct linux_pcic pcic0;
191 unsigned int pcic_regs;
192 volatile int pcic_speculative;
193 volatile int pcic_trapped;
195 static void pci_do_gettimeofday(struct timeval *tv);
196 static void pci_do_settimeofday(struct timeval *tv);
198 #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3))
200 static int pcic_read_config_dword(struct pci_dev *dev, int where, u32 *value);
201 static int pcic_write_config_dword(struct pci_dev *dev, int where, u32 value);
203 static int pcic_read_config_byte(struct pci_dev *dev, int where, u8 *value)
207 pcic_read_config_dword(dev, where&~3, &v);
208 *value = 0xff & (v >> (8*(where & 3)));
209 return PCIBIOS_SUCCESSFUL;
212 static int pcic_read_config_word(struct pci_dev *dev, int where, u16 *value)
215 if (where&1) return PCIBIOS_BAD_REGISTER_NUMBER;
217 pcic_read_config_dword(dev, where&~3, &v);
218 *value = 0xffff & (v >> (8*(where & 3)));
219 return PCIBIOS_SUCCESSFUL;
222 static int pcic_read_config_dword(struct pci_dev *dev, int where, u32 *value)
224 unsigned char bus = dev->bus->number;
225 unsigned char device_fn = dev->devfn;
226 /* unsigned char where; */
228 struct linux_pcic *pcic;
231 if (where&3) return PCIBIOS_BAD_REGISTER_NUMBER;
232 if (bus != 0) return PCIBIOS_DEVICE_NOT_FOUND;
236 #if 0 /* does not fail here */
237 pcic_speculative = 1;
240 writel(CONFIG_CMD(bus,device_fn,where), pcic->pcic_config_space_addr);
241 #if 0 /* does not fail here */
244 restore_flags(flags);
246 return PCIBIOS_SUCCESSFUL;
249 pcic_speculative = 2;
251 *value = readl(pcic->pcic_config_space_data + (where&4));
254 pcic_speculative = 0;
255 restore_flags(flags);
257 return PCIBIOS_SUCCESSFUL;
259 pcic_speculative = 0;
260 restore_flags(flags);
261 return PCIBIOS_SUCCESSFUL;
264 static int pcic_write_config_byte(struct pci_dev *dev, int where, u8 value)
268 pcic_read_config_dword(dev, where&~3, &v);
269 v = (v & ~(0xff << (8*(where&3)))) |
270 ((0xff&(unsigned)value) << (8*(where&3)));
271 return pcic_write_config_dword(dev, where&~3, v);
274 static int pcic_write_config_word(struct pci_dev *dev, int where, u16 value)
278 if (where&1) return PCIBIOS_BAD_REGISTER_NUMBER;
279 pcic_read_config_dword(dev, where&~3, &v);
280 v = (v & ~(0xffff << (8*(where&3)))) |
281 ((0xffff&(unsigned)value) << (8*(where&3)));
282 return pcic_write_config_dword(dev, where&~3, v);
285 static int pcic_write_config_dword(struct pci_dev *dev, int where, u32 value)
287 unsigned char bus = dev->bus->number;
288 unsigned char devfn = dev->devfn;
289 struct linux_pcic *pcic;
292 if (where&3) return PCIBIOS_BAD_REGISTER_NUMBER;
293 if (bus != 0) return PCIBIOS_DEVICE_NOT_FOUND;
297 writel(CONFIG_CMD(bus,devfn,where), pcic->pcic_config_space_addr);
298 writel(value, pcic->pcic_config_space_data + (where&4));
299 restore_flags(flags);
300 return PCIBIOS_SUCCESSFUL;
303 static struct pci_ops pcic_ops = {
304 pcic_read_config_byte,
305 pcic_read_config_word,
306 pcic_read_config_dword,
307 pcic_write_config_byte,
308 pcic_write_config_word,
309 pcic_write_config_dword,
313 * On sparc64 pcibios_init() calls pci_controller_probe().
314 * We want PCIC probed little ahead so that interrupt controller
315 * would be operational.
317 int __init pcic_probe(void)
319 struct linux_pcic *pcic;
320 struct linux_prom_registers regs[PROMREG_MAX];
321 struct linux_pbm_info* pbm;
327 prom_printf("PCIC: called twice!\n");
332 node = prom_getchild (prom_root_node);
333 node = prom_searchsiblings (node, "pci");
337 * Map in PCIC register set, config space, and IO base
339 err = prom_getproperty(node, "reg", (char*)regs, sizeof(regs));
340 if (err == 0 || err == -1) {
341 prom_printf("PCIC: Error, cannot get PCIC registers "
348 pcic->pcic_res_regs.name = "pcic_registers";
349 pcic->pcic_regs = (unsigned long)
350 ioremap(regs[0].phys_addr, regs[0].reg_size);
351 if (!pcic->pcic_regs) {
352 prom_printf("PCIC: Error, cannot map PCIC registers.\n");
356 pcic->pcic_res_io.name = "pcic_io";
357 if ((pcic->pcic_io = (unsigned long)
358 ioremap(regs[1].phys_addr, 0x10000)) == 0) {
359 prom_printf("PCIC: Error, cannot map PCIC IO Base.\n");
363 pcic->pcic_res_cfg_addr.name = "pcic_cfg_addr";
364 if ((pcic->pcic_config_space_addr = (unsigned long)
365 ioremap(regs[2].phys_addr, regs[2].reg_size * 2)) == 0) {
366 prom_printf("PCIC: Error, cannot map"
367 "PCI Configuration Space Address.\n");
372 * Docs say three least significant bits in address and data
373 * must be the same. Thus, we need adjust size of data.
375 pcic->pcic_res_cfg_data.name = "pcic_cfg_data";
376 if ((pcic->pcic_config_space_data = (unsigned long)
377 ioremap(regs[3].phys_addr, regs[3].reg_size * 2)) == 0) {
378 prom_printf("PCIC: Error, cannot map"
379 "PCI Configuration Space Data.\n");
384 pbm->prom_node = node;
385 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0;
386 strcpy(pbm->prom_name, namebuf);
389 extern volatile int t_nmi[1];
390 extern int pcic_nmi_trap_patch[1];
392 t_nmi[0] = pcic_nmi_trap_patch[0];
393 t_nmi[1] = pcic_nmi_trap_patch[1];
394 t_nmi[2] = pcic_nmi_trap_patch[2];
395 t_nmi[3] = pcic_nmi_trap_patch[3];
396 swift_flush_dcache();
397 pcic_regs = pcic->pcic_regs;
400 prom_getstring(prom_root_node, "name", namebuf, 63); namebuf[63] = 0;
402 struct pcic_sn2list *p;
404 for (p = pcic_known_sysnames; p->sysname != NULL; p++) {
405 if (strcmp(namebuf, p->sysname) == 0)
408 pcic->pcic_imap = p->intmap;
409 pcic->pcic_imdim = p->mapdim;
411 if (pcic->pcic_imap == NULL) {
413 * We do not panic here for the sake of embedded systems.
415 printk("PCIC: System %s is unknown, cannot route interrupts\n",
422 static void __init pcic_pbm_scan_bus(struct linux_pcic *pcic)
424 struct linux_pbm_info *pbm = &pcic->pbm;
426 pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno, &pcic_ops, pbm);
427 #if 0 /* deadwood transplanted from sparc64 */
428 pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node);
429 pci_record_assignments(pbm, pbm->pci_bus);
430 pci_assign_unassigned(pbm, pbm->pci_bus);
431 pci_fixup_irq(pbm, pbm->pci_bus);
436 * Main entry point from the PCI subsystem.
438 void __init pcibios_init(void)
440 struct linux_pcic *pcic;
443 * PCIC should be initialized at start of the timer.
444 * So, here we report the presence of PCIC and do some magic passes.
451 * Switch off IOTLB translation.
453 writeb(PCI_DVMA_CONTROL_IOTLB_DISABLE,
454 pcic->pcic_regs+PCI_DVMA_CONTROL);
457 * Increase mapped size for PCI memory space (DMA access).
458 * Should be done in that order (size first, address second).
459 * Why we couldn't set up 4GB and forget about it? XXX
461 writel(0xF0000000UL, pcic->pcic_regs+PCI_SIZE_0);
462 writel(0+PCI_BASE_ADDRESS_SPACE_MEMORY,
463 pcic->pcic_regs+PCI_BASE_ADDRESS_0);
465 pcic_pbm_scan_bus(pcic);
468 #ifdef CONFIG_SUN_JSFLASH
473 int pcic_present(void)
478 static int __init pdev_to_pnode(struct linux_pbm_info *pbm,
479 struct pci_dev *pdev)
481 struct linux_prom_pci_registers regs[PROMREG_MAX];
483 int node = prom_getchild(pbm->prom_node);
486 err = prom_getproperty(node, "reg",
487 (char *)®s[0], sizeof(regs));
488 if(err != 0 && err != -1) {
489 unsigned long devfn = (regs[0].which_io >> 8) & 0xff;
490 if(devfn == pdev->devfn)
493 node = prom_getsibling(node);
498 static inline struct pcidev_cookie *pci_devcookie_alloc(void)
500 return kmalloc(sizeof(struct pcidev_cookie), GFP_ATOMIC);
503 static void pcic_map_pci_device(struct linux_pcic *pcic,
504 struct pci_dev *dev, int node)
507 unsigned long address;
511 if (node == 0 || node == -1) {
512 strcpy(namebuf, "???");
514 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0;
517 for (j = 0; j < 6; j++) {
518 address = dev->resource[j].start;
519 if (address == 0) break; /* are sequential */
520 flags = dev->resource[j].flags;
521 if ((flags & IORESOURCE_IO) != 0) {
522 if (address < 0x10000) {
524 * A device responds to I/O cycles on PCI.
525 * We generate these cycles with memory
526 * access into the fixed map (phys 0x30000000).
528 * Since a device driver does not want to
529 * do ioremap() before accessing PC-style I/O,
530 * we supply virtual, ready to access address.
532 * Ebus devices do not come here even if
533 * CheerIO makes a similar conversion.
534 * See ebus.c for details.
536 * Note that check_region()/request_region()
537 * work for these devices.
539 * XXX Neat trick, but it's a *bad* idea
540 * to shit into regions like that.
541 * What if we want to allocate one more
542 * PCI base address...
544 dev->resource[j].start =
545 pcic->pcic_io + address;
546 dev->resource[j].end = 1; /* XXX */
547 dev->resource[j].flags =
548 (flags & ~IORESOURCE_IO) | IORESOURCE_MEM;
551 * OOPS... PCI Spec allows this. Sun does
552 * not have any devices getting above 64K
553 * so it must be user with a weird I/O
554 * board in a PCI slot. We must remap it
555 * under 64K but it is not done yet. XXX
557 printk("PCIC: Skipping I/O space at 0x%lx,"
558 "this will Oops if a driver attaches;"
559 "device '%s' at %02x:%02x)\n", address,
560 namebuf, dev->bus->number, dev->devfn);
567 pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node)
569 struct pcic_ca2irq *p;
573 if (node == 0 || node == -1) {
574 strcpy(namebuf, "???");
576 prom_getstring(node, "name", namebuf, sizeof(namebuf));
579 if ((p = pcic->pcic_imap) == 0) {
583 for (i = 0; i < pcic->pcic_imdim; i++) {
584 if (p->busno == dev->bus->number && p->devfn == dev->devfn)
588 if (i >= pcic->pcic_imdim) {
589 printk("PCIC: device %s devfn %02x:%02x not found in %d\n",
590 namebuf, dev->bus->number, dev->devfn, pcic->pcic_imdim);
596 if (i >= 0 && i < 4) {
597 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
598 dev->irq = ivec >> (i << 2) & 0xF;
599 } else if (i >= 4 && i < 8) {
600 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
601 dev->irq = ivec >> ((i-4) << 2) & 0xF;
602 } else { /* Corrupted map */
603 printk("PCIC: BAD PIN %d\n", i); for (;;) {}
605 /* P3 */ /* printk("PCIC: device %s pin %d ivec 0x%x irq %x\n", namebuf, i, ivec, dev->irq); */
608 * dev->irq=0 means PROM did not bother to program the upper
609 * half of PCIC. This happens on JS-E with PROM 3.11, for instance.
611 if (dev->irq == 0 || p->force) {
612 if (p->irq == 0 || p->irq >= 15) { /* Corrupted map */
613 printk("PCIC: BAD IRQ %d\n", p->irq); for (;;) {}
615 printk("PCIC: setting irq %d at pin %d for device %02x:%02x\n",
616 p->irq, p->pin, dev->bus->number, dev->devfn);
621 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
622 ivec &= ~(0xF << ((i - 4) << 2));
623 ivec |= p->irq << ((i - 4) << 2);
624 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_HI);
626 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
627 ivec &= ~(0xF << (i << 2));
628 ivec |= p->irq << (i << 2);
629 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_LO);
637 * Normally called from {do_}pci_scan_bus...
639 void __init pcibios_fixup_bus(struct pci_bus *bus)
641 struct list_head *walk;
642 int i, has_io, has_mem;
644 struct linux_pcic *pcic;
645 /* struct linux_pbm_info* pbm = &pcic->pbm; */
647 struct pcidev_cookie *pcp;
650 printk("pcibios_fixup_bus: no PCIC\n");
656 * Next crud is an equivalent of pbm = pcic_bus_to_pbm(bus);
658 if (bus->number != 0) {
659 printk("pcibios_fixup_bus: nonzero bus 0x%x\n", bus->number);
663 walk = &bus->devices;
664 for (walk = walk->next; walk != &bus->devices; walk = walk->next) {
665 struct pci_dev *dev = pci_dev_b(walk);
668 * Comment from i386 branch:
669 * There are buggy BIOSes that forget to enable I/O and memory
670 * access to PCI devices. We try to fix this, but we need to
671 * be sure that the BIOS didn't forget to assign an address
672 * to the device. [mj]
673 * OBP is a case of such BIOS :-)
675 has_io = has_mem = 0;
677 unsigned long f = dev->resource[i].flags;
678 if (f & IORESOURCE_IO) {
680 } else if (f & IORESOURCE_MEM)
683 pcic_read_config_word(dev, PCI_COMMAND, &cmd);
684 if (has_io && !(cmd & PCI_COMMAND_IO)) {
685 printk("PCIC: Enabling I/O for device %02x:%02x\n",
686 dev->bus->number, dev->devfn);
687 cmd |= PCI_COMMAND_IO;
688 pcic_write_config_word(dev, PCI_COMMAND, cmd);
690 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
691 printk("PCIC: Enabling memory for device %02x:%02x\n",
692 dev->bus->number, dev->devfn);
693 cmd |= PCI_COMMAND_MEMORY;
694 pcic_write_config_word(dev, PCI_COMMAND, cmd);
697 node = pdev_to_pnode(&pcic->pbm, dev);
702 pcp = pci_devcookie_alloc();
703 pcp->pbm = &pcic->pbm;
704 pcp->prom_node = node;
707 /* fixing I/O to look like memory */
708 if ((dev->class>>16) != PCI_BASE_CLASS_BRIDGE)
709 pcic_map_pci_device(pcic, dev, node);
711 pcic_fill_irq(pcic, dev, node);
716 * pcic_pin_to_irq() is exported to ebus.c.
719 pcic_pin_to_irq(unsigned int pin, char *name)
721 struct linux_pcic *pcic = &pcic0;
726 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
727 irq = ivec >> (pin << 2) & 0xF;
728 } else if (pin < 8) {
729 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
730 irq = ivec >> ((pin-4) << 2) & 0xF;
731 } else { /* Corrupted map */
732 printk("PCIC: BAD PIN %d FOR %s\n", pin, name);
733 for (;;) {} /* XXX Cannot panic properly in case of PROLL */
735 /* P3 */ /* printk("PCIC: dev %s pin %d ivec 0x%x irq %x\n", name, pin, ivec, irq); */
739 /* Makes compiler happy */
740 static volatile int pcic_timer_dummy;
742 static void pcic_clear_clock_irq(void)
744 pcic_timer_dummy = readl(pcic0.pcic_regs+PCI_SYS_LIMIT);
747 static void pcic_timer_handler (int irq, void *h, struct pt_regs *regs)
749 pcic_clear_clock_irq();
753 #define USECS_PER_JIFFY 10000 /* We have 100HZ "standard" timer for sparc */
754 #define TICK_TIMER_LIMIT ((100*1000000/4)/100)
756 void __init pci_time_init(void)
758 struct linux_pcic *pcic = &pcic0;
762 /* A hack until do_gettimeofday prototype is moved to arch specific headers
763 and btfixupped. Patch do_gettimeofday with ba pci_do_gettimeofday; nop */
764 ((unsigned int *)do_gettimeofday)[0] =
765 0x10800000 | ((((unsigned long)pci_do_gettimeofday -
766 (unsigned long)do_gettimeofday) >> 2) & 0x003fffff);
767 ((unsigned int *)do_gettimeofday)[1] = 0x01000000;
768 BTFIXUPSET_CALL(bus_do_settimeofday, pci_do_settimeofday, BTFIXUPCALL_NORM);
771 writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT);
772 /* PROM should set appropriate irq */
773 v = readb(pcic->pcic_regs+PCI_COUNTER_IRQ);
774 timer_irq = PCI_COUNTER_IRQ_SYS(v);
775 writel (PCI_COUNTER_IRQ_SET(timer_irq, 0),
776 pcic->pcic_regs+PCI_COUNTER_IRQ);
777 irq = request_irq(timer_irq, pcic_timer_handler,
778 (SA_INTERRUPT | SA_STATIC_ALLOC), "timer", NULL);
780 prom_printf("time_init: unable to attach IRQ%d\n", timer_irq);
786 static __inline__ unsigned long do_gettimeoffset(void)
788 struct tasklet_struct *t;
789 unsigned long offset = 0;
792 * We devide all to 100
793 * to have microsecond resolution and to avoid overflow
795 unsigned long count =
796 readl(pcic0.pcic_regs+PCI_SYS_COUNTER) & ~PCI_SYS_COUNTER_OVERFLOW;
797 count = ((count/100)*USECS_PER_JIFFY) / (TICK_TIMER_LIMIT/100);
799 t = &bh_task_vec[TIMER_BH];
800 if (test_bit(TASKLET_STATE_SCHED, &t->state))
802 return offset + count;
805 extern volatile unsigned long wall_jiffies;
807 static void pci_do_gettimeofday(struct timeval *tv)
813 tv->tv_usec += do_gettimeoffset();
816 * xtime is atomically updated in timer_bh. The difference
817 * between jiffies and wall_jiffies is nonzero if the timer
818 * bottom half hasnt executed yet.
820 if ((jiffies - wall_jiffies) != 0)
821 tv->tv_usec += USECS_PER_JIFFY;
823 restore_flags(flags);
825 if (tv->tv_usec >= 1000000) {
826 tv->tv_usec -= 1000000;
831 static void pci_do_settimeofday(struct timeval *tv)
834 tv->tv_usec -= do_gettimeoffset();
835 if(tv->tv_usec < 0) {
836 tv->tv_usec += 1000000;
840 time_adjust = 0; /* stop active adjtime() */
841 time_status |= STA_UNSYNC;
842 time_maxerror = NTP_PHASE_LIMIT;
843 time_esterror = NTP_PHASE_LIMIT;
848 static void watchdog_reset() {
849 writeb(0, pcic->pcic_regs+PCI_SYS_STATUS);
854 * Other archs parse arguments here.
856 char * __init pcibios_setup(char *str)
863 void pcibios_update_resource(struct pci_dev *pdev, struct resource *res1,
864 struct resource *res2, int index)
868 void pcibios_align_resource(void *data, struct resource *res,
869 unsigned long size, unsigned long align)
873 int pcibios_enable_device(struct pci_dev *pdev, int mask)
881 void pcic_nmi(unsigned int pend, struct pt_regs *regs)
884 pend = flip_dword(pend);
886 if (!pcic_speculative || (pend & PCI_SYS_INT_PENDING_PIO) == 0) {
888 * XXX On CP-1200 PCI #SERR may happen, we do not know
889 * what to do about it yet.
891 printk("Aiee, NMI pend 0x%x pc 0x%x spec %d, hanging\n",
892 pend, (int)regs->pc, pcic_speculative);
895 pcic_speculative = 0;
897 regs->pc = regs->npc;
901 static inline unsigned long get_irqmask(int irq_nr)
906 static inline char *pcic_irq_itoa(unsigned int irq)
908 static char buff[16];
909 sprintf(buff, "%d", irq);
913 static void pcic_disable_irq(unsigned int irq_nr)
915 unsigned long mask, flags;
917 mask = get_irqmask(irq_nr);
919 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET);
920 restore_flags(flags);
923 static void pcic_enable_irq(unsigned int irq_nr)
925 unsigned long mask, flags;
927 mask = get_irqmask(irq_nr);
929 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR);
930 restore_flags(flags);
933 static void pcic_clear_profile_irq(int cpu)
935 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__);
938 static void pcic_load_profile_irq(int cpu, unsigned int limit)
940 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__);
943 /* We assume the caller is local cli()'d when these are called, or else
944 * very bizarre behavior will result.
946 static void pcic_disable_pil_irq(unsigned int pil)
948 writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET);
951 static void pcic_enable_pil_irq(unsigned int pil)
953 writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR);
956 void __init sun4m_pci_init_IRQ(void)
958 BTFIXUPSET_CALL(enable_irq, pcic_enable_irq, BTFIXUPCALL_NORM);
959 BTFIXUPSET_CALL(disable_irq, pcic_disable_irq, BTFIXUPCALL_NORM);
960 BTFIXUPSET_CALL(enable_pil_irq, pcic_enable_pil_irq, BTFIXUPCALL_NORM);
961 BTFIXUPSET_CALL(disable_pil_irq, pcic_disable_pil_irq, BTFIXUPCALL_NORM);
962 BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM);
963 BTFIXUPSET_CALL(clear_profile_irq, pcic_clear_profile_irq, BTFIXUPCALL_NORM);
964 BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM);
965 BTFIXUPSET_CALL(__irq_itoa, pcic_irq_itoa, BTFIXUPCALL_NORM);
968 int pcibios_assign_resource(struct pci_dev *pdev, int resource)
974 * This probably belongs here rather than ioport.c because
975 * we do not want this crud linked into SBus kernels.
976 * Also, think for a moment about likes of floppy.c that
977 * include architecture specific parts. They may want to redefine ins/outs.
979 * We do not use horroble macroses here because we want to
980 * advance pointer by sizeof(size).
982 void outsb(unsigned long addr, const void *src, unsigned long count) {
985 writeb(*(const char *)src, addr);
991 void outsw(unsigned long addr, const void *src, unsigned long count) {
994 writew(*(const short *)src, addr);
1000 void outsl(unsigned long addr, const void *src, unsigned long count) {
1003 writel(*(const long *)src, addr);
1009 void insb(unsigned long addr, void *dst, unsigned long count) {
1012 *(unsigned char *)dst = readb(addr);
1018 void insw(unsigned long addr, void *dst, unsigned long count) {
1021 *(unsigned short *)dst = readw(addr);
1027 void insl(unsigned long addr, void *dst, unsigned long count) {
1031 * XXX I am sure we are in for an unaligned trap here.
1033 *(unsigned long *)dst = readl(addr);