1 /* $Id: trampoline.S,v 1.13 1999/08/04 03:19:15 davem Exp $
2 * trampoline.S: SMP cpu boot-up trampoline code.
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 #include <linux/init.h>
9 #include <asm/cprefix.h>
14 #include <asm/ptrace.h>
15 #include <asm/vaddrs.h>
16 #include <asm/contregs.h>
18 .globl C_LABEL(sun4m_cpu_startup), C_LABEL(__smp4m_processor_id)
19 .globl C_LABEL(sun4d_cpu_startup), C_LABEL(__smp4d_processor_id)
24 /* When we start up a cpu for the first time it enters this routine.
25 * This initializes the chip from whatever state the prom left it
26 * in and sets PIL in %psr to 15, no irqs.
29 C_LABEL(sun4m_cpu_startup):
31 sethi %hi(C_LABEL(trapbase_cpu1)), %g3
33 or %g3, %lo(C_LABEL(trapbase_cpu1)), %g3
36 sethi %hi(C_LABEL(trapbase_cpu2)), %g3
38 or %g3, %lo(C_LABEL(trapbase_cpu2)), %g3
41 sethi %hi(C_LABEL(trapbase_cpu3)), %g3
43 or %g3, %lo(C_LABEL(trapbase_cpu3)), %g3
46 /* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
47 set (PSR_PIL | PSR_S | PSR_PS), %g1
48 wr %g1, 0x0, %psr ! traps off though
51 /* Our %wim is one behind CWP */
56 /* This identifies "this cpu". */
60 /* Give ourselves a stack and curptr. */
61 set C_LABEL(current_set), %g5
66 sethi %hi(TASK_UNION_SIZE - STACKFRAME_SZ), %sp
67 or %sp, %lo(TASK_UNION_SIZE - STACKFRAME_SZ), %sp
70 /* Turn on traps (PSR_ET). */
72 wr %g1, PSR_ET, %psr ! traps on
75 /* Init our caches, etc. */
76 set C_LABEL(poke_srmmu), %g5
81 /* Start this processor. */
82 call C_LABEL(smp4m_callin)
91 call C_LABEL(cpu_idle)
94 call C_LABEL(cpu_panic)
97 C_LABEL(__smp4m_processor_id):
104 C_LABEL(__smp4d_processor_id):
105 lda [%g0] ASI_M_VIKING_TMP1, %g2
109 /* CPUID in bootbus can be found at PA 0xff0140000 */
110 #define SUN4D_BOOTBUS_CPUID 0xf0140000
115 C_LABEL(sun4d_cpu_startup):
116 /* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
117 set (PSR_PIL | PSR_S | PSR_PS), %g1
118 wr %g1, 0x0, %psr ! traps off though
121 /* Our %wim is one behind CWP */
126 /* Set tbr - we use just one trap table. */
127 set C_LABEL(trapbase), %g1
131 /* Get our CPU id out of bootbus */
132 set SUN4D_BOOTBUS_CPUID, %g3
133 lduba [%g3] ASI_M_CTL, %g3
136 sta %g1, [%g0] ASI_M_VIKING_TMP1
138 /* Give ourselves a stack and curptr. */
139 set C_LABEL(current_set), %g5
143 sethi %hi(TASK_UNION_SIZE - STACKFRAME_SZ), %sp
144 or %sp, %lo(TASK_UNION_SIZE - STACKFRAME_SZ), %sp
147 /* Turn on traps (PSR_ET). */
149 wr %g1, PSR_ET, %psr ! traps on
152 /* Init our caches, etc. */
153 set C_LABEL(poke_srmmu), %g5
158 /* Start this processor. */
159 call C_LABEL(smp4d_callin)