1 /* lanai.c -- Copyright 1999 by Mitchell Blank Jr <mitch@sfgoth.com>
3 * This program is free software; you can redistribute it and/or
4 * modify it under the terms of the GNU General Public License
5 * as published by the Free Software Foundation; either version
6 * 2 of the License, or (at your option) any later version.
8 * This driver supports ATM cards based on the Efficient "Lanai"
9 * chipset such as the Speedstream 3010 and the ENI-25p. The
10 * Speedstream 3060 is currently not supported since we don't
11 * have the code to drive the on-board Alcatel DSL chipset (yet).
13 * Thanks to Efficient for supporting this project with hardware,
14 * documentation, and by answering my questions.
16 * Things not working yet:
18 * o We're only set up to compile as a module currently. i.e.
19 * you should put the source in drivers/atm/lanai.c and then
20 * just do "make drivers/atm/lanai.o" from the main
21 * source directory. This will produce a drivers/atm/lanai.o
22 * file suitable for insmod'ing
24 * o We don't support the Speedstream 3060 yet - this card has
25 * an on-board DSL modem chip by Alcatel and the driver will
26 * need some extra code added to handle it
28 * o Note that due to limitations of the Lanai only one VCC can be
31 * o We don't currently parse the EEPROM at all. The code is all
32 * there as per the spec, but it doesn't actually work. I think
33 * there may be some issues with the docs. Anyway, do NOT
34 * enable it yet - bugs in that code may actually damage your
35 * hardware! Because of this you should hardware an ESI before
36 * trying to use this in a LANE or MPOA environment.
38 * o AAL0 is stubbed in but the actual rx/tx path isn't written yet:
39 * vcc_tx_aal0() needs to send or queue a SKB
40 * vcc_tx_unqueue_aal0() needs to attempt to send queued SKBs
41 * vcc_rx_aal0() needs to handle AAL0 interrupts
42 * This isn't too much work - I just wanted to get other things
45 * o lanai_change_qos() isn't written yet
47 * o There aren't any ioctl's yet -- I'd like to eventually support
48 * setting loopback and LED modes that way. (see lanai_ioctl)
50 * o If the segmentation engine or DMA gets shut down we should restart
51 * card as per section 17.0i. (see lanai_reset)
53 * o setsockopt(SO_CIRANGE) isn't done (although despite what the
54 * API says it isn't exactly commonly implemented)
58 * v.0.02 -- 11-JAN-2000 -- Endian fixes
59 * v.0.01 -- 30-NOV-1999 -- Initial release
62 #include <linux/module.h>
64 #include <linux/atmdev.h>
66 #include <asm/byteorder.h>
67 #include <linux/spinlock.h>
68 #include <linux/pci.h>
69 #include <linux/init.h>
70 #include <linux/delay.h>
71 #include <linux/interrupt.h>
73 #ifndef PCI_VENDOR_ID_EF_ATM_LANAI2
74 /* These need to eventually go into <linux/pci.h> - they're here for now */
75 #define PCI_VENDOR_ID_EF_ATM_LANAI2 0x0003
76 #define PCI_VENDOR_ID_EF_ATM_LANAIHB 0x0005
79 /* -------------------- TUNABLE PARAMATERS: */
82 * Maximum number of VCIs per card. Setting it lower could theoretically
83 * save some memory, but since we allocate our vcc list with get_free_pages,
84 * it's not really likely for most architectures
86 #define NUM_VCI (1024)
89 * Enable extra debugging
93 * Debug _all_ register operations with card, except the memory test.
94 * Also disables the timed poll to prevent extra chattiness. This
95 * isn't for normal use
100 * The programming guide specifies a full test of the on-board SRAM
101 * at initialization time. Undefine to remove this
103 #define FULL_MEMORY_TEST
106 * This is the number of (4 byte) service entries that we will
107 * try to allocate at startup. Note that we will end up with
108 * one PAGE_SIZE's worth regardless of what this is set to
110 #define SERVICE_ENTRIES (1024)
111 /* TODO: make above a module load-time option */
114 * We normally read the onboard EEPROM in order to discover our MAC
115 * address. Undefine to _not_ do this
117 /* #define READ_EEPROM */ /* ***DONT ENABLE YET*** */
118 /* TODO: make above a module load-time option (also) */
121 * Depth of TX fifo (in 128 byte units; range 2-31)
122 * Smaller numbers are better for network latency
123 * Larger numbers are better for PCI latency
124 * I'm really sure where the best tradeoff is, but the BSD driver uses
125 * 7 and it seems to work ok.
127 #define TX_FIFO_DEPTH (7)
128 /* TODO: make above a module load-time option */
131 * How often (in jiffies) we will try to unstick stuck connections -
132 * shouldn't need to happen much
134 #define LANAI_POLL_PERIOD (10*HZ)
135 /* TODO: make above a module load-time option */
138 * When allocating an AAL5 receiving buffer, try to make it at least
139 * large enough to hold this many max_sdu sized PDUs
141 #define AAL5_RX_MULTIPLIER (3)
142 /* TODO: make above a module load-time option */
145 * Same for transmitting buffer
147 #define AAL5_TX_MULTIPLIER (3)
148 /* TODO: make above a module load-time option */
151 * When allocating an AAL0 transmiting buffer, how many cells should fit.
152 * Remember we'll end up with a PAGE_SIZE of them anyway, so this isn't
155 #define AAL0_TX_MULTIPLIER (40)
156 /* TODO: make above a module load-time option */
159 * How large should we make the AAL0 receiving buffer. Remember that this
160 * is shared between all AAL0 VC's
162 #define AAL0_RX_BUFFER_SIZE (PAGE_SIZE)
163 /* TODO: make above a module load-time option */
166 * Should we use Lanai's "powerdown" feature when no vcc's are bound?
168 /* #define USE_POWERDOWN */
169 /* TODO: make above a module load-time option (also) */
171 /* -------------------- DEBUGGING AIDS: */
173 #define DEV_LABEL "lanai"
177 #define DPRINTK(format, args...) \
178 printk(KERN_DEBUG DEV_LABEL ": " format, ##args)
179 #define APRINTK(truth, format, args...) \
182 printk(KERN_ERR DEV_LABEL ": " format, ##args); \
187 #define DPRINTK(format, args...)
188 #define APRINTK(truth, format, args...)
193 #define RWDEBUG(format, args...) \
194 printk(KERN_DEBUG DEV_LABEL ": " format, ##args)
195 #else /* !DEBUG_RW */
196 #define RWDEBUG(format, args...)
199 /* -------------------- DATA DEFINITIONS: */
201 #define LANAI_MAPPING_SIZE (0x40000)
202 #define LANAI_EEPROM_SIZE (128)
205 typedef unsigned long bus_addr_t;
207 /* A bitfield large enough for NUM_VCI */
208 #define VCI_BITFIELD_NELEM ((NUM_VCI + BITS_PER_LONG - 1) / BITS_PER_LONG)
210 unsigned long ul[VCI_BITFIELD_NELEM];
213 /* DMA buffer in host memory for TX, RX, or service list. */
214 struct lanai_buffer {
215 u32 *start; /* From get_free_pages */
216 u32 *end; /* One past last byte */
217 u32 *ptr; /* Pointer to current host location */
218 int order; /* log2(size/PAGE_SIZE) */
221 struct lanai_vcc_stats {
226 unsigned service_trash;
227 unsigned service_stream;
228 unsigned service_rxcrc;
235 struct lanai_dev; /* Forward declaration */
238 * This is the card-specific per-vcc data. Note that unlike some other
239 * drivers there is NOT a 1-to-1 correspondance between these and
240 * atm_vcc's - each one of these represents an actual 2-way vcc, but
241 * an atm_vcc can be 1-way and share with a 1-way vcc in the other
242 * direction. To make it weirder, there can even be 0-way vccs
243 * bound to us, waiting to do a change_qos
246 bus_addr_t vbase; /* Base of VCC's registers */
247 struct lanai_vcc_stats stats;
248 int nref; /* # of atm_vcc's who reference us */
251 struct lanai_buffer buf;
252 struct atm_vcc *atmvcc; /* atm_vcc who is receiver */
255 struct lanai_buffer buf;
256 struct atm_vcc *atmvcc; /* atm_vcc who is transmitter */
257 int endptr; /* last endptr from service entry */
258 struct sk_buff_head backlog;
259 struct sk_buff *inprogress; /* We're streaming this PDU */
260 unsigned char *pptr; /* Where we are in above */
261 int inprogleft; /* Bytes left to send "inprogress" */
262 void (*unqueue)(struct lanai_dev *, struct lanai_vcc *, int);
267 lanai2 = PCI_VENDOR_ID_EF_ATM_LANAI2,
268 lanaihb = PCI_VENDOR_ID_EF_ATM_LANAIHB
271 struct lanai_dev_stats {
272 unsigned ovfl_trash; /* # of cells dropped - buffer overflow */
273 unsigned vci_trash; /* # of cells dropped - closed vci */
274 unsigned hec_err; /* # of cells dropped - bad HEC */
275 unsigned atm_ovfl; /* # of cells dropped - rx fifo overflow */
276 unsigned pcierr_parity_detect;
277 unsigned pcierr_serr_set;
278 unsigned pcierr_master_abort;
279 unsigned pcierr_m_target_abort;
280 unsigned pcierr_s_target_abort;
281 unsigned pcierr_master_parity;
282 unsigned service_novcc_rx;
283 unsigned service_novcc_tx;
284 unsigned service_notx;
285 unsigned service_norx;
286 unsigned service_rxnotaal5;
287 unsigned dma_reenable;
293 struct lanai_dev_stats stats;
294 struct lanai_buffer service;
295 struct lanai_vcc **vccs;
297 int nbound; /* number of bound vccs */
299 enum lanai_type type;
300 vci_t num_vci; /* Currently just NUM_VCI */
301 u8 eeprom[LANAI_EEPROM_SIZE];
302 u32 serialno, magicno;
304 vci_bitfield backlog_vccs; /* VCCs that are backlogged */
305 vci_bitfield transmit_ready; /* VCCs that have transmit space */
306 struct timer_list timer;
308 struct lanai_buffer aal0buf; /* AAL0 RX buffers */
309 u32 conf1, conf2; /* CONFIG[12] registers */
310 u32 status; /* STATUS register */
312 spinlock_t servicelock;
313 struct atm_vcc *cbrvcc;
317 /* TODO - look at race conditions with maintence of conf1/conf2 */
318 /* TODO - transmit locking: should we use _irq not _irqsave? */
319 /* TODO - organize above in some rational fashion (see <asm/cache.h>) */
322 /* -------------------- VCI_BITFIELD UTILITIES: */
325 * These functions assume that BITS_PER_LONG is a power of two, which
328 #if (BITS_PER_LONG & (BITS_PER_LONG - 1))
329 #error lanai driver requires type long to have a power of two number of bits
333 * In vci_bitfield_{set,clear} we do the operation in three
334 * parts to ensure that gcc doesn't cast anything down to
335 * 32 bits (and then sign extend them later) on 64-bit
336 * platforms like the alpha
338 static inline void vci_bitfield_set(vci_bitfield *bf, vci_t vci)
340 unsigned long bit = 1;
341 bit <<= (unsigned long) (vci & (BITS_PER_LONG - 1));
342 bf->ul[vci / BITS_PER_LONG] |= bit;
345 static inline void vci_bitfield_clear(vci_bitfield *bf, vci_t vci)
347 unsigned long bit = 1;
348 bit <<= (unsigned long) (vci & (BITS_PER_LONG - 1));
349 bf->ul[vci / BITS_PER_LONG] &= ~bit;
352 static inline void vci_bitfield_init(vci_bitfield *bf)
354 memset(bf, 0, sizeof(*bf));
357 static void vci_bitfield_iterate(struct lanai_dev *lanai,
358 const vci_bitfield *bf, void (*func)(struct lanai_dev *,vci_t vci))
362 const unsigned long *lp = &(bf->ul[0]);
363 for (vci = 0; vci < NUM_VCI; lp++)
365 vci += BITS_PER_LONG;
367 for (mask = 1; mask != 0; mask <<= 1, vci++)
372 /* -------------------- BUFFER UTILITIES: */
375 * Lanai needs DMA buffers aligned to 256 bytes of at least 1024 bytes -
376 * we assume that any page allocation will do. I'm sure this is
377 * never going to be a problem, but it's good to document assumtions
380 #error PAGE_SIZE too small to support LANAI chipset
383 * We also assume that the maximum buffer size will be some number
384 * of whole pages, although that wouldn't be too hard to fix
386 #if PAGE_SIZE > (128 * 1024)
387 #error PAGE_SIZE too large to support LANAI chipset
390 /* Convert a size to "order" for __get_free_pages */
391 static int bytes_to_order(int bytes)
394 if (bytes > (128 * 1024))
395 bytes = 128 * 1024; /* Max buffer size for lanai */
396 while ((PAGE_SIZE << order) < bytes)
402 * Allocate a buffer in host RAM for service list, RX, or TX
403 * Returns buf->order<0 if no memory
404 * Note that the size will be rounded up to an "order" of pages, and
405 * if we can't allocate that we'll settle for something smaller
408 * NOTE: buffer must be 32-bit DMA capable - when linux can
409 * make distinction, this will need tweaking for this
410 * to work on BIG memory machines.
412 static void lanai_buf_allocate(struct lanai_buffer *buf,
413 int bytes, int minbytes)
415 unsigned long address;
416 int order = bytes_to_order(bytes);
418 address = __get_free_pages(GFP_KERNEL, order);
419 if (address != 0) { /* Success */
420 bytes = PAGE_SIZE << order;
421 buf->start = buf->ptr = (u32 *) address;
422 buf->end = (u32 *) (address + bytes);
423 memset((void *) address, 0, bytes);
426 if ((PAGE_SIZE << --order) < minbytes)
427 order = -1; /* Too small - give up */
428 } while (order >= 0);
432 static inline void lanai_buf_deallocate(struct lanai_buffer *buf)
434 if (buf->order >= 0) {
435 APRINTK(buf->start != 0, "lanai_buf_deallocate: start==0!\n");
436 free_pages((unsigned long) buf->start, buf->order);
437 buf->start = buf->end = buf->ptr = 0;
441 /* size of buffer in bytes */
442 static inline int lanai_buf_size(const struct lanai_buffer *buf)
444 return ((unsigned long) buf->end) - ((unsigned long) buf->start);
447 /* size of buffer as "card order" (0=1k .. 7=128k) */
448 static inline int lanai_buf_size_cardorder(const struct lanai_buffer *buf)
450 return buf->order + PAGE_SHIFT - 10;
453 /* DMA-able address for this buffer */
454 static unsigned long lanai_buf_dmaaddr(const struct lanai_buffer *buf)
456 unsigned long r = virt_to_bus(buf->start);
457 APRINTK((r & ~0xFFFFFF00) == 0, "bad dmaaddr: 0x%lx\n", (long) r);
461 /* -------------------- HANDLE BACKLOG_VCCS BITFIELD: */
463 static inline void vcc_mark_backlogged(struct lanai_dev *lanai,
464 const struct lanai_vcc *lvcc)
466 APRINTK(lvcc->vbase != 0, "vcc_mark_backlogged: zero vbase!\n");
467 vci_bitfield_set(&lanai->backlog_vccs, lvcc->vci);
470 static inline void vcc_unmark_backlogged(struct lanai_dev *lanai,
471 const struct lanai_vcc *lvcc)
473 APRINTK(lvcc->vbase != 0, "vcc_unmark_backlogged: zero vbase!\n");
474 vci_bitfield_clear(&lanai->backlog_vccs, lvcc->vci);
477 static inline void vcc_backlog_init(struct lanai_dev *lanai)
479 vci_bitfield_init(&lanai->backlog_vccs);
482 static inline int vcc_is_backlogged(/*const*/ struct lanai_vcc *lvcc)
484 return lvcc->tx.inprogress != NULL ||
485 !skb_queue_empty(&lvcc->tx.backlog);
488 /* -------------------- PORT I/O UTILITIES: */
490 /* Registers (and their bit-fields) */
491 enum lanai_register {
492 Reset_Reg = 0x00, /* Reset; read for chip type; bits: */
493 #define RESET_GET_BOARD_REV(x) (((x)>> 0)&0x03) /* Board revision */
494 #define RESET_GET_BOARD_ID(x) (((x)>> 2)&0x03) /* Board ID */
495 #define BOARD_ID_LANAI256 (0) /* 25.6M adaptor card */
496 Endian_Reg = 0x04, /* Endian setting */
497 IntStatus_Reg = 0x08, /* Interrupt status */
498 IntStatusMasked_Reg = 0x0C, /* Interrupt status (masked) */
499 IntAck_Reg = 0x10, /* Interrupt acknowledge */
500 IntAckMasked_Reg = 0x14, /* Interrupt acknowledge (masked) */
501 IntStatusSet_Reg = 0x18, /* Get status + enable/disable */
502 IntStatusSetMasked_Reg = 0x1C, /* Get status + en/di (masked) */
503 IntControlEna_Reg = 0x20, /* Interrupt control enable */
504 IntControlDis_Reg = 0x24, /* Interrupt control disable */
505 Status_Reg = 0x28, /* Status */
506 #define STATUS_PROMDATA (0x00000001) /* PROM_DATA pin */
507 #define STATUS_WAITING (0x00000002) /* Interrupt being delayed */
508 #define STATUS_SOOL (0x00000004) /* SOOL alarm */
509 #define STATUS_LOCD (0x00000008) /* LOCD alarm */
510 #define STATUS_LED (0x00000010) /* LED (HAPPI) output */
511 #define STATUS_GPIN (0x00000020) /* GPIN pin */
512 #define STATUS_BUTTBUSY (0x00000040) /* Butt register is pending */
513 Config1_Reg = 0x2C, /* Config word 1; bits: */
514 #define CONFIG1_PROMDATA (0x00000001) /* PROM_DATA pin */
515 #define CONFIG1_PROMCLK (0x00000002) /* PROM_CLK pin */
516 #define CONFIG1_SET_READMODE(x) ((x)*0x004) /* PCI BM reads; values: */
517 #define READMODE_PLAIN (0) /* Plain memory read */
518 #define READMODE_LINE (2) /* Memory read line */
519 #define READMODE_MULTIPLE (3) /* Memory read multiple */
520 #define CONFIG1_DMA_ENABLE (0x00000010) /* Turn on DMA */
521 #define CONFIG1_POWERDOWN (0x00000020) /* Turn off clocks */
522 #define CONFIG1_SET_LOOPMODE(x) ((x)*0x080) /* Clock&loop mode; values: */
523 #define LOOPMODE_NORMAL (0) /* Normal - no loop */
524 #define LOOPMODE_TIME (1)
525 #define LOOPMODE_DIAG (2)
526 #define LOOPMODE_LINE (3)
527 #define CONFIG1_MASK_LOOPMODE (0x00000180)
528 #define CONFIG1_SET_LEDMODE(x) ((x)*0x0200) /* Mode of LED; values: */
529 #define LEDMODE_NOT_SOOL (0) /* !SOOL */
530 #define LEDMODE_OFF (1) /* 0 */
531 #define LEDMODE_ON (2) /* 1 */
532 #define LEDMODE_NOT_LOCD (3) /* !LOCD */
533 #define LEDMORE_GPIN (4) /* GPIN */
534 #define LEDMODE_NOT_GPIN (7) /* !GPIN */
535 #define CONFIG1_MASK_LEDMODE (0x00000E00)
536 #define CONFIG1_GPOUT1 (0x00001000) /* Toggle for reset */
537 #define CONFIG1_GPOUT2 (0x00002000) /* Loopback PHY */
538 #define CONFIG1_GPOUT3 (0x00004000) /* Loopback lanai */
539 Config2_Reg = 0x30, /* Config word 2; bits: */
540 #define CONFIG2_HOWMANY (0x00000001) /* >512 VCIs? */
541 #define CONFIG2_PTI7_MODE (0x00000002) /* Make PTI=7 RM, not OAM */
542 #define CONFIG2_VPI_CHK_DIS (0x00000004) /* Ignore RX VPI value */
543 #define CONFIG2_HEC_DROP (0x00000008) /* Drop cells w/ HEC errors */
544 #define CONFIG2_VCI0_NORMAL (0x00000010) /* Treat VCI=0 normally */
545 #define CONFIG2_CBR_ENABLE (0x00000020) /* Deal with CBR traffic */
546 #define CONFIG2_TRASH_ALL (0x00000040) /* Trashing incoming cells */
547 #define CONFIG2_TX_DISABLE (0x00000080) /* Trashing outgoing cells */
548 #define CONFIG2_SET_TRASH (0x00000100) /* Turn trashing on */
549 Statistics_Reg = 0x34, /* Statistics; bits: */
550 #define STATS_GET_FIFO_OVFL(x) (((x)>> 0)&0xFF) /* FIFO overflowed */
551 #define STATS_GET_HEC_ERR(x) (((x)>> 8)&0xFF) /* HEC was bad */
552 #define STATS_GET_BAD_VCI(x) (((x)>>16)&0xFF) /* VCI not open */
553 #define STATS_GET_BUF_OVFL(x) (((x)>>24)&0xFF) /* VCC buffer full */
554 ServiceStuff_Reg = 0x38, /* Service stuff; bits: */
555 #define SSTUFF_SET_SIZE(x) ((x)*0x20000000) /* size of service buffer */
556 #define SSTUFF_SET_ADDR(x) ((x)>>8) /* set address of buffer */
557 ServWrite_Reg = 0x3C, /* ServWrite Pointer */
558 ServRead_Reg = 0x40, /* ServRead Pointer */
559 TxDepth_Reg = 0x44, /* FIFO Transmit Depth */
560 Butt_Reg = 0x48, /* Butt register */
563 PingCount_Reg = 0x58, /* Ping count */
564 DMA_Addr_Reg = 0x5C /* DMA address */
567 static inline bus_addr_t reg_addr(const struct lanai_dev *lanai,
568 enum lanai_register reg)
570 return lanai->base + (bus_addr_t) reg;
574 static inline u32 reg_read(const struct lanai_dev *lanai,
575 enum lanai_register reg)
578 t = readl(reg_addr(lanai, reg));
579 RWDEBUG("R [0x%08X] 0x%02X = 0x%08X\n", (unsigned int) lanai->base,
584 static inline void reg_write(const struct lanai_dev *lanai, u32 val,
585 enum lanai_register reg)
587 RWDEBUG("W [0x%08X] 0x%02X < 0x%08X\n", (unsigned int) lanai->base,
589 writel(val, reg_addr(lanai, reg));
593 static inline void conf1_write(const struct lanai_dev *lanai)
595 reg_write(lanai, lanai->conf1, Config1_Reg);
598 static inline void conf2_write(const struct lanai_dev *lanai)
600 reg_write(lanai, lanai->conf2, Config2_Reg);
603 static inline void reset_board(const struct lanai_dev *lanai)
605 DPRINTK("about to reset board\n");
606 reg_write(lanai, 0, Reset_Reg);
608 * If we don't delay a little while here then we can end up
609 * leaving the card in a VERY weird state and lock up the
610 * PCI bus. This isn't documented anywhere but I've convinced
611 * myself after a lot of painful experimentation
616 /* -------------------- VCC LIST LOCK: */
619 * The linux-atm code disables local IRQs while managing the list of
620 * VCCs on a card. This is good, but it doesn't save us against
621 * SMP. Unfortunately, fixing this will require changes in the
622 * API which will have to wait a little bit. It's a hard race to
623 * trigger accidentally, so it isn't TOO horrible so far.
625 * One possible solution would be to have an rwlock which is
626 * always grabbed _irq-style on writing. This would automatically
627 * be grabbed (for writing) by the higher layers on things that
628 * would result in a change in the vcc list (_open, _close,
629 * probably _change_qos) - thus it would also protect the
630 * higher-level list of vccs on each device (atm_dev->vccs).
631 * The driver would be responsible for grabbing it as a read_lock
632 * anytime it wants to consult its table of vccs - for instance
633 * when handling an incoming PDU. This also explains why we would
634 * probably want the write_lock while in _change_qos - to prevent
635 * handling of PDUs while possibly in an inconsistant state.
636 * Also, _send would grab the lock for reading.
638 * One problem with this is that _open and _close could no longer
639 * do anything that might provoke a schedule. First, it would
640 * force us to use GFP_ATOMIC memory (which is bad), but also
641 * some devices pretty much require scheduling due to long
642 * delays (see lanai_close for an example). So in this case
643 * we need a way to schedule without losing the spinlock.
644 * The cleanest way to do this is probably have a way to mark a
645 * VCC as "in progress" so that the interrupt handler can
646 * still disregard any traffic for it while _open or _close
647 * are sleeping on it. Then it will need to be _open and
648 * _close's job to relinquish the write_lock. Thus, the
649 * lock could be dropped around the times that scheduling
650 * might occur. Perhaps the _READY flag can be used for
653 * One short note about this "upper layer grabs, driver
654 * relinquishes" write lock - since this needs to be
655 * an _irq lock we're going to have problem saving
656 * and restoring flags (_irqsave/_irqrestore). This
657 * shouldn't be a problem, however - we must just
658 * require that those syscalls are never called with
659 * interrupts disabled so we can use the non-flags-saving
662 * Anyway, all of the above is vaporware currently - fixing
663 * this right will require changes in the API and all of
664 * the drivers - this will wait until 2.5.x most likely.
665 * The following NOP macros are just here to mark where
666 * the locks will be needed in the future.
668 #define vcclist_read_lock() do {} while (0)
669 #define vcclist_read_unlock() do {} while (0)
670 #define vcclist_write_lock() do {} while (0)
671 #define vcclist_write_unlock() do {} while (0)
673 /* -------------------- CARD SRAM UTILITIES: */
675 /* The SRAM is mapped into normal PCI memory space - the only catch is
676 * that it is only 16-bits wide but must be accessed as 32-bit. The
677 * 16 high bits will be zero. We don't hide this, since they get
678 * programmed mostly like discrete registers anyway
680 #define SRAM_START (0x20000)
681 #define SRAM_BYTES (0x20000) /* Again, half don't really exist */
683 static inline bus_addr_t sram_addr(const struct lanai_dev *lanai, int offset)
685 return lanai->base + SRAM_START + offset;
688 static inline u32 sram_read(const struct lanai_dev *lanai, int offset)
690 return readl(sram_addr(lanai, offset));
693 static inline void sram_write(const struct lanai_dev *lanai,
696 writel(val, sram_addr(lanai, offset));
699 static int __init sram_test_word(
700 const struct lanai_dev *lanai, int offset, u32 pattern)
703 sram_write(lanai, pattern, offset);
704 readback = sram_read(lanai, offset);
705 if (readback == pattern)
707 printk(KERN_ERR DEV_LABEL
708 "(itf %d): SRAM word at %d bad: wrote 0x%X, read 0x%X\n",
709 lanai->number, offset, pattern, readback);
713 static int __init sram_test_pass(const struct lanai_dev *lanai, u32 pattern)
715 int offset, result = 0;
716 for (offset = 0; offset < SRAM_BYTES && result == 0; offset += 4)
717 result = sram_test_word(lanai, offset, pattern);
721 static int __init sram_test_and_clear(const struct lanai_dev *lanai)
723 #ifdef FULL_MEMORY_TEST
725 DPRINTK("testing SRAM\n");
726 if ((result = sram_test_pass(lanai, 0x5555)) != 0)
728 if ((result = sram_test_pass(lanai, 0xAAAA)) != 0)
731 DPRINTK("clearing SRAM\n");
732 return sram_test_pass(lanai, 0x0000);
735 /* -------------------- CARD-BASED VCC TABLE UTILITIES: */
738 enum lanai_vcc_offset {
739 vcc_rxaddr1 = 0x00, /* Location1, plus bits: */
740 #define RXADDR1_SET_SIZE(x) ((x)*0x0000100) /* size of RX buffer */
741 #define RXADDR1_SET_RMMODE(x) ((x)*0x00800) /* RM cell action; values: */
742 #define RMMODE_TRASH (0) /* discard */
743 #define RMMODE_PRESERVE (1) /* input as AAL0 */
744 #define RMMODE_PIPE (2) /* pipe to coscheduler */
745 #define RMMODE_PIPEALL (3) /* pipe non-RM too */
746 #define RXADDR1_OAM_PRESERVE (0x00002000) /* Input OAM cells as AAL0 */
747 #define RXADDR1_SET_MODE(x) ((x)*0x0004000) /* Reassembly mode */
748 #define RXMODE_TRASH (0) /* discard */
749 #define RXMODE_AAL0 (1) /* non-AAL5 mode */
750 #define RXMODE_AAL5 (2) /* AAL5, intr. each PDU */
751 #define RXMODE_AAL5_STREAM (3) /* AAL5 w/o per-PDU intr */
752 vcc_rxaddr2 = 0x04, /* Location2 */
753 vcc_rxcrc1 = 0x08, /* RX CRC claculation space */
755 vcc_rxwriteptr = 0x10, /* RX writeptr, plus bits: */
756 #define RXWRITEPTR_LASTEFCI (0x00002000) /* Last PDU had EFCI bit */
757 #define RXWRITEPTR_DROPPING (0x00004000) /* Had error, dropping */
758 #define RXWRITEPTR_TRASHING (0x00008000) /* Trashing */
759 vcc_rxbufstart = 0x14, /* RX bufstart, plus bits: */
760 #define RXBUFSTART_CLP (0x00004000)
761 #define RXBUFSTART_CI (0x00008000)
762 vcc_rxreadptr = 0x18, /* RX readptr */
763 vcc_txicg = 0x1C, /* TX ICG */
764 vcc_txaddr1 = 0x20, /* Location1, plus bits: */
765 #define TXADDR1_SET_SIZE(x) ((x)*0x0000100) /* size of TX buffer */
766 #define TXADDR1_ABR (0x00008000) /* use ABR (doesn't work) */
767 vcc_txaddr2 = 0x24, /* Location2 */
768 vcc_txcrc1 = 0x28, /* TX CRC claculation space */
770 vcc_txreadptr = 0x30, /* TX Readptr, plus bits: */
771 #define TXREADPTR_GET_PTR(x) ((x)&0x01FFF)
772 #define TXREADPTR_MASK_DELTA (0x0000E000) /* ? */
773 vcc_txendptr = 0x34, /* TX Endptr, plus bits: */
774 #define TXENDPTR_CLP (0x00002000)
775 #define TXENDPTR_MASK_PDUMODE (0x0000C000) /* PDU mode; values: */
776 #define PDUMODE_AAL0 (0*0x04000)
777 #define PDUMODE_AAL5 (2*0x04000)
778 #define PDUMODE_AAL5STREAM (3*0x04000)
779 vcc_txwriteptr = 0x38, /* TX Writeptr */
780 #define TXWRITEPTR_GET_PTR(x) ((x)&0x1FFF)
781 vcc_txcbr_next = 0x3C /* # of next CBR VCI in ring */
782 #define TXCBR_NEXT_BOZO (0x00008000) /* "bozo bit" */
785 #define CARDVCC_SIZE (0x40)
787 static inline bus_addr_t cardvcc_addr(const struct lanai_dev *lanai,
790 return sram_addr(lanai, vci * CARDVCC_SIZE);
793 static inline u32 cardvcc_read(const struct lanai_vcc *lvcc,
794 enum lanai_vcc_offset offset)
797 APRINTK(lvcc->vbase != 0, "cardvcc_read: unbound vcc!\n");
798 val= readl(lvcc->vbase + (bus_addr_t) offset);
799 RWDEBUG("VR vci=%04d 0x%02X = 0x%08X\n",
800 lvcc->vci, (int) offset, val);
804 static inline void cardvcc_write(const struct lanai_vcc *lvcc,
805 u32 val, enum lanai_vcc_offset offset)
807 APRINTK(lvcc->vbase != 0, "cardvcc_write: unbound vcc!\n");
808 APRINTK((val & ~0xFFFF) == 0,
809 "cardvcc_write: bad val 0x%X (vci=%d, addr=0x%02X)\n",
810 val, lvcc->vci, (int) offset);
811 RWDEBUG("VW vci=%04d 0x%02X > 0x%08X\n",
812 lvcc->vci, (int) offset, val);
813 writel(val, lvcc->vbase + (bus_addr_t) offset);
816 /* -------------------- COMPUTE SIZE OF AN AAL5 PDU: */
818 /* How many bytes will an AAL5 PDU take to transmit - remember that:
819 * o we need to add 8 bytes for length, CPI, UU, and CRC
820 * o we need to round up to 48 bytes for cells
822 static inline int aal5_size(int size)
824 int cells = (size + 8 + 47) / 48;
828 /* How many bytes can we send if we have "space" space, assuming we have
831 static inline int aal5_spacefor(int space)
833 int cells = space / 48;
837 /* -------------------- FREE AN ATM SKB: */
839 static inline void lanai_free_skb(struct atm_vcc *atmvcc, struct sk_buff *skb)
841 if (atmvcc->pop != NULL)
842 atmvcc->pop(atmvcc, skb);
844 dev_kfree_skb_any(skb);
847 /* -------------------- TURN VCCS ON AND OFF: */
849 static void host_vcc_start_rx(const struct lanai_vcc *lvcc)
852 if (lvcc->rx.atmvcc->qos.aal == ATM_AAL5) {
853 unsigned long dmaaddr = lanai_buf_dmaaddr(&lvcc->rx.buf);
854 cardvcc_write(lvcc, 0xFFFF, vcc_rxcrc1);
855 cardvcc_write(lvcc, 0xFFFF, vcc_rxcrc2);
856 cardvcc_write(lvcc, 0, vcc_rxwriteptr);
857 cardvcc_write(lvcc, 0, vcc_rxbufstart);
858 cardvcc_write(lvcc, 0, vcc_rxreadptr);
859 cardvcc_write(lvcc, (dmaaddr >> 16) & 0xFFFF, vcc_rxaddr2);
860 addr1 = ((dmaaddr >> 8) & 0xFF) |
861 RXADDR1_SET_SIZE(lanai_buf_size_cardorder(&lvcc->rx.buf))|
862 RXADDR1_SET_RMMODE(RMMODE_TRASH) | /* ??? */
863 /* RXADDR1_OAM_PRESERVE | --- no OAM support yet */
864 RXADDR1_SET_MODE(RXMODE_AAL5);
866 addr1 = RXADDR1_SET_RMMODE(RMMODE_PRESERVE) | /* ??? */
867 RXADDR1_OAM_PRESERVE | /* ??? */
868 RXADDR1_SET_MODE(RXMODE_AAL0);
869 /* This one must be last! */
870 cardvcc_write(lvcc, addr1, vcc_rxaddr1);
873 static void host_vcc_start_tx(const struct lanai_vcc *lvcc)
875 unsigned long dmaaddr = lanai_buf_dmaaddr(&lvcc->tx.buf);
876 cardvcc_write(lvcc, 0, vcc_txicg);
877 cardvcc_write(lvcc, 0xFFFF, vcc_txcrc1);
878 cardvcc_write(lvcc, 0xFFFF, vcc_txcrc2);
879 cardvcc_write(lvcc, 0, vcc_txreadptr);
880 cardvcc_write(lvcc, 0, vcc_txendptr);
881 cardvcc_write(lvcc, 0, vcc_txwriteptr);
883 (lvcc->tx.atmvcc->qos.txtp.traffic_class == ATM_CBR) ?
884 TXCBR_NEXT_BOZO | lvcc->vci : 0, vcc_txcbr_next);
885 cardvcc_write(lvcc, (dmaaddr >> 16) & 0xFFFF, vcc_txaddr2);
887 ((dmaaddr >> 8) & 0xFF) |
888 TXADDR1_SET_SIZE(lanai_buf_size_cardorder(&lvcc->tx.buf)),
892 /* Shutdown receiving on card */
893 static void lanai_shutdown_rx_vci(const struct lanai_vcc *lvcc)
895 if (lvcc->vbase == 0) /* We were never bound to a VCI */
897 /* 15.1.1 - set to trashing, wait one cell time (15us) */
899 RXADDR1_SET_RMMODE(RMMODE_TRASH) |
900 RXADDR1_SET_MODE(RXMODE_TRASH), vcc_rxaddr1);
902 /* 15.1.2 - clear rest of entries */
903 cardvcc_write(lvcc, 0, vcc_rxaddr2);
904 cardvcc_write(lvcc, 0, vcc_rxcrc1);
905 cardvcc_write(lvcc, 0, vcc_rxcrc2);
906 cardvcc_write(lvcc, 0, vcc_rxwriteptr);
907 cardvcc_write(lvcc, 0, vcc_rxbufstart);
908 cardvcc_write(lvcc, 0, vcc_rxreadptr);
911 /* Shutdown transmitting on card.
912 * Unfortunately the lanai needs us to wait until all the data
913 * drains out of the buffer before we can dealloc it, so this
914 * can take awhile -- up to 370ms for a full 128KB buffer
915 * assuming everone else is quiet. In theory the time is
916 * boundless if there's a CBR VCC holding things up.
918 static void lanai_shutdown_tx_vci(struct lanai_dev *lanai,
919 struct lanai_vcc *lvcc)
922 unsigned long flags, timeout;
923 int read, write, lastread = -1;
924 APRINTK(!in_interrupt(),
925 "lanai_shutdown_tx_vci called w/o process context!\n");
926 if (lvcc->vbase == 0) /* We were never bound to a VCI */
928 /* 15.2.1 - wait for queue to drain */
929 spin_lock_irqsave(&lanai->txlock, flags);
930 if (lvcc->tx.inprogress != NULL) {
931 lanai_free_skb(lvcc->tx.atmvcc, lvcc->tx.inprogress);
932 lvcc->tx.inprogress = NULL;
934 while ((skb = skb_dequeue(&lvcc->tx.backlog)) != NULL)
935 lanai_free_skb(lvcc->tx.atmvcc, skb);
936 vcc_unmark_backlogged(lanai, lvcc);
937 spin_unlock_irqrestore(&lanai->txlock, flags);
938 timeout = jiffies + ((lanai_buf_size(&lvcc->tx.buf) * HZ) >> 17);
939 write = TXWRITEPTR_GET_PTR(cardvcc_read(lvcc, vcc_txwriteptr));
941 while (time_before_eq(jiffies, timeout)) {
942 schedule_timeout(HZ / 25);
944 read = TXREADPTR_GET_PTR(cardvcc_read(lvcc, vcc_txreadptr));
945 if (read == write && /* Is TX buffer empty? */
946 (lvcc->tx.atmvcc->qos.txtp.traffic_class != ATM_CBR ||
947 (cardvcc_read(lvcc, vcc_txcbr_next) &
948 TXCBR_NEXT_BOZO) == 0))
950 if (read != lastread) { /* Has there been any progress? */
955 printk(KERN_ERR DEV_LABEL "(itf %d): Timed out on backlog closing "
956 "vci %d\n", lvcc->tx.atmvcc->dev->number, lvcc->vci);
957 DPRINTK("read, write = %d, %d\n", read, write);
959 /* 15.2.2 - clear out all tx registers */
960 cardvcc_write(lvcc, 0, vcc_txreadptr);
961 cardvcc_write(lvcc, 0, vcc_txwriteptr);
962 cardvcc_write(lvcc, 0, vcc_txendptr);
963 cardvcc_write(lvcc, 0, vcc_txcrc1);
964 cardvcc_write(lvcc, 0, vcc_txcrc2);
965 cardvcc_write(lvcc, 0, vcc_txaddr2);
966 cardvcc_write(lvcc, 0, vcc_txaddr1);
969 /* -------------------- MANAGING AAL0 RX BUFFER: */
971 static inline int aal0_buffer_allocate(struct lanai_dev *lanai)
973 DPRINTK("aal0_buffer_allocate: allocating AAL0 RX buffer\n");
974 lanai_buf_allocate(&lanai->aal0buf, AAL0_RX_BUFFER_SIZE, 80);
975 return (lanai->aal0buf.order < 0) ? -ENOMEM : 0;
978 static inline void aal0_buffer_free(struct lanai_dev *lanai)
980 DPRINTK("aal0_buffer_allocate: freeing AAL0 RX buffer\n");
981 lanai_buf_deallocate(&lanai->aal0buf);
984 /* -------------------- EEPROM UTILITIES: */
986 /* Offsets of data in the EEPROM */
987 #define EEPROM_COPYRIGHT (0)
988 #define EEPROM_COPYRIGHT_LEN (44)
989 #define EEPROM_CHECKSUM (62)
990 #define EEPROM_CHECKSUM_REV (63)
991 #define EEPROM_MAC (64)
992 #define EEPROM_MAC_REV (70)
993 #define EEPROM_SERIAL (112)
994 #define EEPROM_SERIAL_REV (116)
995 #define EEPROM_MAGIC (120)
996 #define EEPROM_MAGIC_REV (124)
998 #define EEPROM_MAGIC_VALUE (0x5AB478D2)
1002 /* Stub functions to use if EEPROM reading is disabled */
1003 static int __init eeprom_read(struct lanai_dev *lanai)
1005 printk(KERN_INFO DEV_LABEL "(itf %d): *NOT* reading EEPROM\n",
1007 memset(&lanai->eeprom[EEPROM_MAC], 0, 6);
1011 static int __init eeprom_validate(struct lanai_dev *lanai)
1013 lanai->serialno = 0;
1014 lanai->magicno = EEPROM_MAGIC_VALUE;
1018 #else /* READ_EEPROM */
1020 static int __init eeprom_read(struct lanai_dev *lanai)
1025 #define set_config1(x) do { lanai->conf1 = x; conf1_write(lanai); \
1027 #define clock_h() set_config1(lanai->conf1 | CONFIG1_PROMCLK)
1028 #define clock_l() set_config1(lanai->conf1 &~ CONFIG1_PROMCLK)
1029 #define data_h() set_config1(lanai->conf1 | CONFIG1_PROMDATA)
1030 #define data_l() set_config1(lanai->conf1 &~ CONFIG1_PROMDATA)
1031 #define pre_read() do { data_h(); clock_h(); udelay(5); } while (0)
1032 #define read_pin() (reg_read(lanai, Status_Reg) & STATUS_PROMDATA)
1033 #define send_stop() do { data_l(); udelay(5); clock_h(); udelay(5); \
1034 data_h(); udelay(5); } while (0)
1035 /* start with both clock and data high */
1036 data_h(); clock_h(); udelay(5);
1037 for (address = 0; address < LANAI_EEPROM_SIZE; address++) {
1038 data = (address << 1) | 1; /* Command=read + address */
1039 /* send start bit */
1040 data_l(); udelay(5);
1041 clock_l(); udelay(5);
1042 for (i = 128; i != 0; i >>= 1) { /* write command out */
1043 tmp = (lanai->conf1 & ~CONFIG1_PROMDATA) |
1044 (data & i) ? CONFIG1_PROMDATA : 0;
1045 if (lanai->conf1 != tmp) {
1047 udelay(5); /* Let new data settle */
1049 clock_h(); udelay(5); clock_l(); udelay(5);
1052 data_h(); clock_h(); udelay(5);
1053 if (read_pin() != 0)
1054 goto error; /* No ack seen */
1055 clock_l(); udelay(5);
1056 /* read back result */
1057 for (data = 0, i = 7; i >= 0; i--) {
1058 data_h(); clock_h(); udelay(5);
1059 data = (data << 1) | !!read_pin();
1060 clock_l(); udelay(5);
1062 /* look again for ack */
1063 data_h(); clock_h(); udelay(5);
1064 if (read_pin() == 0)
1065 goto error; /* Spurious ack */
1066 clock_l(); udelay(5);
1068 lanai->eeprom[address] = data;
1069 DPRINTK("EEPROM 0x%04X %02X\n", address, data);
1073 clock_l(); udelay(5); /* finish read */
1075 printk(KERN_ERR DEV_LABEL "(itf %d): error reading EEPROM byte %d\n",
1076 lanai->number, address);
1088 /* read a big-endian 4-byte value out of eeprom */
1089 static inline u32 eeprom_be4(const struct lanai_dev *lanai, int address)
1091 return be32_to_cpup((u32 *) (&lanai->eeprom[address]));
1094 /* Checksum/validate EEPROM contents */
1095 static int __init eeprom_validate(struct lanai_dev *lanai)
1099 const u8 *e = lanai->eeprom;
1101 /* First, see if we can get an ASCIIZ string out of the copyright */
1102 for (i = EEPROM_COPYRIGHT;
1103 i < (EEPROM_COPYRIGHT + EEPROM_COPYRIGHT_LEN); i++)
1104 if (e[i] < 0x20 || e[i] > 0x7E)
1106 if ( i != EEPROM_COPYRIGHT &&
1107 i != EEPROM_COPYRIGHT + EEPROM_COPYRIGHT_LEN && e[i] == '\0')
1108 DPRINTK("eeprom: copyright = \"%s\"\n",
1109 (char *) &e[EEPROM_COPYRIGHT]);
1111 DPRINTK("eeprom: copyright not found\n");
1113 /* Validate checksum */
1114 for (i = s = 0; i < EEPROM_CHECKSUM; i++)
1117 if (s != e[EEPROM_CHECKSUM]) {
1118 printk(KERN_ERR DEV_LABEL "(itf %d): EEPROM checksum bad "
1119 "(wanted 0x%02X, got 0x%02X)\n", lanai->number,
1120 s, e[EEPROM_CHECKSUM]);
1124 if (s != e[EEPROM_CHECKSUM_REV]) {
1125 printk(KERN_ERR DEV_LABEL "(itf %d): EEPROM inverse checksum "
1126 "bad (wanted 0x%02X, got 0x%02X)\n", lanai->number,
1127 s, e[EEPROM_CHECKSUM_REV]);
1130 /* Verify MAC address */
1131 for (i = 0; i < 6; i++)
1132 if ((e[EEPROM_MAC + i] ^ e[EEPROM_MAC_REV + i]) != 0xFF) {
1133 printk(KERN_ERR DEV_LABEL
1134 "(itf %d) : EEPROM MAC addresses don't match "
1135 "(0x%02X, inverse 0x%02X)\n", lanai->number,
1136 e[EEPROM_MAC + i], e[EEPROM_MAC_REV + i]);
1139 DPRINTK("eeprom: MAC address = %02X:%02X:%02X:%02X:%02X:%02X\n",
1140 e[EEPROM_MAC + 0], e[EEPROM_MAC + 1], e[EEPROM_MAC + 2],
1141 e[EEPROM_MAC + 3], e[EEPROM_MAC + 4], e[EEPROM_MAC + 5]);
1142 /* Verify serial number */
1143 lanai->serialno = eeprom_be4(lanai, EEPROM_SERIAL);
1144 v = eeprom_be4(lanai, EEPROM_SERIAL_REV);
1145 if ((lanai->serialno ^ v) != 0xFFFFFFFF) {
1146 printk(KERN_ERR DEV_LABEL "(itf %d): EEPROM serial numbers "
1147 "don't match (0x%08X, inverse 0x%08X)\n", lanai->number,
1148 lanai->serialno, v);
1151 DPRINTK("eeprom: Serial number = %d\n", lanai->serialno);
1152 /* Verify magic number */
1153 lanai->magicno = eeprom_be4(lanai, EEPROM_MAGIC);
1154 v = eeprom_be4(lanai, EEPROM_MAGIC_REV);
1155 if ((lanai->magicno ^ v) != 0xFFFFFFFF) {
1156 printk(KERN_ERR DEV_LABEL "(itf %d): EEPROM magic numbers "
1157 "don't match (0x%08X, inverse 0x%08X)\n", lanai->number,
1161 DPRINTK("eeprom: Magic number = 0x%08X\n", lanai->magicno);
1162 if (lanai->magicno != EEPROM_MAGIC_VALUE)
1163 printk(KERN_WARNING DEV_LABEL "(itf %d): warning - EEPROM "
1164 "magic not what expected (got 0x%08X, not 0x%08X)\n",
1165 lanai->number, lanai->magicno, EEPROM_MAGIC_VALUE);
1169 #endif /* READ_EEPROM */
1171 static inline const u8 *eeprom_mac(const struct lanai_dev *lanai)
1173 return &lanai->eeprom[EEPROM_MAC];
1176 /* -------------------- INTERRUPT HANDLING UTILITIES: */
1178 /* Interrupt types */
1179 #define INT_STATS (0x00000002) /* Statistics counter overflow */
1180 #define INT_SOOL (0x00000004) /* SOOL changed state */
1181 #define INT_LOCD (0x00000008) /* LOCD changed state */
1182 #define INT_LED (0x00000010) /* LED (HAPPI) changed state */
1183 #define INT_GPIN (0x00000020) /* GPIN changed state */
1184 #define INT_PING (0x00000040) /* PING_COUNT fulfilled */
1185 #define INT_WAKE (0x00000080) /* Lanai wants bus */
1186 #define INT_CBR0 (0x00000100) /* CBR sched hit VCI 0 */
1187 #define INT_LOCK (0x00000200) /* Service list overflow */
1188 #define INT_MISMATCH (0x00000400) /* TX magic list mismatch */
1189 #define INT_AAL0_STR (0x00000800) /* Non-AAL5 buffer half filled */
1190 #define INT_AAL0 (0x00001000) /* Non-AAL5 data available */
1191 #define INT_SERVICE (0x00002000) /* Service list entries available */
1192 #define INT_TABORTSENT (0x00004000) /* Target abort sent by lanai */
1193 #define INT_TABORTBM (0x00008000) /* Abort rcv'd as bus master */
1194 #define INT_TIMEOUTBM (0x00010000) /* No response to bus master */
1195 #define INT_PCIPARITY (0x00020000) /* Parity error on PCI */
1197 /* Sets of the above */
1198 #define INT_ALL (0x0003FFFE) /* All interrupts */
1199 #define INT_STATUS (0x0000003C) /* Some status pin changed */
1200 #define INT_DMASHUT (0x00038000) /* DMA engine got shut down */
1201 #define INT_SEGSHUT (0x00000700) /* Segmentation got shut down */
1203 static inline u32 intr_pending(const struct lanai_dev *lanai)
1205 return reg_read(lanai, IntStatusMasked_Reg);
1208 static inline void intr_enable(const struct lanai_dev *lanai, u32 i)
1210 reg_write(lanai, i, IntControlEna_Reg);
1213 static inline void intr_disable(const struct lanai_dev *lanai, u32 i)
1215 reg_write(lanai, i, IntControlDis_Reg);
1218 /* -------------------- CARD/PCI STATUS: */
1220 static void status_message(int itf, const char *name, int status)
1222 static const char *onoff[2] = { "off to on", "on to off" };
1223 printk(KERN_INFO DEV_LABEL "(itf %d): %s changed from %s\n",
1224 itf, name, onoff[!status]);
1227 static void lanai_check_status(struct lanai_dev *lanai)
1229 u32 new = reg_read(lanai, Status_Reg);
1230 u32 changes = new ^ lanai->status;
1231 lanai->status = new;
1232 #define e(flag, name) \
1233 if (changes & flag) \
1234 status_message(lanai->number, name, new & flag)
1235 e(STATUS_SOOL, "SOOL");
1236 e(STATUS_LOCD, "LOCD");
1237 e(STATUS_LED, "LED");
1238 e(STATUS_GPIN, "GPIN");
1242 static void pcistatus_got(int itf, const char *name)
1244 printk(KERN_INFO DEV_LABEL "(itf %d): PCI got %s error\n", itf, name);
1247 static void pcistatus_check(struct lanai_dev *lanai, int clearonly)
1251 result = pci_read_config_word(lanai->pci, PCI_STATUS, &s);
1252 if (result != PCIBIOS_SUCCESSFUL) {
1253 printk(KERN_ERR DEV_LABEL "(itf %d): can't read PCI_STATUS: "
1254 "%d\n", lanai->number, result);
1257 s &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
1258 PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT |
1259 PCI_STATUS_SIG_TARGET_ABORT | PCI_STATUS_PARITY;
1262 result = pci_write_config_word(lanai->pci, PCI_STATUS, s);
1263 if (result != PCIBIOS_SUCCESSFUL)
1264 printk(KERN_ERR DEV_LABEL "(itf %d): can't write PCI_STATUS: "
1265 "%d\n", lanai->number, result);
1268 #define e(flag, name, stat) \
1270 pcistatus_got(lanai->number, name); \
1271 ++lanai->stats.pcierr_##stat; \
1273 e(PCI_STATUS_DETECTED_PARITY, "parity", parity_detect);
1274 e(PCI_STATUS_SIG_SYSTEM_ERROR, "signalled system", serr_set);
1275 e(PCI_STATUS_REC_MASTER_ABORT, "master", master_abort);
1276 e(PCI_STATUS_REC_TARGET_ABORT, "master target", m_target_abort);
1277 e(PCI_STATUS_SIG_TARGET_ABORT, "slave", s_target_abort);
1278 e(PCI_STATUS_PARITY, "master parity", master_parity);
1282 /* -------------------- VCC TX BUFFER UTILITIES: */
1284 /* space left in tx buffer in bytes */
1285 static inline int vcc_tx_space(const struct lanai_vcc *lvcc, int endptr)
1289 r -= ((unsigned long) lvcc->tx.buf.ptr) -
1290 ((unsigned long) lvcc->tx.buf.start);
1291 r -= 16; /* Leave "bubble" - if start==end it looks empty */
1293 r += lanai_buf_size(&lvcc->tx.buf);
1297 /* Bit fields in the segmentation buffer descriptor */
1298 #define DESCRIPTOR_MAGIC (0xD0000000)
1299 #define DESCRIPTOR_AAL5 (0x00008000)
1300 #define DESCRIPTOR_AAL5_STREAM (0x00004000)
1301 #define DESCRIPTOR_CLP (0x00002000)
1303 /* Add 32-bit descriptor with it's padding */
1304 static inline void vcc_tx_add_aal5_descriptor(struct lanai_vcc *lvcc,
1308 APRINTK((((unsigned long) lvcc->tx.buf.ptr) & 15) == 0,
1309 "vcc_tx_add_aal5_descriptor: bad ptr=%p\n", lvcc->tx.buf.ptr);
1310 lvcc->tx.buf.ptr += 4; /* Hope the values REALLY don't matter */
1311 pos = ((unsigned char *) lvcc->tx.buf.ptr) -
1312 (unsigned char *) lvcc->tx.buf.start;
1313 APRINTK((pos & ~0x0001FFF0) == 0,
1314 "vcc_tx_add_aal5_descriptor: bad pos (%d) before, vci=%d, "
1315 "start,ptr,end=%p,%p,%p\n", pos, lvcc->vci,
1316 lvcc->tx.buf.start, lvcc->tx.buf.ptr, lvcc->tx.buf.end);
1317 pos = (pos + len) & (lanai_buf_size(&lvcc->tx.buf) - 1);
1318 APRINTK((pos & ~0x0001FFF0) == 0,
1319 "vcc_tx_add_aal5_descriptor: bad pos (%d) after, vci=%d, "
1320 "start,ptr,end=%p,%p,%p\n", pos, lvcc->vci,
1321 lvcc->tx.buf.start, lvcc->tx.buf.ptr, lvcc->tx.buf.end);
1322 lvcc->tx.buf.ptr[-1] =
1323 cpu_to_le32(DESCRIPTOR_MAGIC | DESCRIPTOR_AAL5 |
1324 ((lvcc->tx.atmvcc->atm_options & ATM_ATMOPT_CLP) ?
1325 DESCRIPTOR_CLP : 0) | flags | pos >> 4);
1326 if (lvcc->tx.buf.ptr >= lvcc->tx.buf.end)
1327 lvcc->tx.buf.ptr = lvcc->tx.buf.start;
1330 /* Add 32-bit AAL5 trailer and leave room for its CRC */
1331 static inline void vcc_tx_add_aal5trailer(struct lanai_vcc *lvcc,
1332 int len, int cpi, int uu)
1334 APRINTK((((unsigned long) lvcc->tx.buf.ptr) & 15) == 8,
1335 "vcc_tx_add_aal5_descriptor: bad ptr=%p\n", lvcc->tx.buf.ptr);
1336 lvcc->tx.buf.ptr += 2;
1337 lvcc->tx.buf.ptr[-2] = cpu_to_be32((uu << 24) | (cpi << 16) | len);
1338 if (lvcc->tx.buf.ptr >= lvcc->tx.buf.end)
1339 lvcc->tx.buf.ptr = lvcc->tx.buf.start;
1342 static inline void vcc_tx_memcpy(struct lanai_vcc *lvcc,
1343 const unsigned char *src, int n)
1347 e = ((unsigned char *) lvcc->tx.buf.ptr) + n;
1348 m = e - (unsigned char *) lvcc->tx.buf.end;
1351 memcpy(lvcc->tx.buf.ptr, src, n - m);
1353 memcpy(lvcc->tx.buf.start, src + n - m, m);
1354 e = ((unsigned char *) lvcc->tx.buf.start) + m;
1356 lvcc->tx.buf.ptr = (u32 *) e;
1359 static inline void vcc_tx_memzero(struct lanai_vcc *lvcc, int n)
1365 e = ((unsigned char *) lvcc->tx.buf.ptr) + n;
1366 m = e - (unsigned char *) lvcc->tx.buf.end;
1369 memset(lvcc->tx.buf.ptr, 0, n - m);
1371 memset(lvcc->tx.buf.start, 0, m);
1372 e = ((unsigned char *) lvcc->tx.buf.start) + m;
1374 lvcc->tx.buf.ptr = (u32 *) e;
1377 /* Update "butt" register to specify new WritePtr */
1378 static inline void lanai_endtx(const struct lanai_dev *lanai,
1379 const struct lanai_vcc *lvcc)
1381 int i, ptr = ((unsigned char *) lvcc->tx.buf.ptr) -
1382 (unsigned char *) lvcc->tx.buf.start;
1383 APRINTK((ptr & ~0x0001FFF0) == 0,
1384 "lanai_endtx: bad ptr (%d), vci=%d, start,ptr,end=%p,%p,%p\n",
1385 ptr, lvcc->vci, lvcc->tx.buf.start, lvcc->tx.buf.ptr,
1388 * We need to check if the "butt busy" bit is set before
1389 * updating the butt register. In theory this should
1390 * never happen because the ATM card is plenty fast at
1391 * updating the register. Still, we should make sure
1393 for (i = 0; reg_read(lanai, Status_Reg) & STATUS_BUTTBUSY; i++) {
1395 printk(KERN_ERR DEV_LABEL "(itf %d): butt register "
1396 "always busy!\n", lanai->number);
1401 reg_write(lanai, (ptr << 12) | lvcc->vci, Butt_Reg);
1404 /* Try to fill the buffer - don't call unless there is backlog */
1405 static void vcc_tx_unqueue_aal5(struct lanai_dev *lanai,
1406 struct lanai_vcc *lvcc, int endptr)
1409 struct sk_buff *skb;
1410 int space = vcc_tx_space(lvcc, endptr);
1411 APRINTK(vcc_is_backlogged(lvcc),
1412 "vcc_tx_unqueue() called with empty backlog (vci=%d)\n",
1415 return; /* No space for even 1 cell+descriptor */
1416 if (lvcc->tx.inprogress != NULL) {
1417 APRINTK((lvcc->tx.inprogleft % 48) == 0,
1418 "vcc_tx_unqueue_aal5: bad progleft=%d\n",
1419 lvcc->tx.inprogleft);
1420 if (lvcc->tx.inprogleft + 16 > space) { /* Can't send all? */
1421 n = aal5_spacefor(space - 16); /* Bytes to send */
1422 vcc_tx_add_aal5_descriptor(lvcc,
1423 DESCRIPTOR_AAL5_STREAM, n);
1424 pad = lvcc->tx.pptr + n - lvcc->tx.inprogress->tail;
1427 vcc_tx_memcpy(lvcc, lvcc->tx.pptr, n - pad);
1428 vcc_tx_memzero(lvcc, pad);
1430 lvcc->tx.inprogleft -= n;
1431 goto end; /* Buffer is now full */
1433 /* OK, there's at least space for all of "inprogress" skb */
1434 vcc_tx_add_aal5_descriptor(lvcc, 0,
1435 lvcc->tx.inprogleft);
1436 pad = lvcc->tx.pptr + lvcc->tx.inprogleft -
1437 lvcc->tx.inprogress->tail;
1438 if (pad >= lvcc->tx.inprogleft) { /* Nothing but pad left */
1439 APRINTK(lvcc->tx.inprogleft == 48,
1440 "vcc_tx_unqueue_aal5: bad pure-pad=%d\n",
1441 lvcc->tx.inprogleft);
1444 vcc_tx_memcpy(lvcc, lvcc->tx.pptr,
1445 lvcc->tx.inprogleft - pad);
1446 vcc_tx_memzero(lvcc, pad - 8);
1447 vcc_tx_add_aal5trailer(lvcc, lvcc->tx.inprogress->len, 0, 0);
1448 lanai_free_skb(lvcc->tx.atmvcc, lvcc->tx.inprogress);
1449 lvcc->tx.inprogress = NULL;
1450 space -= lvcc->tx.inprogleft + 16;
1451 atomic_inc(&lvcc->tx.atmvcc->stats->tx);
1453 while (space >= 64) {
1454 if ((skb = skb_dequeue(&lvcc->tx.backlog)) == NULL)
1456 n = aal5_size(skb->len);
1457 if (n + 16 > space) { /* Can only send part */
1458 int m = aal5_spacefor(space - 16); /* Bytes to send */
1459 vcc_tx_add_aal5_descriptor(lvcc,
1460 DESCRIPTOR_AAL5_STREAM, m);
1461 lvcc->tx.pptr = skb->data + m;
1462 pad = lvcc->tx.pptr - skb->tail;
1465 vcc_tx_memcpy(lvcc, skb->data, m - pad);
1466 vcc_tx_memzero(lvcc, pad);
1467 lvcc->tx.inprogleft = n - m;
1468 lvcc->tx.inprogress = skb;
1471 vcc_tx_add_aal5_descriptor(lvcc, 0, n);
1472 pad = n - skb->len - 8;
1473 vcc_tx_memcpy(lvcc, skb->data, skb->len);
1474 vcc_tx_memzero(lvcc, pad);
1475 lanai_free_skb(lvcc->tx.atmvcc, skb);
1476 vcc_tx_add_aal5trailer(lvcc, skb->len, 0, 0);
1478 atomic_inc(&lvcc->tx.atmvcc->stats->tx);
1480 if (skb_queue_empty(&lvcc->tx.backlog))
1481 vcc_unmark_backlogged(lanai, lvcc);
1483 lanai_endtx(lanai, lvcc);
1486 /* Given an skb that we want to transmit either send it now or queue */
1487 static void vcc_tx_aal5(struct lanai_dev *lanai, struct lanai_vcc *lvcc,
1488 struct sk_buff *skb)
1491 if (vcc_is_backlogged(lvcc)) /* Already backlogged */
1493 space = vcc_tx_space(lvcc, TXREADPTR_GET_PTR(cardvcc_read(lvcc,
1496 vcc_mark_backlogged(lanai, lvcc); /* No space */
1499 if (space >= 16 + (n = aal5_size(skb->len))) {
1500 /* We can send the whole thing now */
1501 vcc_tx_add_aal5_descriptor(lvcc, 0, n);
1503 vcc_tx_memcpy(lvcc, skb->data, skb->len);
1504 vcc_tx_memzero(lvcc, pad - 8);
1505 vcc_tx_add_aal5trailer(lvcc, skb->len, 0, 0);
1506 lanai_free_skb(lvcc->tx.atmvcc, skb);
1507 atomic_inc(&lvcc->tx.atmvcc->stats->tx);
1508 } else { /* Space for only part of skb */
1509 int bytes = aal5_spacefor(space - 16); /* Bytes to send */
1510 vcc_tx_add_aal5_descriptor(lvcc,
1511 DESCRIPTOR_AAL5_STREAM, bytes);
1512 pad = bytes - skb->len;
1515 vcc_tx_memcpy(lvcc, skb->data, bytes - pad);
1516 vcc_tx_memzero(lvcc, pad);
1517 lvcc->tx.inprogress = skb;
1518 lvcc->tx.inprogleft = n - bytes;
1519 lvcc->tx.pptr = skb->data + bytes;
1520 vcc_mark_backlogged(lanai, lvcc);
1522 lanai_endtx(lanai, lvcc);
1525 skb_queue_tail(&lvcc->tx.backlog, skb);
1528 static void vcc_tx_unqueue_aal0(struct lanai_dev *lanai,
1529 struct lanai_vcc *lvcc, int endptr)
1531 printk(KERN_INFO DEV_LABEL
1532 ": vcc_tx_unqueue_aal0: not implemented\n");
1535 static void vcc_tx_aal0(struct lanai_dev *lanai, struct lanai_vcc *lvcc,
1536 struct sk_buff *skb)
1538 printk(KERN_INFO DEV_LABEL ": vcc_tx_aal0: not implemented\n");
1539 /* Remember to increment lvcc->tx.atmvcc->stats->tx */
1540 lanai_free_skb(lvcc->tx.atmvcc, skb);
1543 /* Try to undequeue 1 backlogged vcc */
1544 static void iter_dequeue(struct lanai_dev *lanai, vci_t vci)
1546 struct lanai_vcc *lvcc = lanai->vccs[vci];
1548 if (lvcc == NULL || !vcc_is_backlogged(lvcc)) {
1549 vci_bitfield_clear(&lanai->backlog_vccs, vci);
1552 endptr = TXREADPTR_GET_PTR(cardvcc_read(lvcc, vcc_txreadptr));
1553 lvcc->tx.unqueue(lanai, lvcc, endptr);
1556 /* Try a dequeue on all backlogged connections */
1557 static inline void vcc_tx_dequeue_all(struct lanai_dev *lanai)
1559 unsigned long flags;
1560 spin_lock_irqsave(&lanai->txlock, flags);
1561 vci_bitfield_iterate(lanai, &lanai->backlog_vccs, iter_dequeue);
1562 spin_unlock_irqrestore(&lanai->txlock, flags);
1565 /* -------------------- VCC RX BUFFER UTILITIES: */
1567 /* unlike the _tx_ cousins, this doesn't update ptr */
1568 static inline void vcc_rx_memcpy(unsigned char *dest,
1569 const struct lanai_vcc *lvcc, int n)
1571 int m = ((const unsigned char *) lvcc->rx.buf.ptr) + n -
1572 ((const unsigned char *) (lvcc->rx.buf.end));
1575 memcpy(dest, lvcc->rx.buf.ptr, n - m);
1576 memcpy(dest + n - m, lvcc->rx.buf.start, m);
1579 /* Receive AAL5 data on a VCC with a particular endptr */
1580 static void vcc_rx_aal5(struct lanai_vcc *lvcc, int endptr)
1583 struct sk_buff *skb;
1584 /*const*/ u32 *x, *end = &lvcc->rx.buf.start[endptr * 4];
1585 int n = ((unsigned long) end) - ((unsigned long) lvcc->rx.buf.ptr);
1587 n += lanai_buf_size(&lvcc->rx.buf);
1588 APRINTK(n >= 0 && n < lanai_buf_size(&lvcc->rx.buf) && !(n & 15),
1589 "vcc_rx_aal5: n out of range (%d/%d)\n",
1590 n, lanai_buf_size(&lvcc->rx.buf));
1591 /* Recover the second-to-last word to get true pdu length */
1592 if ((x = &end[-2]) < lvcc->rx.buf.start)
1593 x = &lvcc->rx.buf.end[-2];
1594 size = be32_to_cpup(x) & 0xffff;
1595 if (n != aal5_size(size)) { /* Make sure size matches padding */
1596 printk(KERN_INFO DEV_LABEL "(itf %d): Got bad AAL5 length "
1597 "on vci=%d - size=%d n=%d\n",
1598 lvcc->rx.atmvcc->dev->number, lvcc->vci, size, n);
1599 lvcc->stats.x.aal5.rx_badlen++;
1602 skb = atm_alloc_charge(lvcc->rx.atmvcc, size, GFP_ATOMIC);
1604 lvcc->stats.rx_nomem++;
1608 ATM_SKB(skb)->vcc = lvcc->rx.atmvcc;
1610 vcc_rx_memcpy(skb->data, lvcc, size);
1611 lvcc->rx.atmvcc->push(lvcc->rx.atmvcc, skb);
1612 atomic_inc(&lvcc->rx.atmvcc->stats->rx);
1614 lvcc->rx.buf.ptr = end;
1615 cardvcc_write(lvcc, endptr, vcc_rxreadptr);
1618 static void vcc_rx_aal0(struct lanai_dev *lanai)
1620 printk(KERN_INFO DEV_LABEL ": vcc_rx_aal0: not implemented\n");
1621 /* Remember to get vcclist_read_lock while looking up VC */
1622 /* Remember to increment lvcc->rx.atmvcc->stats->rx */
1625 /* -------------------- MANAGING HOST-BASED VCC TABLE: */
1627 /* Decide whether to use vmalloc or get_free_page for VCC table */
1628 #if (NUM_VCI * BITS_PER_LONG) <= PAGE_SIZE
1629 #define VCCTABLE_GETFREEPAGE
1631 #include <linux/vmalloc.h>
1634 static int __init vcc_table_allocate(struct lanai_dev *lanai)
1636 #ifdef VCCTABLE_GETFREEPAGE
1637 APRINTK((lanai->num_vci) * sizeof(struct lanai_vcc *) <= PAGE_SIZE,
1638 "vcc table > PAGE_SIZE!");
1639 lanai->vccs = (struct lanai_vcc **) get_free_page(GFP_KERNEL);
1640 return (lanai->vccs == NULL) ? -ENOMEM : 0;
1642 int bytes = (lanai->num_vci) * sizeof(struct lanai_vcc *);
1643 lanai->vccs = (struct lanai_vcc **) vmalloc(bytes);
1644 if (lanai->vccs == NULL)
1646 memset(lanai->vccs, 0, bytes);
1651 static inline void vcc_table_deallocate(const struct lanai_dev *lanai)
1653 #ifdef VCCTABLE_GETFREEPAGE
1654 free_page((unsigned long) lanai->vccs);
1660 /* Allocate a fresh lanai_vcc, with the appropriate things cleared */
1661 static inline struct lanai_vcc *new_lanai_vcc(void)
1663 struct lanai_vcc *lvcc;
1664 lvcc = (struct lanai_vcc *) kmalloc(sizeof(*lvcc), GFP_KERNEL);
1667 lvcc->rx.atmvcc = lvcc->tx.atmvcc = NULL;
1669 memset(&lvcc->stats, 0, sizeof lvcc->stats);
1670 lvcc->rx.buf.start = lvcc->tx.buf.start = NULL;
1671 skb_queue_head_init(&lvcc->tx.backlog);
1672 lvcc->tx.inprogress = NULL;
1674 lvcc->tx.unqueue = NULL;
1681 static int lanai_get_sized_buffer(int number, struct lanai_buffer *buf,
1682 int max_sdu, int multiplier, int min, const char *name)
1687 max_sdu = aal5_size(max_sdu);
1688 size = (max_sdu + 16) * multiplier + 16;
1689 lanai_buf_allocate(buf, size, min);
1692 if (lanai_buf_size(buf) < size)
1693 printk(KERN_WARNING DEV_LABEL "(itf %d): wanted %d bytes "
1694 "for %s buffer, got only %d\n", number, size, name,
1695 lanai_buf_size(buf));
1696 DPRINTK("Allocated %d byte %s buffer\n", lanai_buf_size(buf), name);
1700 /* Setup a RX buffer for a currently unbound AAL5 vci */
1701 static inline int lanai_setup_rx_vci_aal5(int number, struct lanai_vcc *lvcc,
1702 const struct atm_qos *qos)
1704 return lanai_get_sized_buffer(number, &lvcc->rx.buf,
1705 qos->rxtp.max_sdu, AAL5_RX_MULTIPLIER, qos->rxtp.max_sdu + 32,
1709 /* Setup a TX buffer for a currently unbound AAL5 vci */
1710 static int lanai_setup_tx_vci(int number, struct lanai_vcc *lvcc,
1711 const struct atm_qos *qos)
1713 int max_sdu, multiplier;
1714 if (qos->aal == ATM_AAL0) {
1715 lvcc->tx.unqueue = vcc_tx_unqueue_aal0;
1716 max_sdu = ATM_CELL_SIZE - 1;
1717 multiplier = AAL0_TX_MULTIPLIER;
1719 lvcc->tx.unqueue = vcc_tx_unqueue_aal5;
1720 max_sdu = qos->txtp.max_sdu;
1721 multiplier = AAL5_TX_MULTIPLIER;
1723 return lanai_get_sized_buffer(number, &lvcc->tx.buf, max_sdu,
1724 multiplier, 80, "TX");
1727 static inline void host_vcc_bind(struct lanai_dev *lanai,
1728 struct lanai_vcc *lvcc, vci_t vci)
1730 if (lvcc->vbase != 0)
1731 return; /* We already were bound in the other direction */
1732 DPRINTK("Binding vci %d\n", vci);
1733 #ifdef USE_POWERDOWN
1734 if (lanai->nbound++ == 0) {
1735 DPRINTK("Coming out of powerdown\n");
1736 lanai->conf1 &= ~CONFIG1_POWERDOWN;
1741 lvcc->vbase = cardvcc_addr(lanai, vci);
1742 lanai->vccs[lvcc->vci = vci] = lvcc;
1745 static inline void host_vcc_unbind(struct lanai_dev *lanai,
1746 struct lanai_vcc *lvcc)
1748 if (lvcc->vbase == 0)
1749 return; /* This vcc was never bound */
1750 DPRINTK("Unbinding vci %d\n", lvcc->vci);
1752 lanai->vccs[lvcc->vci] = NULL;
1753 #ifdef USE_POWERDOWN
1754 if (--lanai->nbound == 0) {
1755 DPRINTK("Going into powerdown\n");
1756 lanai->conf1 |= CONFIG1_POWERDOWN;
1762 /* -------------------- RESET CARD: */
1764 static void lanai_reset(struct lanai_dev *lanai)
1766 printk(KERN_CRIT DEV_LABEL "(itf %d): *NOT* reseting - not "
1767 "implemented\n", lanai->number);
1769 /* The following is just a hack until we write the real
1770 * resetter - at least ack whatever interrupt sent us
1773 reg_write(lanai, INT_ALL, IntAck_Reg);
1774 lanai->stats.card_reset++;
1777 /* -------------------- SERVICE LIST UTILITIES: */
1780 * Allocate service buffer and tell card about it
1782 static int __init service_buffer_allocate(struct lanai_dev *lanai)
1784 lanai_buf_allocate(&lanai->service, SERVICE_ENTRIES * 4, 0);
1785 if (lanai->service.order < 0)
1787 DPRINTK("allocated service buffer at 0x%08lX, size %d(%d)\n",
1788 (unsigned long) lanai->service.start,
1789 lanai_buf_size(&lanai->service),
1790 lanai_buf_size_cardorder(&lanai->service));
1791 /* Clear ServWrite register to be safe */
1792 reg_write(lanai, 0, ServWrite_Reg);
1793 /* ServiceStuff register contains size and address of buffer */
1795 SSTUFF_SET_SIZE(lanai_buf_size_cardorder(&lanai->service)) |
1796 SSTUFF_SET_ADDR(lanai_buf_dmaaddr(&lanai->service)),
1801 static inline void service_buffer_deallocate(struct lanai_dev *lanai)
1803 lanai_buf_deallocate(&lanai->service);
1806 /* Bitfields in service list */
1807 #define SERVICE_TX (0x80000000) /* Was from transmission */
1808 #define SERVICE_TRASH (0x40000000) /* RXed PDU was trashed */
1809 #define SERVICE_CRCERR (0x20000000) /* RXed PDU had CRC error */
1810 #define SERVICE_CI (0x10000000) /* RXed PDU had CI set */
1811 #define SERVICE_CLP (0x08000000) /* RXed PDU had CLP set */
1812 #define SERVICE_STREAM (0x04000000) /* RX Stream mode */
1813 #define SERVICE_GET_VCI(x) (((x)>>16)&0x3FF)
1814 #define SERVICE_GET_END(x) ((x)&0x1FFF)
1816 /* Handle one thing from the service list - returns true if it marked a
1817 * VCC ready for xmit
1819 static int handle_service(struct lanai_dev *lanai, u32 s)
1821 vci_t vci = SERVICE_GET_VCI(s);
1822 struct lanai_vcc *lvcc;
1823 vcclist_read_lock();
1824 lvcc = lanai->vccs[vci];
1826 vcclist_read_unlock();
1827 DPRINTK("(itf %d) got service entry 0x%X for nonexistent "
1828 "vcc %d\n", lanai->number, s, vci);
1830 lanai->stats.service_novcc_tx++;
1832 lanai->stats.service_novcc_rx++;
1835 if (s & SERVICE_TX) { /* segmentation interrupt */
1836 if (lvcc->tx.atmvcc == NULL) {
1837 vcclist_read_unlock();
1838 DPRINTK("(itf %d) got service entry 0x%X for non-TX "
1839 "vcc %d\n", lanai->number, s, vci);
1840 lanai->stats.service_notx++;
1843 vci_bitfield_set(&lanai->transmit_ready, vci);
1844 lvcc->tx.endptr = SERVICE_GET_END(s);
1845 vcclist_read_unlock();
1848 if (lvcc->rx.atmvcc == NULL) {
1849 vcclist_read_unlock();
1850 DPRINTK("(itf %d) got service entry 0x%X for non-RX "
1851 "vcc %d\n", lanai->number, s, vci);
1852 lanai->stats.service_norx++;
1855 if (lvcc->rx.atmvcc->qos.aal != ATM_AAL5) {
1856 vcclist_read_unlock();
1857 DPRINTK("(itf %d) got RX service entry 0x%X for non-AAL5 "
1858 "vcc %d\n", lanai->number, s, vci);
1859 lanai->stats.service_rxnotaal5++;
1860 atomic_inc(&lvcc->rx.atmvcc->stats->rx_err);
1863 if ((s & (SERVICE_TRASH | SERVICE_STREAM | SERVICE_CRCERR)) == 0) {
1864 vcc_rx_aal5(lvcc, SERVICE_GET_END(s));
1865 vcclist_read_unlock();
1868 if (s & SERVICE_TRASH) {
1870 vcclist_read_unlock();
1871 DPRINTK("got trashed rx pdu on vci %d\n", vci);
1872 atomic_inc(&lvcc->rx.atmvcc->stats->rx_err);
1873 lvcc->stats.x.aal5.service_trash++;
1874 bytes = (SERVICE_GET_END(s) * 16) -
1875 (((unsigned long) lvcc->rx.buf.ptr) -
1876 ((unsigned long) lvcc->rx.buf.start)) + 47;
1878 bytes += lanai_buf_size(&lvcc->rx.buf);
1879 lanai->stats.ovfl_trash += (bytes / 48);
1882 if (s & SERVICE_STREAM) {
1883 vcclist_read_unlock();
1884 atomic_inc(&lvcc->rx.atmvcc->stats->rx_err);
1885 lvcc->stats.x.aal5.service_stream++;
1886 printk(KERN_ERR DEV_LABEL "(itf %d): Got AAL5 stream "
1887 "PDU on VCI %d!\n", lanai->number, vci);
1891 DPRINTK("got rx crc error on vci %d\n", vci);
1892 atomic_inc(&lvcc->rx.atmvcc->stats->rx_err);
1893 lvcc->stats.x.aal5.service_rxcrc++;
1894 lvcc->rx.buf.ptr = &lvcc->rx.buf.start[SERVICE_GET_END(s) * 4];
1895 cardvcc_write(lvcc, SERVICE_GET_END(s), vcc_rxreadptr);
1896 vcclist_read_unlock();
1900 /* Try transmitting on all VCIs that we marked ready to serve */
1901 static void iter_transmit(struct lanai_dev *lanai, vci_t vci)
1903 struct lanai_vcc *lvcc = lanai->vccs[vci];
1904 if (!vcc_is_backlogged(lvcc))
1906 lvcc->tx.unqueue(lanai, lvcc, lvcc->tx.endptr);
1909 /* Run service queue -- called from interrupt context or with
1910 * interrupts otherwise disabled and with the lanai->servicelock
1913 static void run_service(struct lanai_dev *lanai)
1916 u32 wreg = reg_read(lanai, ServWrite_Reg);
1917 const u32 *end = lanai->service.start + wreg;
1918 while (lanai->service.ptr != end) {
1919 ntx += handle_service(lanai,
1920 le32_to_cpup(lanai->service.ptr++));
1921 if (lanai->service.ptr >= lanai->service.end)
1922 lanai->service.ptr = lanai->service.start;
1924 reg_write(lanai, wreg, ServRead_Reg);
1926 spin_lock(&lanai->txlock);
1927 vcclist_read_lock();
1928 vci_bitfield_iterate(lanai, &lanai->transmit_ready,
1930 vci_bitfield_init(&lanai->transmit_ready);
1931 vcclist_read_unlock();
1932 spin_unlock(&lanai->txlock);
1936 /* -------------------- GATHER STATISTICS: */
1938 static void get_statistics(struct lanai_dev *lanai)
1940 u32 statreg = reg_read(lanai, Statistics_Reg);
1941 lanai->stats.atm_ovfl += STATS_GET_FIFO_OVFL(statreg);
1942 lanai->stats.hec_err += STATS_GET_HEC_ERR(statreg);
1943 lanai->stats.vci_trash += STATS_GET_BAD_VCI(statreg);
1944 lanai->stats.ovfl_trash += STATS_GET_BUF_OVFL(statreg);
1947 /* -------------------- POLLING TIMER: */
1949 static void lanai_timed_poll(unsigned long arg)
1952 struct lanai_dev *lanai = (struct lanai_dev *) arg;
1953 unsigned long flags;
1954 #ifdef USE_POWERDOWN
1955 if (lanai->conf1 & CONFIG1_POWERDOWN)
1958 spin_lock_irqsave(&lanai->servicelock, flags);
1960 spin_unlock_irqrestore(&lanai->servicelock, flags);
1961 vcc_tx_dequeue_all(lanai);
1962 get_statistics(lanai);
1963 mod_timer(&lanai->timer, jiffies + LANAI_POLL_PERIOD);
1964 #endif /* DEBUG_RW */
1967 static inline void lanai_timed_poll_start(struct lanai_dev *lanai)
1969 init_timer(&lanai->timer);
1970 lanai->timer.expires = jiffies + LANAI_POLL_PERIOD;
1971 lanai->timer.data = (unsigned long) lanai;
1972 lanai->timer.function = lanai_timed_poll;
1973 add_timer(&lanai->timer);
1976 static inline void lanai_timed_poll_stop(struct lanai_dev *lanai)
1978 del_timer(&lanai->timer);
1981 /* -------------------- INTERRUPT SERVICE: */
1983 static inline void lanai_int_1(struct lanai_dev *lanai, u32 reason)
1986 if (reason & INT_SERVICE) {
1988 spin_lock(&lanai->servicelock);
1990 spin_unlock(&lanai->servicelock);
1992 if (reason & (INT_AAL0_STR | INT_AAL0)) {
1993 ack |= reason & (INT_AAL0_STR | INT_AAL0);
1996 if (reason & INT_STATS) {
1997 reason &= ~INT_STATS; /* No need to ack */
1998 get_statistics(lanai);
2000 if (reason & INT_STATUS) {
2001 ack |= reason & INT_STATUS;
2002 lanai_check_status(lanai);
2004 if (reason & INT_DMASHUT) {
2005 printk(KERN_ERR DEV_LABEL "(itf %d): driver error - DMA "
2006 "shutdown, reason=0x%08X, address=0x%08X\n",
2007 lanai->number, reason & INT_DMASHUT,
2008 reg_read(lanai, DMA_Addr_Reg));
2009 if (reason & INT_TABORTBM) {
2013 ack |= (reason & INT_DMASHUT);
2014 printk(KERN_ERR DEV_LABEL "(itf %d): re-enabling DMA\n",
2017 lanai->stats.dma_reenable++;
2018 pcistatus_check(lanai, 0);
2020 if (reason & INT_TABORTSENT) {
2021 ack |= (reason & INT_TABORTSENT);
2022 printk(KERN_ERR DEV_LABEL "(itf %d): sent PCI target abort\n",
2024 pcistatus_check(lanai, 0);
2026 if (reason & INT_SEGSHUT) {
2027 printk(KERN_ERR DEV_LABEL "(itf %d): driver error - "
2028 "segmentation shutdown, reason=0x%08X\n", lanai->number,
2029 reason & INT_SEGSHUT);
2033 if (reason & (INT_PING | INT_WAKE)) {
2034 printk(KERN_ERR DEV_LABEL "(itf %d): driver error - "
2035 "unexpected interrupt 0x%08X, resetting\n",
2036 lanai->number, reason & (INT_PING | INT_WAKE));
2041 if (ack != reason) {
2042 DPRINTK("unacked ints: 0x%08X\n", reason & ~ack);
2047 reg_write(lanai, ack, IntAck_Reg);
2050 static void lanai_int(int irq, void *devid, struct pt_regs *regs)
2052 struct lanai_dev *lanai = (struct lanai_dev *) devid;
2054 (void) irq; (void) regs; /* unused variables */
2055 #ifdef USE_POWERDOWN
2056 if (lanai->conf1 & CONFIG1_POWERDOWN) {
2057 lanai->conf1 &= ~CONFIG1_POWERDOWN;
2059 printk(KERN_WARNING DEV_LABEL "(itf %d): Got interrupt "
2060 "0x%08X while in POWERDOWN, powering up\n", lanai->conf1,
2061 intr_pending(lanai));
2065 while ((reason = intr_pending(lanai)) != 0)
2066 lanai_int_1(lanai, reason);
2069 /* TODO - it would be nice if we could use the "delayed interrupt" system
2073 /* -------------------- CHECK BOARD ID/REV: */
2076 * The board id and revision are stored both in the reset register and
2077 * in the PCI configuration space - the documentation says to check
2078 * each of them. If revp!=NULL we store the revision there
2080 static int check_board_id_and_rev(const char *name, u32 val, int *revp)
2082 DPRINTK("%s says board_id=%d, board_rev=%d\n", name,
2083 RESET_GET_BOARD_ID(val), RESET_GET_BOARD_REV(val));
2084 if (RESET_GET_BOARD_ID(val) != BOARD_ID_LANAI256) {
2085 printk(KERN_ERR DEV_LABEL ": Found %s board-id %d -- not a "
2086 "Lanai 25.6\n", name, RESET_GET_BOARD_ID(val));
2090 *revp = RESET_GET_BOARD_REV(val);
2094 /* -------------------- PCI INITIALIZATION/SHUTDOWN: */
2096 static inline int __init lanai_pci_start(struct lanai_dev *lanai)
2098 struct pci_dev *pci = lanai->pci;
2101 /* Get the pci revision byte */
2102 result = pci_read_config_byte(pci, PCI_REVISION_ID,
2103 &lanai->pci_revision);
2104 if (result != PCIBIOS_SUCCESSFUL) {
2105 printk(KERN_ERR DEV_LABEL "(itf %d): can't read "
2106 "PCI_REVISION_ID: %d\n", lanai->number, result);
2109 result = pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &w);
2110 if (result != PCIBIOS_SUCCESSFUL) {
2111 printk(KERN_ERR DEV_LABEL "(itf %d): can't read "
2112 "PCI_SUBSYSTEM_ID: %d\n", lanai->number, result);
2115 if ((result = check_board_id_and_rev("PCI", w, NULL)) != 0)
2117 /* Set latency timer to zero as per lanai docs */
2118 result = pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0);
2119 if (result != PCIBIOS_SUCCESSFUL) {
2120 printk(KERN_ERR DEV_LABEL "(itf %d): can't write "
2121 "PCI_LATENCY_TIMER: %d\n", lanai->number, result);
2124 result = pci_read_config_word(pci, PCI_COMMAND, &w);
2125 if (result != PCIBIOS_SUCCESSFUL) {
2126 printk(KERN_ERR DEV_LABEL "(itf %d): can't read "
2127 "PCI_COMMAND: %d\n", lanai->number, result);
2130 w |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR |
2131 PCI_COMMAND_PARITY);
2132 result = pci_write_config_word(pci, PCI_COMMAND, w);
2133 if (result != PCIBIOS_SUCCESSFUL) {
2134 printk(KERN_ERR DEV_LABEL "(itf %d): can't "
2135 "write PCI_COMMAND: %d\n", lanai->number, result);
2138 pcistatus_check(lanai, 1);
2139 pcistatus_check(lanai, 0);
2143 static void lanai_pci_stop(struct lanai_dev *lanai)
2145 struct pci_dev *pci = lanai->pci;
2148 result = pci_read_config_word(pci, PCI_COMMAND, &pci_command);
2149 if (result != PCIBIOS_SUCCESSFUL) {
2150 printk(KERN_ERR DEV_LABEL "(itf %d): can't "
2151 "read PCI_COMMAND: %d\n", lanai->number, result);
2154 pci_command &= ~(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
2155 result = pci_write_config_word(pci, PCI_COMMAND, pci_command);
2156 if (result != PCIBIOS_SUCCESSFUL)
2157 printk(KERN_ERR DEV_LABEL "(itf %d): can't "
2158 "write PCI_COMMAND: %d\n", lanai->number, result);
2161 /* -------------------- VPI/VCI ALLOCATION: */
2164 * We _can_ use VCI==0 for normal traffic, but only for UBR (or we'll
2165 * get a CBRZERO interrupt), and we can use it only if noone is receiving
2166 * AAL0 traffic (since they will use the same queue) - according to the
2167 * docs we shouldn't even use it for AAL0 traffic
2169 static inline int vci0_is_ok(struct lanai_dev *lanai,
2170 const struct atm_qos *qos)
2172 if (qos->txtp.traffic_class == ATM_CBR || qos->aal == ATM_AAL0)
2174 if (qos->rxtp.traffic_class != ATM_NONE) {
2175 if (lanai->naal0 != 0)
2177 lanai->conf2 |= CONFIG2_VCI0_NORMAL;
2178 #ifdef USE_POWERDOWN
2179 if ((lanai->conf1 & CONFIG1_POWERDOWN) == 0)
2186 /* return true if vci is currently unused, or if requested qos is
2189 static int vci_is_ok(struct lanai_dev *lanai, vci_t vci,
2190 const struct atm_vcc *atmvcc)
2192 const struct atm_qos *qos = &atmvcc->qos;
2193 const struct lanai_vcc *lvcc = lanai->vccs[vci];
2194 if (vci == 0 && !vci0_is_ok(lanai, qos))
2197 if (qos->rxtp.traffic_class != ATM_NONE &&
2198 lvcc->rx.atmvcc != NULL && lvcc->rx.atmvcc != atmvcc)
2200 if (qos->txtp.traffic_class != ATM_NONE &&
2201 lvcc->tx.atmvcc != NULL && lvcc->tx.atmvcc != atmvcc)
2203 if (qos->txtp.traffic_class == ATM_CBR &&
2204 lanai->cbrvcc != NULL && lanai->cbrvcc != atmvcc)
2207 if (qos->aal == ATM_AAL0 && lanai->naal0 == 0 &&
2208 qos->rxtp.traffic_class != ATM_NONE) {
2209 const struct lanai_vcc *vci0 = lanai->vccs[0];
2210 if (vci0 != NULL && vci0->rx.atmvcc != NULL)
2212 lanai->conf2 &= ~CONFIG2_VCI0_NORMAL;
2213 #ifdef USE_POWERDOWN
2214 if ((lanai->conf1 & CONFIG1_POWERDOWN) == 0)
2221 static int lanai_normalize_ci(struct lanai_dev *lanai,
2222 const struct atm_vcc *atmvcc, short *vpip, vci_t *vcip)
2235 for (*vcip = ATM_NOT_RSV_VCI; *vcip < lanai->num_vci;
2237 if (vci_is_ok(lanai, *vcip, atmvcc))
2241 if (*vcip >= lanai->num_vci || *vcip < 0 ||
2242 !vci_is_ok(lanai, *vcip, atmvcc))
2248 /* -------------------- MANAGE CBR: */
2251 * CBR ICG is stored as a fixed-point number with 4 fractional bits.
2252 * Note that storing a number greater than 2046.0 will result in
2255 #define CBRICG_FRAC_BITS (4)
2256 #define CBRICG_MAX (2046 << CBRICG_FRAC_BITS)
2259 * ICG is related to PCR with the formula PCR = MAXPCR / (ICG + 1)
2260 * where MAXPCR is (according to the docs) 25600000/(54*8),
2261 * which is equal to (3125<<9)/27.
2263 * Solving for ICG, we get:
2264 * ICG = MAXPCR/PCR - 1
2265 * ICG = (3125<<9)/(27*PCR) - 1
2266 * ICG = ((3125<<9) - (27*PCR)) / (27*PCR)
2268 * The end result is supposed to be a fixed-point number with FRAC_BITS
2269 * bits of a fractional part, so we keep everything in the numerator
2270 * shifted by that much as we compute
2273 static int pcr_to_cbricg(/*const*/ struct atm_qos *qos)
2275 int rounddown = 0; /* 1 = Round PCR down, i.e. round ICG _up_ */
2276 int x, icg, pcr = atm_pcr_goal(&qos->txtp);
2277 if (pcr == 0) /* Use maximum bandwidth */
2284 icg = (3125 << (9 + CBRICG_FRAC_BITS)) - (x << CBRICG_FRAC_BITS);
2288 if (icg > CBRICG_MAX)
2290 DPRINTK("pcr_to_cbricg: pcr=%d rounddown=%c icg=%d\n",
2291 pcr, rounddown ? 'Y' : 'N', icg);
2295 static inline void lanai_cbr_setup(struct lanai_dev *lanai)
2297 reg_write(lanai, pcr_to_cbricg(&lanai->cbrvcc->qos), CBR_ICG_Reg);
2298 reg_write(lanai, lanai->cbrvcc->vci, CBR_PTR_Reg);
2299 lanai->conf2 |= CONFIG2_CBR_ENABLE;
2303 static inline void lanai_cbr_shutdown(struct lanai_dev *lanai)
2305 lanai->conf2 &= ~CONFIG2_CBR_ENABLE;
2309 /* -------------------- OPERATIONS: */
2311 /* setup a newly detected device */
2312 static int __init lanai_dev_open(struct atm_dev *atmdev)
2314 struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
2315 unsigned long raw_base;
2318 DPRINTK("In lanai_dev_open()\n");
2319 /* Basic device fields */
2320 lanai->number = atmdev->number;
2321 lanai->num_vci = NUM_VCI;
2322 vci_bitfield_init(&lanai->backlog_vccs);
2323 vci_bitfield_init(&lanai->transmit_ready);
2325 #ifdef USE_POWERDOWN
2328 lanai->cbrvcc = NULL;
2329 memset(&lanai->stats, 0, sizeof lanai->stats);
2330 spin_lock_init(&lanai->txlock);
2331 spin_lock_init(&lanai->servicelock);
2332 atmdev->ci_range.vpi_bits = 0;
2333 atmdev->ci_range.vci_bits = 0;
2334 while (1 << atmdev->ci_range.vci_bits < lanai->num_vci)
2335 atmdev->ci_range.vci_bits++;
2336 atmdev->link_rate = ((25600000 / 8 - 8000) / 54);
2338 /* 3.2: PCI initialization */
2339 if ((result = lanai_pci_start(lanai)) != 0)
2341 raw_base = (bus_addr_t) lanai->pci->resource[0].start;
2342 lanai->base = (bus_addr_t) ioremap(raw_base, LANAI_MAPPING_SIZE);
2343 if (lanai->base == 0) {
2344 printk(KERN_ERR DEV_LABEL ": couldn't remap I/O space\n");
2347 /* 3.3: Reset lanai and PHY */
2349 lanai->conf1 = reg_read(lanai, Config1_Reg);
2350 lanai->conf1 &= ~(CONFIG1_GPOUT1 | CONFIG1_POWERDOWN |
2351 CONFIG1_MASK_LEDMODE);
2352 lanai->conf1 |= CONFIG1_SET_LEDMODE(LEDMODE_NOT_SOOL);
2353 reg_write(lanai, lanai->conf1 | CONFIG1_GPOUT1, Config1_Reg);
2358 * 3.4: Turn on endian mode for big-endian hardware
2359 * We don't actually want to do this - the actual bit fields
2360 * in the endian register are not documented anywhere.
2361 * Instead we do the bit-flipping ourselves on big-endian
2364 * 3.5: get the board ID/rev by reading the reset register
2366 result = check_board_id_and_rev("register",
2367 reg_read(lanai, Reset_Reg), &lanai->board_rev);
2371 /* 3.6: read EEPROM */
2372 if ((result = eeprom_read(lanai)) != 0)
2374 if ((result = eeprom_validate(lanai)) != 0)
2377 /* 3.7: re-reset PHY, do loopback tests, setup PHY */
2378 reg_write(lanai, lanai->conf1 | CONFIG1_GPOUT1, Config1_Reg);
2381 /* TODO - loopback tests */
2382 lanai->conf1 |= (CONFIG1_GPOUT2 | CONFIG1_GPOUT3 | CONFIG1_DMA_ENABLE);
2385 /* 3.8/3.9: test and initialize card SRAM */
2386 if ((result = sram_test_and_clear(lanai)) != 0)
2389 /* 3.10: initialize lanai registers */
2390 lanai->conf1 |= CONFIG1_DMA_ENABLE;
2392 if ((result = service_buffer_allocate(lanai)) != 0)
2394 if ((result = vcc_table_allocate(lanai)) != 0)
2396 lanai->conf2 = (lanai->num_vci >= 512 ? CONFIG2_HOWMANY : 0) |
2397 CONFIG2_HEC_DROP | /* ??? */ CONFIG2_PTI7_MODE;
2399 reg_write(lanai, TX_FIFO_DEPTH, TxDepth_Reg);
2400 reg_write(lanai, 0, CBR_ICG_Reg); /* CBR defaults to no limit */
2401 if ((result = request_irq(lanai->pci->irq, lanai_int, SA_SHIRQ,
2402 "lanai", lanai)) != 0) {
2403 printk(KERN_ERR DEV_LABEL ": can't allocate interrupt\n");
2404 goto error_vcctable;
2406 MOD_INC_USE_COUNT; /* At this point we can't fail */
2407 intr_enable(lanai, INT_ALL & ~(INT_PING | INT_WAKE));
2408 /* 3.11: initialize loop mode (i.e. turn looping off) */
2409 lanai->conf1 = (lanai->conf1 & ~CONFIG1_MASK_LOOPMODE) |
2410 CONFIG1_SET_LOOPMODE(LOOPMODE_NORMAL) |
2411 CONFIG1_GPOUT2 | CONFIG1_GPOUT3;
2413 lanai->status = reg_read(lanai, Status_Reg);
2414 /* We're now done initializing this card */
2415 #ifdef USE_POWERDOWN
2416 lanai->conf1 |= CONFIG1_POWERDOWN;
2419 memcpy(atmdev->esi, eeprom_mac(lanai), ESI_LEN);
2420 lanai_timed_poll_start(lanai);
2421 printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d, base=0x%lx, irq=%d "
2422 "(%02X-%02X-%02X-%02X-%02X-%02X)\n", lanai->number,
2423 lanai->pci_revision, (long) lanai->base, lanai->pci->irq,
2424 atmdev->esi[0], atmdev->esi[1], atmdev->esi[2],
2425 atmdev->esi[3], atmdev->esi[4], atmdev->esi[5]);
2426 printk(KERN_NOTICE DEV_LABEL "(itf %d): LANAI%s, serialno=%d(0x%X), "
2427 "board_rev=%d\n", lanai->number,
2428 lanai->type==lanai2 ? "2" : "HB", lanai->serialno,
2429 lanai->serialno, lanai->board_rev);
2433 vcc_table_deallocate(lanai);
2435 service_buffer_deallocate(lanai);
2438 #ifdef USE_POWERDOWN
2439 lanai->conf1 = reg_read(lanai, Config1_Reg) | CONFIG1_POWERDOWN;
2442 iounmap((void *) lanai->base);
2444 lanai_pci_stop(lanai);
2449 /* called when device is being shutdown, and all vcc's are gone - higher
2450 * levels will deallocate the atm device for us
2452 static void lanai_dev_close(struct atm_dev *atmdev)
2454 struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
2455 printk(KERN_INFO DEV_LABEL "(itf %d): shutting down interface\n",
2457 lanai_timed_poll_stop(lanai);
2458 #ifdef USE_POWERDOWN
2459 lanai->conf1 = reg_read(lanai, Config1_Reg) & ~CONFIG1_POWERDOWN;
2462 intr_disable(lanai, INT_ALL);
2463 free_irq(lanai->pci->irq, lanai);
2465 #ifdef USE_POWERDOWN
2466 lanai->conf1 |= CONFIG1_POWERDOWN;
2469 lanai_pci_stop(lanai);
2470 vcc_table_deallocate(lanai);
2471 service_buffer_deallocate(lanai);
2472 iounmap((void *) lanai->base);
2478 static void lanai_close(struct atm_vcc *atmvcc)
2480 struct lanai_vcc *lvcc = (struct lanai_vcc *) atmvcc->dev_data;
2481 struct lanai_dev *lanai = (struct lanai_dev *) atmvcc->dev->dev_data;
2484 clear_bit(ATM_VF_READY, &atmvcc->flags);
2485 clear_bit(ATM_VF_PARTIAL, &atmvcc->flags);
2486 if (lvcc->rx.atmvcc == atmvcc) {
2487 lanai_shutdown_rx_vci(lvcc);
2488 if (atmvcc->qos.aal == ATM_AAL0) {
2489 if (--lanai->naal0 <= 0)
2490 aal0_buffer_free(lanai);
2492 lanai_buf_deallocate(&lvcc->rx.buf);
2493 lvcc->rx.atmvcc = NULL;
2495 if (lvcc->tx.atmvcc == atmvcc) {
2496 if (atmvcc == lanai->cbrvcc) {
2497 if (lvcc->vbase != 0)
2498 lanai_cbr_shutdown(lanai);
2499 lanai->cbrvcc = NULL;
2501 lanai_shutdown_tx_vci(lanai, lvcc);
2502 lanai_buf_deallocate(&lvcc->tx.buf);
2503 lvcc->tx.atmvcc = NULL;
2505 if (--lvcc->nref == 0) {
2506 host_vcc_unbind(lanai, lvcc);
2509 atmvcc->dev_data = NULL;
2510 clear_bit(ATM_VF_ADDR, &atmvcc->flags);
2513 /* open a vcc on the card to vpi/vci */
2514 static int lanai_open(struct atm_vcc *atmvcc, short vpi, int vci)
2516 struct lanai_dev *lanai;
2517 struct lanai_vcc *lvcc;
2519 /* we don't support partial open - it's not really useful anyway */
2520 if ((test_bit(ATM_VF_PARTIAL, &atmvcc->flags)) ||
2521 (vpi == ATM_VPI_UNSPEC) || (vci == ATM_VCI_UNSPEC))
2523 lanai = (struct lanai_dev *) atmvcc->dev->dev_data;
2524 if ((result = lanai_normalize_ci(lanai, atmvcc, &vpi, &vci)) != 0)
2528 set_bit(ATM_VF_ADDR, &atmvcc->flags);
2529 lvcc = lanai->vccs[vci];
2530 if (atmvcc->qos.aal != ATM_AAL0 && atmvcc->qos.aal != ATM_AAL5)
2533 DPRINTK(DEV_LABEL "(itf %d): open %d.%d flags=0x%X\n",
2534 lanai->number, vpi, vci, (unsigned long) atmvcc->flags);
2536 DPRINTK(DEV_LABEL "(itf %d): open %d.%d\n", lanai->number, vpi, vci);
2538 if (lvcc == NULL && (lvcc = new_lanai_vcc()) == NULL)
2540 atmvcc->dev_data = lvcc;
2542 if (atmvcc->qos.rxtp.traffic_class != ATM_NONE) {
2543 APRINTK(lvcc->rx.atmvcc == NULL, "rx.atmvcc!=NULL, vci=%d\n",
2545 if (atmvcc->qos.aal == ATM_AAL0) {
2546 if (lanai->naal0 == 0)
2547 result = aal0_buffer_allocate(lanai);
2549 result = lanai_setup_rx_vci_aal5(
2550 lanai->number, lvcc, &atmvcc->qos);
2553 lvcc->rx.atmvcc = atmvcc;
2554 lvcc->stats.rx_nomem = 0;
2555 lvcc->stats.x.aal5.rx_badlen = 0;
2556 lvcc->stats.x.aal5.service_trash = 0;
2557 lvcc->stats.x.aal5.service_stream = 0;
2558 lvcc->stats.x.aal5.service_rxcrc = 0;
2559 if (atmvcc->qos.aal == ATM_AAL0)
2562 if (atmvcc->qos.txtp.traffic_class != ATM_NONE) {
2563 APRINTK(lvcc->tx.atmvcc == NULL, "tx.atmvcc!=NULL, vci=%d\n",
2565 result = lanai_setup_tx_vci(lanai->number, lvcc, &atmvcc->qos);
2568 lvcc->tx.atmvcc = atmvcc;
2569 if (atmvcc->qos.txtp.traffic_class == ATM_CBR) {
2570 APRINTK(lanai->cbrvcc == NULL,
2571 "cbrvcc!=NULL, vci=%d\n", vci);
2572 lanai->cbrvcc = atmvcc;
2575 host_vcc_bind(lanai, lvcc, vci);
2576 if (atmvcc == lvcc->rx.atmvcc)
2577 host_vcc_start_rx(lvcc);
2578 if (atmvcc == lvcc->tx.atmvcc) {
2579 host_vcc_start_tx(lvcc);
2580 if (lanai->cbrvcc == atmvcc)
2581 lanai_cbr_setup(lanai);
2583 set_bit(ATM_VF_READY, &atmvcc->flags);
2586 lanai_close(atmvcc);
2591 /* ioctl operations for card */
2592 /* NOTE: these are all DEBUGGING ONLY currently */
2593 static int lanai_ioctl(struct atm_dev *atmdev, unsigned int cmd, void *arg)
2596 struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
2599 shutdown_atm_dev(atmdev);
2602 unsigned long flags;
2603 spin_lock_irqsave(&lanai->servicelock, flags);
2605 spin_unlock_irqrestore(&lanai->servicelock, flags);
2608 vcc_tx_dequeue_all(lanai);
2611 get_statistics(lanai);
2615 for (i = 0; i <= 0x5C ; i += 4) {
2616 if (i==0x48) /* Write-only butt reg */
2618 printk(KERN_CRIT DEV_LABEL " 0x%02X: "
2620 (u32) readl(lanai->base + i));
2622 pcistatus_check(lanai, 0);
2630 struct pci_dev *pci = lanai->pci;
2631 (void) pci_read_config_word(pci, PCI_VENDOR_ID, &w);
2632 DPRINTK("vendor = 0x%X\n", w);
2633 (void) pci_read_config_word(pci, PCI_DEVICE_ID, &w);
2634 DPRINTK("device = 0x%X\n", w);
2635 (void) pci_read_config_word(pci, PCI_COMMAND, &w);
2636 DPRINTK("command = 0x%X\n", w);
2637 (void) pci_read_config_word(pci, PCI_STATUS, &w);
2638 DPRINTK("status = 0x%X\n", w);
2639 (void) pci_read_config_dword(pci,
2640 PCI_CLASS_REVISION, &dw);
2641 DPRINTK("class/revision = 0x%X\n", dw);
2642 (void) pci_read_config_byte(pci,
2643 PCI_CACHE_LINE_SIZE, &b);
2644 DPRINTK("cache line size = 0x%X\n", b);
2645 (void) pci_read_config_byte(pci, PCI_LATENCY_TIMER, &b);
2646 DPRINTK("latency = %d (0x%X)\n", b, b);
2647 (void) pci_read_config_byte(pci, PCI_HEADER_TYPE, &b);
2648 DPRINTK("header type = 0x%X\n", b);
2649 (void) pci_read_config_byte(pci, PCI_BIST, &b);
2650 DPRINTK("bist = 0x%X\n", b);
2651 /* skipping a few here */
2652 (void) pci_read_config_byte(pci,
2653 PCI_INTERRUPT_LINE, &b);
2654 DPRINTK("pci_int_line = 0x%X\n", b);
2655 (void) pci_read_config_byte(pci,
2656 PCI_INTERRUPT_PIN, &b);
2657 DPRINTK("pci_int_pin = 0x%X\n", b);
2658 (void) pci_read_config_byte(pci, PCI_MIN_GNT, &b);
2659 DPRINTK("min_gnt = 0x%X\n", b);
2660 (void) pci_read_config_byte(pci, PCI_MAX_LAT, &b);
2661 DPRINTK("max_lat = 0x%X\n", b); }
2663 #ifdef USE_POWERDOWN
2665 DPRINTK("Coming out of powerdown\n");
2666 lanai->conf1 &= ~CONFIG1_POWERDOWN;
2676 static int lanai_send(struct atm_vcc *atmvcc, struct sk_buff *skb)
2678 struct lanai_vcc *lvcc = (struct lanai_vcc *) atmvcc->dev_data;
2679 struct lanai_dev *lanai = (struct lanai_dev *) atmvcc->dev->dev_data;
2680 unsigned long flags;
2681 if (lvcc == NULL || lvcc->vbase == 0 || lvcc->tx.atmvcc != atmvcc)
2685 DPRINTK("lanai_send: skb==NULL for vci=%d\n", atmvcc->vci);
2688 if (lanai == NULL) {
2689 DPRINTK("lanai_send: lanai==NULL for vci=%d\n", atmvcc->vci);
2693 ATM_SKB(skb)->vcc = atmvcc;
2694 switch (atmvcc->qos.aal) {
2696 spin_lock_irqsave(&lanai->txlock, flags);
2697 vcc_tx_aal5(lanai, lvcc, skb);
2698 spin_unlock_irqrestore(&lanai->txlock, flags);
2701 if (skb->len != ATM_CELL_SIZE-1)
2703 /* NOTE - this next line is technically invalid - we haven't unshared skb */
2704 cpu_to_be32s((u32 *) skb->data);
2705 spin_lock_irqsave(&lanai->txlock, flags);
2706 vcc_tx_aal0(lanai, lvcc, skb);
2707 spin_unlock_irqrestore(&lanai->txlock, flags);
2710 DPRINTK("lanai_send: bad aal=%d on vci=%d\n", atmvcc->qos.aal,
2713 lanai_free_skb(atmvcc, skb);
2717 static int lanai_change_qos(struct atm_vcc *atmvcc,
2718 /*const*/ struct atm_qos *qos, int flags)
2720 return -EBUSY; /* TODO: need to write this */
2723 #ifndef CONFIG_PROC_FS
2724 #define lanai_proc_read NULL
2726 static int lanai_proc_read(struct atm_dev *atmdev, loff_t *pos, char *page)
2728 struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
2730 struct lanai_vcc *lvcc;
2732 return sprintf(page, DEV_LABEL "(itf %d): chip=LANAI%s, "
2733 "serial=%d, magic=0x%08X, num_vci=%d\n",
2734 atmdev->number, lanai->type==lanai2 ? "2" : "HB",
2735 lanai->serialno, lanai->magicno, lanai->num_vci);
2737 return sprintf(page, "revision: board=%d, pci_if=%d\n",
2738 lanai->board_rev, lanai->pci_revision);
2740 return sprintf(page, "EEPROM ESI: "
2741 "%02X:%02X:%02X:%02X:%02X:%02X\n",
2742 lanai->eeprom[EEPROM_MAC + 0],
2743 lanai->eeprom[EEPROM_MAC + 1],
2744 lanai->eeprom[EEPROM_MAC + 2],
2745 lanai->eeprom[EEPROM_MAC + 3],
2746 lanai->eeprom[EEPROM_MAC + 4],
2747 lanai->eeprom[EEPROM_MAC + 5]);
2749 return sprintf(page, "status: SOOL=%d, LOCD=%d, LED=%d, "
2750 "GPIN=%d\n", (lanai->status & STATUS_SOOL) ? 1 : 0,
2751 (lanai->status & STATUS_LOCD) ? 1 : 0,
2752 (lanai->status & STATUS_LED) ? 1 : 0,
2753 (lanai->status & STATUS_GPIN) ? 1 : 0);
2755 return sprintf(page, "global buffer sizes: service=%d, "
2756 "aal0_rx=%d\n", lanai_buf_size(&lanai->service),
2757 lanai->naal0 ? lanai_buf_size(&lanai->aal0buf) : 0);
2759 get_statistics(lanai);
2760 return sprintf(page, "cells in error: overflow=%d, "
2761 "closed_vci=%d, bad_HEC=%d, rx_fifo=%d\n",
2762 lanai->stats.ovfl_trash, lanai->stats.vci_trash,
2763 lanai->stats.hec_err, lanai->stats.atm_ovfl);
2766 return sprintf(page, "PCI errors: parity_detect=%d, "
2767 "master_abort=%d, master_target_abort=%d,\n",
2768 lanai->stats.pcierr_parity_detect,
2769 lanai->stats.pcierr_serr_set,
2770 lanai->stats.pcierr_m_target_abort);
2772 return sprintf(page, " slave_target_abort=%d, "
2773 "master_parity=%d\n", lanai->stats.pcierr_s_target_abort,
2774 lanai->stats.pcierr_master_parity);
2776 return sprintf(page, "service list errors: no_vcc_rx=%d, "
2777 "no_vcc_tx=%d,\n", lanai->stats.service_novcc_rx,
2778 lanai->stats.service_novcc_tx);
2780 return sprintf(page, " no_tx=%d, "
2781 "no_rx=%d, bad_rx_aal=%d\n", lanai->stats.service_norx,
2782 lanai->stats.service_notx,
2783 lanai->stats.service_rxnotaal5);
2785 return sprintf(page, "resets: dma=%d, card=%d\n",
2786 lanai->stats.dma_reenable, lanai->stats.card_reset);
2787 /* At this point, "left" should be the VCI we're looking for */
2788 vcclist_read_lock();
2790 if (left >= NUM_VCI) {
2794 if ((lvcc = lanai->vccs[left]) != NULL)
2798 /* Note that we re-use "left" here since we're done with it */
2799 left = sprintf(page, "VCI %4d: nref=%d, rx_nomem=%d", (vci_t) left,
2800 lvcc->nref, lvcc->stats.rx_nomem);
2801 if (lvcc->rx.atmvcc != NULL) {
2802 left += sprintf(&page[left], ",\n rx_AAL=%d",
2803 lvcc->rx.atmvcc->qos.aal == ATM_AAL5 ? 5 : 0);
2804 if (lvcc->rx.atmvcc->qos.aal == ATM_AAL5)
2805 left += sprintf(&page[left], ", rx_buf_size=%d, "
2806 "rx_bad_len=%d,\n rx_service_trash=%d, "
2807 "rx_service_stream=%d, rx_bad_crc=%d",
2808 lanai_buf_size(&lvcc->rx.buf),
2809 lvcc->stats.x.aal5.rx_badlen,
2810 lvcc->stats.x.aal5.service_trash,
2811 lvcc->stats.x.aal5.service_stream,
2812 lvcc->stats.x.aal5.service_rxcrc);
2814 if (lvcc->tx.atmvcc != NULL)
2815 left += sprintf(&page[left], ",\n tx_AAL=%d, "
2816 "tx_buf_size=%d, tx_qos=%cBR, tx_backlogged=%c",
2817 lvcc->tx.atmvcc->qos.aal == ATM_AAL5 ? 5 : 0,
2818 lanai_buf_size(&lvcc->tx.buf),
2819 lvcc->tx.atmvcc == lanai->cbrvcc ? 'C' : 'U',
2820 vcc_is_backlogged(lvcc) ? 'Y' : 'N');
2821 page[left++] = '\n';
2824 vcclist_read_unlock();
2827 #endif /* CONFIG_PROC_FS */
2829 /* -------------------- HOOKS: */
2831 static const struct atmdev_ops ops = {
2832 dev_close: lanai_dev_close,
2839 sg_send: NULL, /* no scatter-gather on card */
2840 send_oam: NULL, /* OAM support not in linux yet */
2844 change_qos: lanai_change_qos,
2845 proc_read: lanai_proc_read
2848 /* detect one type of card LANAI2 or LANAIHB */
2849 static int __init lanai_detect_1(unsigned int vendor, unsigned int device)
2851 struct pci_dev *pci = NULL;
2852 struct lanai_dev *lanai;
2853 struct atm_dev *atmdev;
2854 int count = 0, result;
2855 while ((pci = pci_find_device(vendor, device, pci)) != NULL) {
2856 lanai = (struct lanai_dev *)
2857 kmalloc(sizeof *lanai, GFP_KERNEL);
2858 if (lanai == NULL) {
2859 printk(KERN_ERR DEV_LABEL ": couldn't allocate "
2860 "dev_data structure!\n");
2863 atmdev = atm_dev_register(DEV_LABEL, &ops, -1, 0);
2864 if (atmdev == NULL) {
2865 printk(KERN_ERR DEV_LABEL ": couldn't register "
2870 atmdev->dev_data = lanai;
2872 lanai->type = (enum lanai_type) device;
2873 if ((result = lanai_dev_open(atmdev)) != 0) {
2874 DPRINTK("lanai_start() failed, err=%d\n", -result);
2875 atm_dev_deregister(atmdev);
2887 int __init lanai_detect(void)
2889 return lanai_detect_1(PCI_VENDOR_ID_EF, PCI_VENDOR_ID_EF_ATM_LANAI2) +
2890 lanai_detect_1(PCI_VENDOR_ID_EF, PCI_VENDOR_ID_EF_ATM_LANAIHB);
2895 int init_module(void)
2897 if (lanai_detect() == 0) {
2898 printk(KERN_ERR DEV_LABEL ": no adaptor found\n");
2904 void cleanup_module(void)
2906 /* We'll only get called when all the interfaces are already
2907 * gone, so there isn't much to do
2909 DPRINTK("cleanup_module()\n");
2912 MODULE_AUTHOR("Mitchell Blank Jr <mitch@sfgoth.com>");
2913 MODULE_DESCRIPTION("Efficient Networks Speedstream 3010 driver");
2914 MODULE_LICENSE("GPL");