1 /******************************************************************************
5 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
7 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
8 * It was taken from the frle-0.22 device driver.
9 * As the file doesn't have a copyright notice, in the file
10 * nicstarmac.copyright I put the copyright notice from the
11 * frle-0.22 device driver.
12 * Some code is based on the nicstar driver by M. Welsh.
14 * Author: Rui Prior (rprior@inescn.pt)
15 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
21 ******************************************************************************/
24 /**** IMPORTANT INFORMATION ***************************************************
26 * There are currently three types of spinlocks:
28 * 1 - Per card interrupt spinlock (to protect structures and such)
29 * 2 - Per SCQ scq spinlock
30 * 3 - Per card resource spinlock (to access registers, etc.)
32 * These must NEVER be grabbed in reverse order.
34 ******************************************************************************/
36 /* Header files ***************************************************************/
38 #include <linux/module.h>
39 #include <linux/config.h>
40 #include <linux/kernel.h>
41 #include <linux/skbuff.h>
42 #include <linux/atmdev.h>
43 #include <linux/atm.h>
44 #include <linux/pci.h>
45 #include <linux/types.h>
46 #include <linux/string.h>
47 #include <linux/delay.h>
48 #include <linux/init.h>
49 #include <linux/sched.h>
50 #include <linux/timer.h>
51 #include <linux/interrupt.h>
52 #include <linux/bitops.h>
54 #include <asm/uaccess.h>
55 #include <asm/atomic.h>
57 #include "nicstarmac.h"
58 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
60 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
61 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
63 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
65 #if BITS_PER_LONG != 32
66 # error FIXME: this driver requires a 32-bit platform
69 /* Additional code ************************************************************/
71 #include "nicstarmac.c"
74 /* Configurable parameters ****************************************************/
82 #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
83 you're going to use only raw ATM */
86 /* Do not touch these *********************************************************/
89 #define TXPRINTK(args...) printk(args)
91 #define TXPRINTK(args...)
95 #define RXPRINTK(args...) printk(args)
97 #define RXPRINTK(args...)
101 #define PRINTK(args...) printk(args)
103 #define PRINTK(args...)
104 #endif /* GENERAL_DEBUG */
107 #define XPRINTK(args...) printk(args)
109 #define XPRINTK(args...)
110 #endif /* EXTRA_DEBUG */
113 /* Macros *********************************************************************/
115 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
117 #define NS_DELAY mdelay(1)
119 #define ALIGN_BUS_ADDR(addr, alignment) \
120 ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
121 #define ALIGN_ADDRESS(addr, alignment) \
122 bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
127 #define ATM_SKB(s) (&(s)->atm)
130 /* Spinlock debugging stuff */
131 #ifdef NS_DEBUG_SPINLOCKS /* See nicstar.h */
132 #define ns_grab_int_lock(card,flags) \
134 unsigned long nsdsf, nsdsf2; \
135 local_irq_save(flags); \
136 save_flags(nsdsf); cli();\
137 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
138 (flags)&(1<<9)?"en":"dis"); \
139 if (spin_is_locked(&(card)->int_lock) && \
140 (card)->cpu_int == smp_processor_id()) { \
141 printk("nicstar.c: line %d (cpu %d) int_lock already locked at line %d (cpu %d)\n", \
142 __LINE__, smp_processor_id(), (card)->has_int_lock, \
144 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
146 if (spin_is_locked(&(card)->res_lock) && \
147 (card)->cpu_res == smp_processor_id()) { \
148 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying int)\n", \
149 __LINE__, smp_processor_id(), (card)->has_res_lock, \
151 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
153 spin_lock_irq(&(card)->int_lock); \
154 (card)->has_int_lock = __LINE__; \
155 (card)->cpu_int = smp_processor_id(); \
156 restore_flags(nsdsf); } while (0)
157 #define ns_grab_res_lock(card,flags) \
159 unsigned long nsdsf, nsdsf2; \
160 local_irq_save(flags); \
161 save_flags(nsdsf); cli();\
162 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
163 (flags)&(1<<9)?"en":"dis"); \
164 if (spin_is_locked(&(card)->res_lock) && \
165 (card)->cpu_res == smp_processor_id()) { \
166 printk("nicstar.c: line %d (cpu %d) res_lock already locked at line %d (cpu %d)\n", \
167 __LINE__, smp_processor_id(), (card)->has_res_lock, \
169 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
171 spin_lock_irq(&(card)->res_lock); \
172 (card)->has_res_lock = __LINE__; \
173 (card)->cpu_res = smp_processor_id(); \
174 restore_flags(nsdsf); } while (0)
175 #define ns_grab_scq_lock(card,scq,flags) \
177 unsigned long nsdsf, nsdsf2; \
178 local_irq_save(flags); \
179 save_flags(nsdsf); cli();\
180 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
181 (flags)&(1<<9)?"en":"dis"); \
182 if (spin_is_locked(&(scq)->lock) && \
183 (scq)->cpu_lock == smp_processor_id()) { \
184 printk("nicstar.c: line %d (cpu %d) this scq_lock already locked at line %d (cpu %d)\n", \
185 __LINE__, smp_processor_id(), (scq)->has_lock, \
187 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
189 if (spin_is_locked(&(card)->res_lock) && \
190 (card)->cpu_res == smp_processor_id()) { \
191 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying scq)\n", \
192 __LINE__, smp_processor_id(), (card)->has_res_lock, \
194 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
196 spin_lock_irq(&(scq)->lock); \
197 (scq)->has_lock = __LINE__; \
198 (scq)->cpu_lock = smp_processor_id(); \
199 restore_flags(nsdsf); } while (0)
200 #else /* !NS_DEBUG_SPINLOCKS */
201 #define ns_grab_int_lock(card,flags) \
202 spin_lock_irqsave(&(card)->int_lock,(flags))
203 #define ns_grab_res_lock(card,flags) \
204 spin_lock_irqsave(&(card)->res_lock,(flags))
205 #define ns_grab_scq_lock(card,scq,flags) \
206 spin_lock_irqsave(&(scq)->lock,flags)
207 #endif /* NS_DEBUG_SPINLOCKS */
210 /* Function declarations ******************************************************/
212 static u32 ns_read_sram(ns_dev *card, u32 sram_address);
213 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
214 static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
215 static void __devinit ns_init_card_error(ns_dev *card, int error);
216 static scq_info *get_scq(int size, u32 scd);
217 static void free_scq(scq_info *scq, struct atm_vcc *vcc);
218 static void push_rxbufs(ns_dev *card, u32 type, u32 handle1, u32 addr1,
219 u32 handle2, u32 addr2);
220 static void ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs);
221 static int ns_open(struct atm_vcc *vcc, short vpi, int vci);
222 static void ns_close(struct atm_vcc *vcc);
223 static void fill_tst(ns_dev *card, int n, vc_map *vc);
224 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
225 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
226 struct sk_buff *skb);
227 static void process_tsq(ns_dev *card);
228 static void drain_scq(ns_dev *card, scq_info *scq, int pos);
229 static void process_rsq(ns_dev *card);
230 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
231 #ifdef NS_USE_DESTRUCTORS
232 static void ns_sb_destructor(struct sk_buff *sb);
233 static void ns_lb_destructor(struct sk_buff *lb);
234 static void ns_hb_destructor(struct sk_buff *hb);
235 #endif /* NS_USE_DESTRUCTORS */
236 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
237 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
238 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
239 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
240 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
241 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
242 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void *arg);
243 static void which_list(ns_dev *card, struct sk_buff *skb);
244 static void ns_poll(unsigned long arg);
245 static int ns_parse_mac(char *mac, unsigned char *esi);
246 static short ns_h2i(char c);
247 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
249 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
253 /* Global variables ***********************************************************/
255 static struct ns_dev *cards[NS_MAX_CARDS];
256 static unsigned num_cards;
257 static struct atmdev_ops atm_ops =
265 proc_read: ns_proc_read,
268 static struct timer_list ns_timer;
269 static char *mac[NS_MAX_CARDS];
270 MODULE_PARM(mac, "1-" __MODULE_STRING(NS_MAX_CARDS) "s");
271 MODULE_LICENSE("GPL");
274 /* Functions*******************************************************************/
276 static int __devinit nicstar_init_one(struct pci_dev *pcidev,
277 const struct pci_device_id *ent)
279 static int index = -1;
285 error = ns_init_card(index, pcidev);
287 cards[index--] = NULL; /* don't increment index */
298 static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
301 ns_dev *card = pci_get_drvdata(pcidev);
303 struct sk_buff *iovb;
309 if (cards[i] == NULL)
312 if (card->atmdev->phy && card->atmdev->phy->stop)
313 card->atmdev->phy->stop(card->atmdev);
315 /* Stop everything */
316 writel(0x00000000, card->membase + CFG);
318 /* De-register device */
319 atm_dev_deregister(card->atmdev);
321 /* Disable PCI device */
322 pci_disable_device(pcidev);
324 /* Free up resources */
326 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
327 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
329 dev_kfree_skb_any(hb);
332 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
334 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
335 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
337 dev_kfree_skb_any(iovb);
340 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
341 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
342 dev_kfree_skb_any(lb);
343 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
344 dev_kfree_skb_any(sb);
345 free_scq(card->scq0, NULL);
346 for (j = 0; j < NS_FRSCD_NUM; j++)
348 if (card->scd2vc[j] != NULL)
349 free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
351 kfree(card->rsq.org);
352 kfree(card->tsq.org);
353 free_irq(card->pcidev->irq, card);
354 iounmap((void *) card->membase);
360 static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
362 {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
363 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
364 {0,} /* terminate list */
366 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
370 static struct pci_driver nicstar_driver = {
372 .id_table = nicstar_pci_tbl,
373 .probe = nicstar_init_one,
374 .remove = __devexit_p(nicstar_remove_one),
379 static int __init nicstar_init(void)
381 unsigned error = 0; /* Initialized to remove compile warning */
383 XPRINTK("nicstar: nicstar_init() called.\n");
385 error = pci_module_init(&nicstar_driver);
387 TXPRINTK("nicstar: TX debug enabled.\n");
388 RXPRINTK("nicstar: RX debug enabled.\n");
389 PRINTK("nicstar: General debug enabled.\n");
391 printk("nicstar: using PHY loopback.\n");
392 #endif /* PHY_LOOPBACK */
393 XPRINTK("nicstar: nicstar_init() returned.\n");
396 init_timer(&ns_timer);
397 ns_timer.expires = jiffies + NS_POLL_PERIOD;
399 ns_timer.function = ns_poll;
400 add_timer(&ns_timer);
408 static void __exit nicstar_cleanup(void)
410 XPRINTK("nicstar: nicstar_cleanup() called.\n");
413 printk("nicstar: module in use, remove delayed.\n");
415 del_timer(&ns_timer);
417 pci_unregister_driver(&nicstar_driver);
419 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
424 static u32 ns_read_sram(ns_dev *card, u32 sram_address)
429 sram_address &= 0x0007FFFC; /* address must be dword aligned */
430 sram_address |= 0x50000000; /* SRAM read command */
431 ns_grab_res_lock(card, flags);
432 while (CMD_BUSY(card));
433 writel(sram_address, card->membase + CMD);
434 while (CMD_BUSY(card));
435 data = readl(card->membase + DR0);
436 spin_unlock_irqrestore(&card->res_lock, flags);
442 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
446 count--; /* count range now is 0..3 instead of 1..4 */
448 c <<= 2; /* to use increments of 4 */
449 ns_grab_res_lock(card, flags);
450 while (CMD_BUSY(card));
451 for (i = 0; i <= c; i += 4)
452 writel(*(value++), card->membase + i);
453 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
454 so card->membase + DR0 == card->membase */
456 sram_address &= 0x0007FFFC;
457 sram_address |= (0x40000000 | count);
458 writel(sram_address, card->membase + CMD);
459 spin_unlock_irqrestore(&card->res_lock, flags);
463 static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
466 struct ns_dev *card = NULL;
467 unsigned char pci_latency;
476 if (pci_enable_device(pcidev))
478 printk("nicstar%d: can't enable PCI device\n", i);
480 ns_init_card_error(card, error);
484 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
486 printk("nicstar%d: can't allocate memory for device structure.\n", i);
488 ns_init_card_error(card, error);
492 spin_lock_init(&card->int_lock);
493 spin_lock_init(&card->res_lock);
495 pci_set_drvdata(pcidev, card);
499 card->pcidev = pcidev;
500 card->membase = pci_resource_start(pcidev, 1);
501 card->membase = (unsigned long) ioremap(card->membase, NS_IOREMAP_SIZE);
502 if (card->membase == 0)
504 printk("nicstar%d: can't ioremap() membase.\n",i);
506 ns_init_card_error(card, error);
509 PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
511 pci_set_master(pcidev);
513 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
515 printk("nicstar%d: can't read PCI latency timer.\n", i);
517 ns_init_card_error(card, error);
520 #ifdef NS_PCI_LATENCY
521 if (pci_latency < NS_PCI_LATENCY)
523 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
524 for (j = 1; j < 4; j++)
526 if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
531 printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
533 ns_init_card_error(card, error);
537 #endif /* NS_PCI_LATENCY */
539 /* Clear timer overflow */
540 data = readl(card->membase + STAT);
541 if (data & NS_STAT_TMROF)
542 writel(NS_STAT_TMROF, card->membase + STAT);
545 writel(NS_CFG_SWRST, card->membase + CFG);
547 writel(0x00000000, card->membase + CFG);
550 writel(0x00000008, card->membase + GP);
552 writel(0x00000001, card->membase + GP);
554 while (CMD_BUSY(card));
555 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
558 /* Detect PHY type */
559 while (CMD_BUSY(card));
560 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
561 while (CMD_BUSY(card));
562 data = readl(card->membase + DR0);
565 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
566 card->max_pcr = ATM_25_PCR;
567 while(CMD_BUSY(card));
568 writel(0x00000008, card->membase + DR0);
569 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
570 /* Clear an eventual pending interrupt */
571 writel(NS_STAT_SFBQF, card->membase + STAT);
573 while(CMD_BUSY(card));
574 writel(0x00000022, card->membase + DR0);
575 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
576 #endif /* PHY_LOOPBACK */
580 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
581 card->max_pcr = ATM_OC3_PCR;
583 while(CMD_BUSY(card));
584 writel(0x00000002, card->membase + DR0);
585 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
586 #endif /* PHY_LOOPBACK */
589 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
591 ns_init_card_error(card, error);
594 writel(0x00000000, card->membase + GP);
596 /* Determine SRAM size */
598 ns_write_sram(card, 0x1C003, &data, 1);
600 ns_write_sram(card, 0x14003, &data, 1);
601 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
602 ns_read_sram(card, 0x1C003) == 0x76543210)
603 card->sram_size = 128;
605 card->sram_size = 32;
606 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
608 card->rct_size = NS_MAX_RCTSIZE;
610 #if (NS_MAX_RCTSIZE == 4096)
611 if (card->sram_size == 128)
612 printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
613 #elif (NS_MAX_RCTSIZE == 16384)
614 if (card->sram_size == 32)
616 printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
617 card->rct_size = 4096;
620 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
623 card->vpibits = NS_VPIBITS;
624 if (card->rct_size == 4096)
625 card->vcibits = 12 - NS_VPIBITS;
626 else /* card->rct_size == 16384 */
627 card->vcibits = 14 - NS_VPIBITS;
629 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
631 nicstar_init_eprom(card->membase);
633 if (request_irq(pcidev->irq, &ns_irq_handler, SA_INTERRUPT | SA_SHIRQ, "nicstar", card) != 0)
635 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
637 ns_init_card_error(card, error);
641 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
642 writel(0x00000000, card->membase + VPM);
645 card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
646 if (card->tsq.org == NULL)
648 printk("nicstar%d: can't allocate TSQ.\n", i);
650 ns_init_card_error(card, error);
653 card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
654 card->tsq.next = card->tsq.base;
655 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
656 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
657 ns_tsi_init(card->tsq.base + j);
658 writel(0x00000000, card->membase + TSQH);
659 writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
660 PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
661 (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
664 card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
665 if (card->rsq.org == NULL)
667 printk("nicstar%d: can't allocate RSQ.\n", i);
669 ns_init_card_error(card, error);
672 card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
673 card->rsq.next = card->rsq.base;
674 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
675 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
676 ns_rsqe_init(card->rsq.base + j);
677 writel(0x00000000, card->membase + RSQH);
678 writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
679 PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
681 /* Initialize SCQ0, the only VBR SCQ used */
682 card->scq1 = (scq_info *) NULL;
683 card->scq2 = (scq_info *) NULL;
684 card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
685 if (card->scq0 == (scq_info *) NULL)
687 printk("nicstar%d: can't get SCQ0.\n", i);
689 ns_init_card_error(card, error);
692 u32d[0] = (u32) virt_to_bus(card->scq0->base);
693 u32d[1] = (u32) 0x00000000;
694 u32d[2] = (u32) 0xffffffff;
695 u32d[3] = (u32) 0x00000000;
696 ns_write_sram(card, NS_VRSCD0, u32d, 4);
697 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
698 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
699 card->scq0->scd = NS_VRSCD0;
700 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
702 /* Initialize TSTs */
703 card->tst_addr = NS_TST0;
704 card->tst_free_entries = NS_TST_NUM_ENTRIES;
705 data = NS_TST_OPCODE_VARIABLE;
706 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
707 ns_write_sram(card, NS_TST0 + j, &data, 1);
708 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
709 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
710 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
711 ns_write_sram(card, NS_TST1 + j, &data, 1);
712 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
713 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
714 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
715 card->tste2vc[j] = NULL;
716 writel(NS_TST0 << 2, card->membase + TSTB);
719 /* Initialize RCT. AAL type is set on opening the VC. */
721 u32d[0] = NS_RCTE_RAWCELLINTEN;
723 u32d[0] = 0x00000000;
724 #endif /* RCQ_SUPPORT */
725 u32d[1] = 0x00000000;
726 u32d[2] = 0x00000000;
727 u32d[3] = 0xFFFFFFFF;
728 for (j = 0; j < card->rct_size; j++)
729 ns_write_sram(card, j * 4, u32d, 4);
731 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
733 for (j = 0; j < NS_FRSCD_NUM; j++)
734 card->scd2vc[j] = NULL;
736 /* Initialize buffer levels */
737 card->sbnr.min = MIN_SB;
738 card->sbnr.init = NUM_SB;
739 card->sbnr.max = MAX_SB;
740 card->lbnr.min = MIN_LB;
741 card->lbnr.init = NUM_LB;
742 card->lbnr.max = MAX_LB;
743 card->iovnr.min = MIN_IOVB;
744 card->iovnr.init = NUM_IOVB;
745 card->iovnr.max = MAX_IOVB;
746 card->hbnr.min = MIN_HB;
747 card->hbnr.init = NUM_HB;
748 card->hbnr.max = MAX_HB;
750 card->sm_handle = 0x00000000;
751 card->sm_addr = 0x00000000;
752 card->lg_handle = 0x00000000;
753 card->lg_addr = 0x00000000;
755 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
757 /* Pre-allocate some huge buffers */
758 skb_queue_head_init(&card->hbpool.queue);
759 card->hbpool.count = 0;
760 for (j = 0; j < NUM_HB; j++)
763 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
766 printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
769 ns_init_card_error(card, error);
772 skb_queue_tail(&card->hbpool.queue, hb);
773 card->hbpool.count++;
777 /* Allocate large buffers */
778 skb_queue_head_init(&card->lbpool.queue);
779 card->lbpool.count = 0; /* Not used */
780 for (j = 0; j < NUM_LB; j++)
783 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
786 printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
789 ns_init_card_error(card, error);
792 skb_queue_tail(&card->lbpool.queue, lb);
793 skb_reserve(lb, NS_SMBUFSIZE);
794 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
795 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
799 card->rawch = (u32) virt_to_bus(lb->data);
802 /* Test for strange behaviour which leads to crashes */
803 if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
805 printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
808 ns_init_card_error(card, error);
813 /* Allocate small buffers */
814 skb_queue_head_init(&card->sbpool.queue);
815 card->sbpool.count = 0; /* Not used */
816 for (j = 0; j < NUM_SB; j++)
819 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
822 printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
825 ns_init_card_error(card, error);
828 skb_queue_tail(&card->sbpool.queue, sb);
829 skb_reserve(sb, NS_AAL0_HEADER);
830 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
832 /* Test for strange behaviour which leads to crashes */
833 if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
835 printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
838 ns_init_card_error(card, error);
843 /* Allocate iovec buffers */
844 skb_queue_head_init(&card->iovpool.queue);
845 card->iovpool.count = 0;
846 for (j = 0; j < NUM_IOVB; j++)
848 struct sk_buff *iovb;
849 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
852 printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
855 ns_init_card_error(card, error);
858 skb_queue_tail(&card->iovpool.queue, iovb);
859 card->iovpool.count++;
864 /* Configure NICStAR */
865 if (card->rct_size == 4096)
866 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
867 else /* (card->rct_size == 16384) */
868 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
872 /* Register device */
873 card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
874 if (card->atmdev == NULL)
876 printk("nicstar%d: can't register device.\n", i);
878 ns_init_card_error(card, error);
882 if (ns_parse_mac(mac[i], card->atmdev->esi)) {
883 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
884 card->atmdev->esi, 6);
885 if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
886 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
887 card->atmdev->esi, 6);
891 printk("nicstar%d: MAC address %02X:%02X:%02X:%02X:%02X:%02X\n", i,
892 card->atmdev->esi[0], card->atmdev->esi[1], card->atmdev->esi[2],
893 card->atmdev->esi[3], card->atmdev->esi[4], card->atmdev->esi[5]);
895 card->atmdev->dev_data = card;
896 card->atmdev->ci_range.vpi_bits = card->vpibits;
897 card->atmdev->ci_range.vci_bits = card->vcibits;
898 card->atmdev->link_rate = card->max_pcr;
899 card->atmdev->phy = NULL;
901 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
902 if (card->max_pcr == ATM_OC3_PCR)
903 suni_init(card->atmdev);
904 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
906 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
907 if (card->max_pcr == ATM_25_PCR)
908 idt77105_init(card->atmdev);
909 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
911 if (card->atmdev->phy && card->atmdev->phy->start)
912 card->atmdev->phy->start(card->atmdev);
914 writel(NS_CFG_RXPATH |
921 NS_CFG_RXINT_NODELAY |
922 NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
926 NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
928 card->membase + CFG);
937 static void __devinit ns_init_card_error(ns_dev *card, int error)
941 writel(0x00000000, card->membase + CFG);
945 struct sk_buff *iovb;
946 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
947 dev_kfree_skb_any(iovb);
952 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
953 dev_kfree_skb_any(sb);
954 free_scq(card->scq0, NULL);
959 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
960 dev_kfree_skb_any(lb);
965 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
966 dev_kfree_skb_any(hb);
970 kfree(card->rsq.org);
974 kfree(card->tsq.org);
978 free_irq(card->pcidev->irq, card);
982 iounmap((void *) card->membase);
986 pci_disable_device(card->pcidev);
993 static scq_info *get_scq(int size, u32 scd)
998 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
999 return (scq_info *) NULL;
1001 scq = (scq_info *) kmalloc(sizeof(scq_info), GFP_KERNEL);
1002 if (scq == (scq_info *) NULL)
1003 return (scq_info *) NULL;
1004 scq->org = kmalloc(2 * size, GFP_KERNEL);
1005 if (scq->org == NULL)
1008 return (scq_info *) NULL;
1010 scq->skb = (struct sk_buff **) kmalloc(sizeof(struct sk_buff *) *
1011 (size / NS_SCQE_SIZE), GFP_KERNEL);
1012 if (scq->skb == (struct sk_buff **) NULL)
1016 return (scq_info *) NULL;
1018 scq->num_entries = size / NS_SCQE_SIZE;
1019 scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
1020 scq->next = scq->base;
1021 scq->last = scq->base + (scq->num_entries - 1);
1022 scq->tail = scq->last;
1024 scq->num_entries = size / NS_SCQE_SIZE;
1026 init_waitqueue_head(&scq->scqfull_waitq);
1028 spin_lock_init(&scq->lock);
1030 for (i = 0; i < scq->num_entries; i++)
1038 /* For variable rate SCQ vcc must be NULL */
1039 static void free_scq(scq_info *scq, struct atm_vcc *vcc)
1043 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1044 for (i = 0; i < scq->num_entries; i++)
1046 if (scq->skb[i] != NULL)
1048 vcc = ATM_SKB(scq->skb[i])->vcc;
1049 if (vcc->pop != NULL)
1050 vcc->pop(vcc, scq->skb[i]);
1052 dev_kfree_skb_any(scq->skb[i]);
1055 else /* vcc must be != NULL */
1059 printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
1060 for (i = 0; i < scq->num_entries; i++)
1061 dev_kfree_skb_any(scq->skb[i]);
1064 for (i = 0; i < scq->num_entries; i++)
1066 if (scq->skb[i] != NULL)
1068 if (vcc->pop != NULL)
1069 vcc->pop(vcc, scq->skb[i]);
1071 dev_kfree_skb_any(scq->skb[i]);
1082 /* The handles passed must be pointers to the sk_buff containing the small
1083 or large buffer(s) cast to u32. */
1084 static void push_rxbufs(ns_dev *card, u32 type, u32 handle1, u32 addr1,
1085 u32 handle2, u32 addr2)
1088 unsigned long flags;
1091 #ifdef GENERAL_DEBUG
1093 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
1094 #endif /* GENERAL_DEBUG */
1096 stat = readl(card->membase + STAT);
1097 card->sbfqc = ns_stat_sfbqc_get(stat);
1098 card->lbfqc = ns_stat_lfbqc_get(stat);
1105 addr2 = card->sm_addr;
1106 handle2 = card->sm_handle;
1107 card->sm_addr = 0x00000000;
1108 card->sm_handle = 0x00000000;
1110 else /* (!sm_addr) */
1112 card->sm_addr = addr1;
1113 card->sm_handle = handle1;
1117 else /* type == BUF_LG */
1123 addr2 = card->lg_addr;
1124 handle2 = card->lg_handle;
1125 card->lg_addr = 0x00000000;
1126 card->lg_handle = 0x00000000;
1128 else /* (!lg_addr) */
1130 card->lg_addr = addr1;
1131 card->lg_handle = handle1;
1140 if (card->sbfqc >= card->sbnr.max)
1142 skb_unlink((struct sk_buff *) handle1);
1143 dev_kfree_skb_any((struct sk_buff *) handle1);
1144 skb_unlink((struct sk_buff *) handle2);
1145 dev_kfree_skb_any((struct sk_buff *) handle2);
1151 else /* (type == BUF_LG) */
1153 if (card->lbfqc >= card->lbnr.max)
1155 skb_unlink((struct sk_buff *) handle1);
1156 dev_kfree_skb_any((struct sk_buff *) handle1);
1157 skb_unlink((struct sk_buff *) handle2);
1158 dev_kfree_skb_any((struct sk_buff *) handle2);
1165 ns_grab_res_lock(card, flags);
1167 while (CMD_BUSY(card));
1168 writel(addr2, card->membase + DR3);
1169 writel(handle2, card->membase + DR2);
1170 writel(addr1, card->membase + DR1);
1171 writel(handle1, card->membase + DR0);
1172 writel(NS_CMD_WRITE_FREEBUFQ | (u32) type, card->membase + CMD);
1174 spin_unlock_irqrestore(&card->res_lock, flags);
1176 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
1177 (type == BUF_SM ? "small" : "large"), addr1, addr2);
1180 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1181 card->lbfqc >= card->lbnr.min)
1184 writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
1192 static void ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
1196 struct atm_dev *dev;
1197 unsigned long flags;
1199 card = (ns_dev *) dev_id;
1203 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1205 ns_grab_int_lock(card, flags);
1207 stat_r = readl(card->membase + STAT);
1209 /* Transmit Status Indicator has been written to T. S. Queue */
1210 if (stat_r & NS_STAT_TSIF)
1212 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1214 writel(NS_STAT_TSIF, card->membase + STAT);
1217 /* Incomplete CS-PDU has been transmitted */
1218 if (stat_r & NS_STAT_TXICP)
1220 writel(NS_STAT_TXICP, card->membase + STAT);
1221 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1225 /* Transmit Status Queue 7/8 full */
1226 if (stat_r & NS_STAT_TSQF)
1228 writel(NS_STAT_TSQF, card->membase + STAT);
1229 PRINTK("nicstar%d: TSQ full.\n", card->index);
1233 /* Timer overflow */
1234 if (stat_r & NS_STAT_TMROF)
1236 writel(NS_STAT_TMROF, card->membase + STAT);
1237 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1240 /* PHY device interrupt signal active */
1241 if (stat_r & NS_STAT_PHYI)
1243 writel(NS_STAT_PHYI, card->membase + STAT);
1244 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1245 if (dev->phy && dev->phy->interrupt) {
1246 dev->phy->interrupt(dev);
1250 /* Small Buffer Queue is full */
1251 if (stat_r & NS_STAT_SFBQF)
1253 writel(NS_STAT_SFBQF, card->membase + STAT);
1254 printk("nicstar%d: Small free buffer queue is full.\n", card->index);
1257 /* Large Buffer Queue is full */
1258 if (stat_r & NS_STAT_LFBQF)
1260 writel(NS_STAT_LFBQF, card->membase + STAT);
1261 printk("nicstar%d: Large free buffer queue is full.\n", card->index);
1264 /* Receive Status Queue is full */
1265 if (stat_r & NS_STAT_RSQF)
1267 writel(NS_STAT_RSQF, card->membase + STAT);
1268 printk("nicstar%d: RSQ full.\n", card->index);
1272 /* Complete CS-PDU received */
1273 if (stat_r & NS_STAT_EOPDU)
1275 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1277 writel(NS_STAT_EOPDU, card->membase + STAT);
1280 /* Raw cell received */
1281 if (stat_r & NS_STAT_RAWCF)
1283 writel(NS_STAT_RAWCF, card->membase + STAT);
1285 printk("nicstar%d: Raw cell received and no support yet...\n",
1287 #endif /* RCQ_SUPPORT */
1288 /* NOTE: the following procedure may keep a raw cell pending until the
1289 next interrupt. As this preliminary support is only meant to
1290 avoid buffer leakage, this is not an issue. */
1291 while (readl(card->membase + RAWCT) != card->rawch)
1295 rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
1296 if (ns_rcqe_islast(rawcell))
1298 struct sk_buff *oldbuf;
1300 oldbuf = card->rcbuf;
1301 card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
1302 card->rawch = (u32) virt_to_bus(card->rcbuf->data);
1303 recycle_rx_buf(card, oldbuf);
1306 card->rawch += NS_RCQE_SIZE;
1310 /* Small buffer queue is empty */
1311 if (stat_r & NS_STAT_SFBQE)
1316 writel(NS_STAT_SFBQE, card->membase + STAT);
1317 printk("nicstar%d: Small free buffer queue empty.\n",
1319 for (i = 0; i < card->sbnr.min; i++)
1321 sb = dev_alloc_skb(NS_SMSKBSIZE);
1324 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1328 skb_queue_tail(&card->sbpool.queue, sb);
1329 skb_reserve(sb, NS_AAL0_HEADER);
1330 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
1336 /* Large buffer queue empty */
1337 if (stat_r & NS_STAT_LFBQE)
1342 writel(NS_STAT_LFBQE, card->membase + STAT);
1343 printk("nicstar%d: Large free buffer queue empty.\n",
1345 for (i = 0; i < card->lbnr.min; i++)
1347 lb = dev_alloc_skb(NS_LGSKBSIZE);
1350 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1354 skb_queue_tail(&card->lbpool.queue, lb);
1355 skb_reserve(lb, NS_SMBUFSIZE);
1356 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
1362 /* Receive Status Queue is 7/8 full */
1363 if (stat_r & NS_STAT_RSQAF)
1365 writel(NS_STAT_RSQAF, card->membase + STAT);
1366 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1370 spin_unlock_irqrestore(&card->int_lock, flags);
1371 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1376 static int ns_open(struct atm_vcc *vcc, short vpi, int vci)
1381 unsigned long tmpl, modl;
1382 int tcr, tcra; /* target cell rate, and absolute value */
1383 int n = 0; /* Number of entries in the TST. Initialized to remove
1384 the compiler warning. */
1386 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1387 warning. How I wish compilers were clever enough to
1388 tell which variables can truly be used
1390 int inuse; /* tx or rx vc already in use by another vcc */
1392 card = (ns_dev *) vcc->dev->dev_data;
1393 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
1394 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1396 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1400 if ((error = atm_find_ci(vcc, &vpi, &vci)))
1402 PRINTK("nicstar%d: error in atm_find_ci().\n", card->index);
1405 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1411 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1413 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1417 printk("nicstar%d: %s vci already in use.\n", card->index,
1418 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1422 set_bit(ATM_VF_ADDR,&vcc->flags);
1424 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1425 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1426 needed to do that. */
1427 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1431 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1432 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1434 /* Check requested cell rate and availability of SCD */
1435 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
1436 vcc->qos.txtp.min_pcr == 0)
1438 PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1440 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1441 clear_bit(ATM_VF_ADDR,&vcc->flags);
1445 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1446 tcra = tcr >= 0 ? tcr : -tcr;
1448 PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
1449 vcc->qos.txtp.max_pcr);
1451 tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
1452 modl = tmpl % card->max_pcr;
1454 n = (int)(tmpl / card->max_pcr);
1461 if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
1463 PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
1464 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1465 clear_bit(ATM_VF_ADDR,&vcc->flags);
1472 printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
1473 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1474 clear_bit(ATM_VF_ADDR,&vcc->flags);
1478 if (n > (card->tst_free_entries - NS_TST_RESERVED))
1480 PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
1481 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1482 clear_bit(ATM_VF_ADDR,&vcc->flags);
1486 card->tst_free_entries -= n;
1488 XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
1489 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
1491 if (card->scd2vc[frscdi] == NULL)
1493 card->scd2vc[frscdi] = vc;
1497 if (frscdi == NS_FRSCD_NUM)
1499 PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
1500 card->tst_free_entries += n;
1501 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1502 clear_bit(ATM_VF_ADDR,&vcc->flags);
1506 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1508 scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
1509 if (scq == (scq_info *) NULL)
1511 PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
1512 card->scd2vc[frscdi] = NULL;
1513 card->tst_free_entries += n;
1514 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1515 clear_bit(ATM_VF_ADDR,&vcc->flags);
1519 u32d[0] = (u32) virt_to_bus(scq->base);
1520 u32d[1] = (u32) 0x00000000;
1521 u32d[2] = (u32) 0xffffffff;
1522 u32d[3] = (u32) 0x00000000;
1523 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1525 fill_tst(card, n, vc);
1527 else if (vcc->qos.txtp.traffic_class == ATM_UBR)
1529 vc->cbr_scd = 0x00000000;
1530 vc->scq = card->scq0;
1533 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1539 if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1547 /* Open the connection in hardware */
1548 if (vcc->qos.aal == ATM_AAL5)
1549 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1550 else /* vcc->qos.aal == ATM_AAL0 */
1551 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1553 status |= NS_RCTE_RAWCELLINTEN;
1554 #endif /* RCQ_SUPPORT */
1555 ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
1556 NS_RCT_ENTRY_SIZE, &status, 1);
1561 set_bit(ATM_VF_READY,&vcc->flags);
1567 static void ns_close(struct atm_vcc *vcc)
1575 card = vcc->dev->dev_data;
1576 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1577 (int) vcc->vpi, vcc->vci);
1579 clear_bit(ATM_VF_READY,&vcc->flags);
1581 if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1584 unsigned long flags;
1586 addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1587 ns_grab_res_lock(card, flags);
1588 while(CMD_BUSY(card));
1589 writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
1590 spin_unlock_irqrestore(&card->res_lock, flags);
1593 if (vc->rx_iov != NULL)
1595 struct sk_buff *iovb;
1598 stat = readl(card->membase + STAT);
1599 card->sbfqc = ns_stat_sfbqc_get(stat);
1600 card->lbfqc = ns_stat_lfbqc_get(stat);
1602 PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
1605 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
1606 NS_SKB(iovb)->iovcnt);
1607 NS_SKB(iovb)->iovcnt = 0;
1608 NS_SKB(iovb)->vcc = NULL;
1609 ns_grab_int_lock(card, flags);
1610 recycle_iov_buf(card, iovb);
1611 spin_unlock_irqrestore(&card->int_lock, flags);
1616 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1621 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1623 unsigned long flags;
1631 ns_grab_scq_lock(card, scq, flags);
1633 if (scqep == scq->base)
1637 if (scqep == scq->tail)
1639 spin_unlock_irqrestore(&scq->lock, flags);
1642 /* If the last entry is not a TSR, place one in the SCQ in order to
1643 be able to completely drain it and then close. */
1644 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
1651 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1652 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1653 scqi = scq->next - scq->base;
1654 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1655 tsr.word_3 = 0x00000000;
1656 tsr.word_4 = 0x00000000;
1659 scq->skb[index] = NULL;
1660 if (scq->next == scq->last)
1661 scq->next = scq->base;
1664 data = (u32) virt_to_bus(scq->next);
1665 ns_write_sram(card, scq->scd, &data, 1);
1667 spin_unlock_irqrestore(&scq->lock, flags);
1671 /* Free all TST entries */
1672 data = NS_TST_OPCODE_VARIABLE;
1673 for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
1675 if (card->tste2vc[i] == vc)
1677 ns_write_sram(card, card->tst_addr + i, &data, 1);
1678 card->tste2vc[i] = NULL;
1679 card->tst_free_entries++;
1683 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1684 free_scq(vc->scq, vcc);
1687 vcc->dev_data = NULL;
1688 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1689 clear_bit(ATM_VF_ADDR,&vcc->flags);
1694 stat = readl(card->membase + STAT);
1695 cfg = readl(card->membase + CFG);
1696 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1697 printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
1698 (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
1699 readl(card->membase + TSQT));
1700 printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
1701 (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
1702 readl(card->membase + RSQT));
1703 printk("Empty free buffer queue interrupt %s \n",
1704 card->efbie ? "enabled" : "disabled");
1705 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1706 ns_stat_sfbqc_get(stat), card->sbpool.count,
1707 ns_stat_lfbqc_get(stat), card->lbpool.count);
1708 printk("hbpool.count = %d iovpool.count = %d \n",
1709 card->hbpool.count, card->iovpool.count);
1711 #endif /* RX_DEBUG */
1716 static void fill_tst(ns_dev *card, int n, vc_map *vc)
1723 /* It would be very complicated to keep the two TSTs synchronized while
1724 assuring that writes are only made to the inactive TST. So, for now I
1725 will use only one TST. If problems occur, I will change this again */
1727 new_tst = card->tst_addr;
1729 /* Fill procedure */
1731 for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
1733 if (card->tste2vc[e] == NULL)
1736 if (e == NS_TST_NUM_ENTRIES) {
1737 printk("nicstar%d: No free TST entries found. \n", card->index);
1742 cl = NS_TST_NUM_ENTRIES;
1743 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1747 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
1749 card->tste2vc[e] = vc;
1750 ns_write_sram(card, new_tst + e, &data, 1);
1751 cl -= NS_TST_NUM_ENTRIES;
1755 if (++e == NS_TST_NUM_ENTRIES) {
1761 /* End of fill procedure */
1763 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1764 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1765 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1766 card->tst_addr = new_tst;
1771 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1776 unsigned long buflen;
1778 u32 flags; /* TBD flags, not CPU flags */
1780 card = vcc->dev->dev_data;
1781 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1782 if ((vc = (vc_map *) vcc->dev_data) == NULL)
1784 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
1785 atomic_inc(&vcc->stats->tx_err);
1786 dev_kfree_skb_any(skb);
1792 printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
1793 atomic_inc(&vcc->stats->tx_err);
1794 dev_kfree_skb_any(skb);
1798 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1800 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
1801 atomic_inc(&vcc->stats->tx_err);
1802 dev_kfree_skb_any(skb);
1806 if (skb_shinfo(skb)->nr_frags != 0)
1808 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1809 atomic_inc(&vcc->stats->tx_err);
1810 dev_kfree_skb_any(skb);
1814 ATM_SKB(skb)->vcc = vcc;
1816 if (vcc->qos.aal == ATM_AAL5)
1818 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1819 flags = NS_TBD_AAL5;
1820 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
1821 scqe.word_3 = cpu_to_le32((u32) skb->len);
1822 scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1823 ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1824 flags |= NS_TBD_EOPDU;
1826 else /* (vcc->qos.aal == ATM_AAL0) */
1828 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1829 flags = NS_TBD_AAL0;
1830 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
1831 scqe.word_3 = cpu_to_le32(0x00000000);
1832 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1833 flags |= NS_TBD_EOPDU;
1834 scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1835 /* Force the VPI/VCI to be the same as in VCC struct */
1836 scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
1837 ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
1841 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1843 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1844 scq = ((vc_map *) vcc->dev_data)->scq;
1848 scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1852 if (push_scqe(card, vc, scq, &scqe, skb) != 0)
1854 atomic_inc(&vcc->stats->tx_err);
1855 dev_kfree_skb_any(skb);
1858 atomic_inc(&vcc->stats->tx);
1865 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
1866 struct sk_buff *skb)
1868 unsigned long flags;
1875 ns_grab_scq_lock(card, scq, flags);
1876 while (scq->tail == scq->next)
1878 if (in_interrupt()) {
1879 spin_unlock_irqrestore(&scq->lock, flags);
1880 printk("nicstar%d: Error pushing TBD.\n", card->index);
1885 spin_unlock_irqrestore(&scq->lock, flags);
1886 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1887 ns_grab_scq_lock(card, scq, flags);
1890 spin_unlock_irqrestore(&scq->lock, flags);
1891 printk("nicstar%d: Timeout pushing TBD.\n", card->index);
1896 index = (int) (scq->next - scq->base);
1897 scq->skb[index] = skb;
1898 XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
1899 card->index, (u32) skb, index);
1900 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1901 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1902 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1904 if (scq->next == scq->last)
1905 scq->next = scq->base;
1910 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1918 if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
1922 while (scq->tail == scq->next)
1924 if (in_interrupt()) {
1925 data = (u32) virt_to_bus(scq->next);
1926 ns_write_sram(card, scq->scd, &data, 1);
1927 spin_unlock_irqrestore(&scq->lock, flags);
1928 printk("nicstar%d: Error pushing TSR.\n", card->index);
1933 if (has_run++) break;
1934 spin_unlock_irqrestore(&scq->lock, flags);
1935 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1936 ns_grab_scq_lock(card, scq, flags);
1941 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1943 scdi = NS_TSR_SCDISVBR;
1945 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1946 scqi = scq->next - scq->base;
1947 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1948 tsr.word_3 = 0x00000000;
1949 tsr.word_4 = 0x00000000;
1953 scq->skb[index] = NULL;
1954 XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1955 card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
1956 le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
1958 if (scq->next == scq->last)
1959 scq->next = scq->base;
1966 PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
1968 data = (u32) virt_to_bus(scq->next);
1969 ns_write_sram(card, scq->scd, &data, 1);
1971 spin_unlock_irqrestore(&scq->lock, flags);
1978 static void process_tsq(ns_dev *card)
1982 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1983 int serviced_entries; /* flag indicating at least on entry was serviced */
1985 serviced_entries = 0;
1987 if (card->tsq.next == card->tsq.last)
1988 one_ahead = card->tsq.base;
1990 one_ahead = card->tsq.next + 1;
1992 if (one_ahead == card->tsq.last)
1993 two_ahead = card->tsq.base;
1995 two_ahead = one_ahead + 1;
1997 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1998 !ns_tsi_isempty(two_ahead))
1999 /* At most two empty, as stated in the 77201 errata */
2001 serviced_entries = 1;
2003 /* Skip the one or two possible empty entries */
2004 while (ns_tsi_isempty(card->tsq.next)) {
2005 if (card->tsq.next == card->tsq.last)
2006 card->tsq.next = card->tsq.base;
2011 if (!ns_tsi_tmrof(card->tsq.next))
2013 scdi = ns_tsi_getscdindex(card->tsq.next);
2014 if (scdi == NS_TSI_SCDISVBR)
2018 if (card->scd2vc[scdi] == NULL)
2020 printk("nicstar%d: could not find VC from SCD index.\n",
2022 ns_tsi_init(card->tsq.next);
2025 scq = card->scd2vc[scdi]->scq;
2027 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
2029 wake_up_interruptible(&(scq->scqfull_waitq));
2032 ns_tsi_init(card->tsq.next);
2033 previous = card->tsq.next;
2034 if (card->tsq.next == card->tsq.last)
2035 card->tsq.next = card->tsq.base;
2039 if (card->tsq.next == card->tsq.last)
2040 one_ahead = card->tsq.base;
2042 one_ahead = card->tsq.next + 1;
2044 if (one_ahead == card->tsq.last)
2045 two_ahead = card->tsq.base;
2047 two_ahead = one_ahead + 1;
2050 if (serviced_entries) {
2051 writel((((u32) previous) - ((u32) card->tsq.base)),
2052 card->membase + TSQH);
2058 static void drain_scq(ns_dev *card, scq_info *scq, int pos)
2060 struct atm_vcc *vcc;
2061 struct sk_buff *skb;
2063 unsigned long flags;
2065 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
2066 card->index, (u32) scq, pos);
2067 if (pos >= scq->num_entries)
2069 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
2073 ns_grab_scq_lock(card, scq, flags);
2074 i = (int) (scq->tail - scq->base);
2075 if (++i == scq->num_entries)
2080 XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
2081 card->index, (u32) skb, i);
2084 vcc = ATM_SKB(skb)->vcc;
2085 if (vcc->pop != NULL) {
2088 dev_kfree_skb_irq(skb);
2092 if (++i == scq->num_entries)
2095 scq->tail = scq->base + pos;
2096 spin_unlock_irqrestore(&scq->lock, flags);
2101 static void process_rsq(ns_dev *card)
2105 if (!ns_rsqe_valid(card->rsq.next))
2107 while (ns_rsqe_valid(card->rsq.next))
2109 dequeue_rx(card, card->rsq.next);
2110 ns_rsqe_init(card->rsq.next);
2111 previous = card->rsq.next;
2112 if (card->rsq.next == card->rsq.last)
2113 card->rsq.next = card->rsq.base;
2117 writel((((u32) previous) - ((u32) card->rsq.base)),
2118 card->membase + RSQH);
2123 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
2127 struct sk_buff *iovb;
2129 struct atm_vcc *vcc;
2130 struct sk_buff *skb;
2131 unsigned short aal5_len;
2135 stat = readl(card->membase + STAT);
2136 card->sbfqc = ns_stat_sfbqc_get(stat);
2137 card->lbfqc = ns_stat_lfbqc_get(stat);
2139 skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
2140 vpi = ns_rsqe_vpi(rsqe);
2141 vci = ns_rsqe_vci(rsqe);
2142 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
2144 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2145 card->index, vpi, vci);
2146 recycle_rx_buf(card, skb);
2150 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2153 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2154 card->index, vpi, vci);
2155 recycle_rx_buf(card, skb);
2161 if (vcc->qos.aal == ATM_AAL0)
2164 unsigned char *cell;
2168 for (i = ns_rsqe_cellcount(rsqe); i; i--)
2170 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
2172 printk("nicstar%d: Can't allocate buffers for aal0.\n",
2174 atomic_add(i,&vcc->stats->rx_drop);
2177 if (!atm_charge(vcc, sb->truesize))
2179 RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
2181 atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
2182 dev_kfree_skb_any(sb);
2185 /* Rebuild the header */
2186 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2187 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2188 if (i == 1 && ns_rsqe_eopdu(rsqe))
2189 *((u32 *) sb->data) |= 0x00000002;
2190 skb_put(sb, NS_AAL0_HEADER);
2191 memcpy(sb->tail, cell, ATM_CELL_PAYLOAD);
2192 skb_put(sb, ATM_CELL_PAYLOAD);
2193 ATM_SKB(sb)->vcc = vcc;
2196 atomic_inc(&vcc->stats->rx);
2197 cell += ATM_CELL_PAYLOAD;
2200 recycle_rx_buf(card, skb);
2204 /* To reach this point, the AAL layer can only be AAL5 */
2206 if ((iovb = vc->rx_iov) == NULL)
2208 iovb = skb_dequeue(&(card->iovpool.queue));
2209 if (iovb == NULL) /* No buffers in the queue */
2211 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2214 printk("nicstar%d: Out of iovec buffers.\n", card->index);
2215 atomic_inc(&vcc->stats->rx_drop);
2216 recycle_rx_buf(card, skb);
2221 if (--card->iovpool.count < card->iovnr.min)
2223 struct sk_buff *new_iovb;
2224 if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
2226 skb_queue_tail(&card->iovpool.queue, new_iovb);
2227 card->iovpool.count++;
2231 NS_SKB(iovb)->iovcnt = 0;
2233 iovb->tail = iovb->data = iovb->head;
2234 NS_SKB(iovb)->vcc = vcc;
2235 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2236 buffer is stored as iovec base, NOT a pointer to the
2237 small or large buffer itself. */
2239 else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
2241 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2242 atomic_inc(&vcc->stats->rx_err);
2243 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
2244 NS_SKB(iovb)->iovcnt = 0;
2246 iovb->tail = iovb->data = iovb->head;
2247 NS_SKB(iovb)->vcc = vcc;
2249 iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
2250 iov->iov_base = (void *) skb;
2251 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2252 iovb->len += iov->iov_len;
2254 if (NS_SKB(iovb)->iovcnt == 1)
2256 if (skb->list != &card->sbpool.queue)
2258 printk("nicstar%d: Expected a small buffer, and this is not one.\n",
2260 which_list(card, skb);
2261 atomic_inc(&vcc->stats->rx_err);
2262 recycle_rx_buf(card, skb);
2264 recycle_iov_buf(card, iovb);
2268 else /* NS_SKB(iovb)->iovcnt >= 2 */
2270 if (skb->list != &card->lbpool.queue)
2272 printk("nicstar%d: Expected a large buffer, and this is not one.\n",
2274 which_list(card, skb);
2275 atomic_inc(&vcc->stats->rx_err);
2276 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2277 NS_SKB(iovb)->iovcnt);
2279 recycle_iov_buf(card, iovb);
2284 if (ns_rsqe_eopdu(rsqe))
2286 /* This works correctly regardless of the endianness of the host */
2287 unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
2289 aal5_len = L1L2[0] << 8 | L1L2[1];
2290 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2291 if (ns_rsqe_crcerr(rsqe) ||
2292 len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2294 printk("nicstar%d: AAL5 CRC error", card->index);
2295 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2296 printk(" - PDU size mismatch.\n");
2299 atomic_inc(&vcc->stats->rx_err);
2300 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2301 NS_SKB(iovb)->iovcnt);
2303 recycle_iov_buf(card, iovb);
2307 /* By this point we (hopefully) have a complete SDU without errors. */
2309 if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
2311 /* skb points to a small buffer */
2312 if (!atm_charge(vcc, skb->truesize))
2314 push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data),
2316 atomic_inc(&vcc->stats->rx_drop);
2321 dequeue_sm_buf(card, skb);
2322 #ifdef NS_USE_DESTRUCTORS
2323 skb->destructor = ns_sb_destructor;
2324 #endif /* NS_USE_DESTRUCTORS */
2325 ATM_SKB(skb)->vcc = vcc;
2327 vcc->push(vcc, skb);
2328 atomic_inc(&vcc->stats->rx);
2331 else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
2335 sb = (struct sk_buff *) (iov - 1)->iov_base;
2336 /* skb points to a large buffer */
2338 if (len <= NS_SMBUFSIZE)
2340 if (!atm_charge(vcc, sb->truesize))
2342 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
2344 atomic_inc(&vcc->stats->rx_drop);
2349 dequeue_sm_buf(card, sb);
2350 #ifdef NS_USE_DESTRUCTORS
2351 sb->destructor = ns_sb_destructor;
2352 #endif /* NS_USE_DESTRUCTORS */
2353 ATM_SKB(sb)->vcc = vcc;
2356 atomic_inc(&vcc->stats->rx);
2359 push_rxbufs(card, BUF_LG, (u32) skb,
2360 (u32) virt_to_bus(skb->data), 0, 0);
2363 else /* len > NS_SMBUFSIZE, the usual case */
2365 if (!atm_charge(vcc, skb->truesize))
2367 push_rxbufs(card, BUF_LG, (u32) skb,
2368 (u32) virt_to_bus(skb->data), 0, 0);
2369 atomic_inc(&vcc->stats->rx_drop);
2373 dequeue_lg_buf(card, skb);
2374 #ifdef NS_USE_DESTRUCTORS
2375 skb->destructor = ns_lb_destructor;
2376 #endif /* NS_USE_DESTRUCTORS */
2377 skb_push(skb, NS_SMBUFSIZE);
2378 memcpy(skb->data, sb->data, NS_SMBUFSIZE);
2379 skb_put(skb, len - NS_SMBUFSIZE);
2380 ATM_SKB(skb)->vcc = vcc;
2382 vcc->push(vcc, skb);
2383 atomic_inc(&vcc->stats->rx);
2386 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
2392 else /* Must push a huge buffer */
2394 struct sk_buff *hb, *sb, *lb;
2395 int remaining, tocopy;
2398 hb = skb_dequeue(&(card->hbpool.queue));
2399 if (hb == NULL) /* No buffers in the queue */
2402 hb = dev_alloc_skb(NS_HBUFSIZE);
2405 printk("nicstar%d: Out of huge buffers.\n", card->index);
2406 atomic_inc(&vcc->stats->rx_drop);
2407 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2408 NS_SKB(iovb)->iovcnt);
2410 recycle_iov_buf(card, iovb);
2413 else if (card->hbpool.count < card->hbnr.min)
2415 struct sk_buff *new_hb;
2416 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2418 skb_queue_tail(&card->hbpool.queue, new_hb);
2419 card->hbpool.count++;
2424 if (--card->hbpool.count < card->hbnr.min)
2426 struct sk_buff *new_hb;
2427 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2429 skb_queue_tail(&card->hbpool.queue, new_hb);
2430 card->hbpool.count++;
2432 if (card->hbpool.count < card->hbnr.min)
2434 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2436 skb_queue_tail(&card->hbpool.queue, new_hb);
2437 card->hbpool.count++;
2442 iov = (struct iovec *) iovb->data;
2444 if (!atm_charge(vcc, hb->truesize))
2446 recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
2447 if (card->hbpool.count < card->hbnr.max)
2449 skb_queue_tail(&card->hbpool.queue, hb);
2450 card->hbpool.count++;
2453 dev_kfree_skb_any(hb);
2454 atomic_inc(&vcc->stats->rx_drop);
2458 /* Copy the small buffer to the huge buffer */
2459 sb = (struct sk_buff *) iov->iov_base;
2460 memcpy(hb->data, sb->data, iov->iov_len);
2461 skb_put(hb, iov->iov_len);
2462 remaining = len - iov->iov_len;
2464 /* Free the small buffer */
2465 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
2468 /* Copy all large buffers to the huge buffer and free them */
2469 for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
2471 lb = (struct sk_buff *) iov->iov_base;
2472 tocopy = min_t(int, remaining, iov->iov_len);
2473 memcpy(hb->tail, lb->data, tocopy);
2474 skb_put(hb, tocopy);
2476 remaining -= tocopy;
2477 push_rxbufs(card, BUF_LG, (u32) lb,
2478 (u32) virt_to_bus(lb->data), 0, 0);
2481 if (remaining != 0 || hb->len != len)
2482 printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
2483 #endif /* EXTRA_DEBUG */
2484 ATM_SKB(hb)->vcc = vcc;
2485 #ifdef NS_USE_DESTRUCTORS
2486 hb->destructor = ns_hb_destructor;
2487 #endif /* NS_USE_DESTRUCTORS */
2490 atomic_inc(&vcc->stats->rx);
2495 recycle_iov_buf(card, iovb);
2502 #ifdef NS_USE_DESTRUCTORS
2504 static void ns_sb_destructor(struct sk_buff *sb)
2509 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
2510 stat = readl(card->membase + STAT);
2511 card->sbfqc = ns_stat_sfbqc_get(stat);
2512 card->lbfqc = ns_stat_lfbqc_get(stat);
2516 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2519 skb_queue_tail(&card->sbpool.queue, sb);
2520 skb_reserve(sb, NS_AAL0_HEADER);
2521 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
2522 } while (card->sbfqc < card->sbnr.min);
2527 static void ns_lb_destructor(struct sk_buff *lb)
2532 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
2533 stat = readl(card->membase + STAT);
2534 card->sbfqc = ns_stat_sfbqc_get(stat);
2535 card->lbfqc = ns_stat_lfbqc_get(stat);
2539 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2542 skb_queue_tail(&card->lbpool.queue, lb);
2543 skb_reserve(lb, NS_SMBUFSIZE);
2544 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
2545 } while (card->lbfqc < card->lbnr.min);
2550 static void ns_hb_destructor(struct sk_buff *hb)
2554 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
2556 while (card->hbpool.count < card->hbnr.init)
2558 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2561 skb_queue_tail(&card->hbpool.queue, hb);
2562 card->hbpool.count++;
2566 #endif /* NS_USE_DESTRUCTORS */
2570 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
2572 if (skb->list == &card->sbpool.queue)
2573 push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data), 0, 0);
2574 else if (skb->list == &card->lbpool.queue)
2575 push_rxbufs(card, BUF_LG, (u32) skb, (u32) virt_to_bus(skb->data), 0, 0);
2578 printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
2579 dev_kfree_skb_any(skb);
2585 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
2587 struct sk_buff *skb;
2589 for (; count > 0; count--)
2591 skb = (struct sk_buff *) (iov++)->iov_base;
2592 if (skb->list == &card->sbpool.queue)
2593 push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data),
2595 else if (skb->list == &card->lbpool.queue)
2596 push_rxbufs(card, BUF_LG, (u32) skb, (u32) virt_to_bus(skb->data),
2600 printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
2601 dev_kfree_skb_any(skb);
2608 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
2610 if (card->iovpool.count < card->iovnr.max)
2612 skb_queue_tail(&card->iovpool.queue, iovb);
2613 card->iovpool.count++;
2616 dev_kfree_skb_any(iovb);
2621 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
2624 #ifdef NS_USE_DESTRUCTORS
2625 if (card->sbfqc < card->sbnr.min)
2627 if (card->sbfqc < card->sbnr.init)
2629 struct sk_buff *new_sb;
2630 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
2632 skb_queue_tail(&card->sbpool.queue, new_sb);
2633 skb_reserve(new_sb, NS_AAL0_HEADER);
2634 push_rxbufs(card, BUF_SM, (u32) new_sb,
2635 (u32) virt_to_bus(new_sb->data), 0, 0);
2638 if (card->sbfqc < card->sbnr.init)
2639 #endif /* NS_USE_DESTRUCTORS */
2641 struct sk_buff *new_sb;
2642 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
2644 skb_queue_tail(&card->sbpool.queue, new_sb);
2645 skb_reserve(new_sb, NS_AAL0_HEADER);
2646 push_rxbufs(card, BUF_SM, (u32) new_sb,
2647 (u32) virt_to_bus(new_sb->data), 0, 0);
2654 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
2657 #ifdef NS_USE_DESTRUCTORS
2658 if (card->lbfqc < card->lbnr.min)
2660 if (card->lbfqc < card->lbnr.init)
2662 struct sk_buff *new_lb;
2663 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
2665 skb_queue_tail(&card->lbpool.queue, new_lb);
2666 skb_reserve(new_lb, NS_SMBUFSIZE);
2667 push_rxbufs(card, BUF_LG, (u32) new_lb,
2668 (u32) virt_to_bus(new_lb->data), 0, 0);
2671 if (card->lbfqc < card->lbnr.init)
2672 #endif /* NS_USE_DESTRUCTORS */
2674 struct sk_buff *new_lb;
2675 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
2677 skb_queue_tail(&card->lbpool.queue, new_lb);
2678 skb_reserve(new_lb, NS_SMBUFSIZE);
2679 push_rxbufs(card, BUF_LG, (u32) new_lb,
2680 (u32) virt_to_bus(new_lb->data), 0, 0);
2687 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
2694 card = (ns_dev *) dev->dev_data;
2695 stat = readl(card->membase + STAT);
2697 return sprintf(page, "Pool count min init max \n");
2699 return sprintf(page, "Small %5d %5d %5d %5d \n",
2700 ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
2703 return sprintf(page, "Large %5d %5d %5d %5d \n",
2704 ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
2707 return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
2708 card->hbnr.min, card->hbnr.init, card->hbnr.max);
2710 return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
2711 card->iovnr.min, card->iovnr.init, card->iovnr.max);
2715 retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2720 /* Dump 25.6 Mbps PHY registers */
2721 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2722 here just in case it's needed for debugging. */
2723 if (card->max_pcr == ATM_25_PCR && !left--)
2728 for (i = 0; i < 4; i++)
2730 while (CMD_BUSY(card));
2731 writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
2732 while (CMD_BUSY(card));
2733 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2736 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2737 phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
2739 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2742 if (left-- < NS_TST_NUM_ENTRIES)
2744 if (card->tste2vc[left + 1] == NULL)
2745 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2747 return sprintf(page, "%5d - %d %d \n", left + 1,
2748 card->tste2vc[left + 1]->tx_vcc->vpi,
2749 card->tste2vc[left + 1]->tx_vcc->vci);
2757 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void *arg)
2762 unsigned long flags;
2764 card = dev->dev_data;
2768 if (get_user(pl.buftype, &((pool_levels *) arg)->buftype))
2772 case NS_BUFTYPE_SMALL:
2773 pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
2774 pl.level.min = card->sbnr.min;
2775 pl.level.init = card->sbnr.init;
2776 pl.level.max = card->sbnr.max;
2779 case NS_BUFTYPE_LARGE:
2780 pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
2781 pl.level.min = card->lbnr.min;
2782 pl.level.init = card->lbnr.init;
2783 pl.level.max = card->lbnr.max;
2786 case NS_BUFTYPE_HUGE:
2787 pl.count = card->hbpool.count;
2788 pl.level.min = card->hbnr.min;
2789 pl.level.init = card->hbnr.init;
2790 pl.level.max = card->hbnr.max;
2793 case NS_BUFTYPE_IOVEC:
2794 pl.count = card->iovpool.count;
2795 pl.level.min = card->iovnr.min;
2796 pl.level.init = card->iovnr.init;
2797 pl.level.max = card->iovnr.max;
2801 return -ENOIOCTLCMD;
2804 if (!copy_to_user((pool_levels *) arg, &pl, sizeof(pl)))
2805 return (sizeof(pl));
2810 if (!capable(CAP_NET_ADMIN))
2812 if (copy_from_user(&pl, (pool_levels *) arg, sizeof(pl)))
2814 if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
2816 if (pl.level.min == 0)
2820 case NS_BUFTYPE_SMALL:
2821 if (pl.level.max > TOP_SB)
2823 card->sbnr.min = pl.level.min;
2824 card->sbnr.init = pl.level.init;
2825 card->sbnr.max = pl.level.max;
2828 case NS_BUFTYPE_LARGE:
2829 if (pl.level.max > TOP_LB)
2831 card->lbnr.min = pl.level.min;
2832 card->lbnr.init = pl.level.init;
2833 card->lbnr.max = pl.level.max;
2836 case NS_BUFTYPE_HUGE:
2837 if (pl.level.max > TOP_HB)
2839 card->hbnr.min = pl.level.min;
2840 card->hbnr.init = pl.level.init;
2841 card->hbnr.max = pl.level.max;
2844 case NS_BUFTYPE_IOVEC:
2845 if (pl.level.max > TOP_IOVB)
2847 card->iovnr.min = pl.level.min;
2848 card->iovnr.init = pl.level.init;
2849 card->iovnr.max = pl.level.max;
2859 if (!capable(CAP_NET_ADMIN))
2861 btype = (int) arg; /* an int is the same size as a pointer */
2864 case NS_BUFTYPE_SMALL:
2865 while (card->sbfqc < card->sbnr.init)
2869 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2872 skb_queue_tail(&card->sbpool.queue, sb);
2873 skb_reserve(sb, NS_AAL0_HEADER);
2874 push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
2878 case NS_BUFTYPE_LARGE:
2879 while (card->lbfqc < card->lbnr.init)
2883 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2886 skb_queue_tail(&card->lbpool.queue, lb);
2887 skb_reserve(lb, NS_SMBUFSIZE);
2888 push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
2892 case NS_BUFTYPE_HUGE:
2893 while (card->hbpool.count > card->hbnr.init)
2897 ns_grab_int_lock(card, flags);
2898 hb = skb_dequeue(&card->hbpool.queue);
2899 card->hbpool.count--;
2900 spin_unlock_irqrestore(&card->int_lock, flags);
2902 printk("nicstar%d: huge buffer count inconsistent.\n",
2905 dev_kfree_skb_any(hb);
2908 while (card->hbpool.count < card->hbnr.init)
2912 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2915 ns_grab_int_lock(card, flags);
2916 skb_queue_tail(&card->hbpool.queue, hb);
2917 card->hbpool.count++;
2918 spin_unlock_irqrestore(&card->int_lock, flags);
2922 case NS_BUFTYPE_IOVEC:
2923 while (card->iovpool.count > card->iovnr.init)
2925 struct sk_buff *iovb;
2927 ns_grab_int_lock(card, flags);
2928 iovb = skb_dequeue(&card->iovpool.queue);
2929 card->iovpool.count--;
2930 spin_unlock_irqrestore(&card->int_lock, flags);
2932 printk("nicstar%d: iovec buffer count inconsistent.\n",
2935 dev_kfree_skb_any(iovb);
2938 while (card->iovpool.count < card->iovnr.init)
2940 struct sk_buff *iovb;
2942 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2945 ns_grab_int_lock(card, flags);
2946 skb_queue_tail(&card->iovpool.queue, iovb);
2947 card->iovpool.count++;
2948 spin_unlock_irqrestore(&card->int_lock, flags);
2959 if (dev->phy && dev->phy->ioctl) {
2960 return dev->phy->ioctl(dev, cmd, arg);
2963 printk("nicstar%d: %s == NULL \n", card->index,
2964 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2965 return -ENOIOCTLCMD;
2972 static void which_list(ns_dev *card, struct sk_buff *skb)
2974 printk("It's a %s buffer.\n", skb->list == &card->sbpool.queue ?
2975 "small" : skb->list == &card->lbpool.queue ? "large" :
2976 skb->list == &card->hbpool.queue ? "huge" :
2977 skb->list == &card->iovpool.queue ? "iovec" : "unknown");
2982 static void ns_poll(unsigned long arg)
2986 unsigned long flags;
2989 PRINTK("nicstar: Entering ns_poll().\n");
2990 for (i = 0; i < num_cards; i++)
2993 if (spin_is_locked(&card->int_lock)) {
2994 /* Probably it isn't worth spinning */
2997 ns_grab_int_lock(card, flags);
3000 stat_r = readl(card->membase + STAT);
3001 if (stat_r & NS_STAT_TSIF)
3002 stat_w |= NS_STAT_TSIF;
3003 if (stat_r & NS_STAT_EOPDU)
3004 stat_w |= NS_STAT_EOPDU;
3009 writel(stat_w, card->membase + STAT);
3010 spin_unlock_irqrestore(&card->int_lock, flags);
3012 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
3013 PRINTK("nicstar: Leaving ns_poll().\n");
3018 static int ns_parse_mac(char *mac, unsigned char *esi)
3023 if (mac == NULL || esi == NULL)
3026 for (i = 0; i < 6; i++)
3028 if ((byte1 = ns_h2i(mac[j++])) < 0)
3030 if ((byte0 = ns_h2i(mac[j++])) < 0)
3032 esi[i] = (unsigned char) (byte1 * 16 + byte0);
3035 if (mac[j++] != ':')
3044 static short ns_h2i(char c)
3046 if (c >= '0' && c <= '9')
3047 return (short) (c - '0');
3048 if (c >= 'A' && c <= 'F')
3049 return (short) (c - 'A' + 10);
3050 if (c >= 'a' && c <= 'f')
3051 return (short) (c - 'a' + 10);
3057 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
3061 unsigned long flags;
3063 card = dev->dev_data;
3064 ns_grab_res_lock(card, flags);
3065 while(CMD_BUSY(card));
3066 writel((unsigned long) value, card->membase + DR0);
3067 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
3068 card->membase + CMD);
3069 spin_unlock_irqrestore(&card->res_lock, flags);
3074 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
3077 unsigned long flags;
3080 card = dev->dev_data;
3081 ns_grab_res_lock(card, flags);
3082 while(CMD_BUSY(card));
3083 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
3084 card->membase + CMD);
3085 while(CMD_BUSY(card));
3086 data = readl(card->membase + DR0) & 0x000000FF;
3087 spin_unlock_irqrestore(&card->res_lock, flags);
3088 return (unsigned char) data;
3093 module_init(nicstar_init);
3094 module_exit(nicstar_cleanup);