2 * SHPCHPRM Legacy: PHP Resource Manager for Non-ACPI/Legacy platform
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * Send feedback to <greg@kroah.com>, <dely.l.sy@intel.com>
30 #include <linux/config.h>
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/types.h>
34 #include <linux/pci.h>
35 #include <linux/init.h>
36 #include <asm/uaccess.h>
38 #include <asm/iosapic.h>
42 #include "shpchprm_legacy.h"
44 static void *shpchp_rom_start;
45 static u16 unused_IRQ;
47 void shpchprm_cleanup()
50 iounmap(shpchp_rom_start);
54 int shpchprm_print_pirt()
59 void * shpchprm_get_slot(struct slot *slot)
64 int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
66 int offset = devnum - ctrl->slot_device_offset;
68 *sun = (u8) (ctrl->first_slot + ctrl->slot_num_inc * offset);
72 /* find the Hot Plug Resource Table in the specified region of memory */
73 static void *detect_HRT_floating_pointer(void *begin, void *end)
77 u8 temp1, temp2, temp3, temp4;
80 endp = (end - sizeof(struct hrt) + 1);
82 for (fp = begin; fp <= endp; fp += 16) {
83 temp1 = readb(fp + SIG0);
84 temp2 = readb(fp + SIG1);
85 temp3 = readb(fp + SIG2);
86 temp4 = readb(fp + SIG3);
87 if (temp1 == '$' && temp2 == 'H' && temp3 == 'R' && temp4 == 'T') {
96 dbg("Discovered Hotplug Resource Table at %p\n", fp);
101 * shpchprm_find_available_resources
103 * Finds available memory, IO, and IRQ resources for programming
104 * devices which may be added to the system
105 * this function is for hot plug ADD!
107 * returns 0 if success
109 int shpchprm_find_available_resources(struct controller *ctrl)
114 struct pci_func *func = NULL;
115 int i = 10, index = 0;
118 struct pci_resource *mem_node;
119 struct pci_resource *p_mem_node;
120 struct pci_resource *io_node;
121 struct pci_resource *bus_node;
122 void *rom_resource_table;
123 struct pci_bus lpci_bus, *pci_bus;
126 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
128 rom_resource_table = detect_HRT_floating_pointer(shpchp_rom_start, shpchp_rom_start + 0xffff);
129 dbg("rom_resource_table = %p\n", rom_resource_table);
130 if (rom_resource_table == NULL)
133 /* Sum all resources and setup resource maps */
134 unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
135 dbg("unused_IRQ = %x\n", unused_IRQ);
139 if (unused_IRQ & 1) {
140 shpchp_disk_irq = temp;
143 unused_IRQ = unused_IRQ >> 1;
147 dbg("shpchp_disk_irq= %d\n", shpchp_disk_irq);
148 unused_IRQ = unused_IRQ >> 1;
152 if (unused_IRQ & 1) {
153 shpchp_nic_irq = temp;
156 unused_IRQ = unused_IRQ >> 1;
160 dbg("shpchp_nic_irq= %d\n", shpchp_nic_irq);
161 unused_IRQ = readl(rom_resource_table + PCIIRQ);
165 pci_read_config_byte(ctrl->pci_dev, PCI_INTERRUPT_LINE, &cfgspc_irq);
167 if (!shpchp_nic_irq) {
168 shpchp_nic_irq = cfgspc_irq;
171 if (!shpchp_disk_irq) {
172 shpchp_disk_irq = cfgspc_irq;
175 dbg("shpchp_disk_irq, shpchp_nic_irq= %d, %d\n", shpchp_disk_irq, shpchp_nic_irq);
177 one_slot = rom_resource_table + sizeof(struct hrt);
179 i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
180 dbg("number_of_entries = %d\n", i);
182 if (!readb(one_slot + SECONDARY_BUS))
185 dbg("dev|IO base|length|MEMbase|length|PM base|length|PB SB MB\n");
187 while (i && readb(one_slot + SECONDARY_BUS)) {
188 u8 dev_func = readb(one_slot + DEV_FUNC);
189 u8 primary_bus = readb(one_slot + PRIMARY_BUS);
190 u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
191 u8 max_bus = readb(one_slot + MAX_BUS);
192 u16 io_base = readw(one_slot + IO_BASE);
193 u16 io_length = readw(one_slot + IO_LENGTH);
194 u16 mem_base = readw(one_slot + MEM_BASE);
195 u16 mem_length = readw(one_slot + MEM_LENGTH);
196 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
197 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
199 dbg("%2.2x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x |%2.2x %2.2x %2.2x\n",
200 dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
201 primary_bus, secondary_bus, max_bus);
203 /* If this entry isn't for our controller's bus, ignore it */
204 if (primary_bus != ctrl->slot_bus) {
206 one_slot += sizeof(struct slot_rt);
209 /* Find out if this entry is for an occupied slot */
210 temp_dword = 0xFFFFFFFF;
211 pci_bus->number = primary_bus;
212 pci_bus_read_config_dword(pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
214 dbg("temp_D_word = %x\n", temp_dword);
216 if (temp_dword != 0xFFFFFFFF) {
218 func = shpchp_slot_find(primary_bus, dev_func >> 3, 0);
220 while (func && (func->function != (dev_func & 0x07))) {
221 dbg("func = %p b:d:f(%x:%x:%x)\n", func, primary_bus, dev_func >> 3, index);
222 func = shpchp_slot_find(primary_bus, dev_func >> 3, index++);
225 /* If we can't find a match, skip this table entry */
228 one_slot += sizeof(struct slot_rt);
231 /* This may not work and shouldn't be used */
232 if (secondary_bus != primary_bus)
242 dbg("slot populated =%s \n", populated_slot?"yes":"no");
244 /* If we've got a valid IO base, use it */
246 temp_ulong = io_base + io_length;
248 if ((io_base) && (temp_ulong <= 0x10000)) {
249 io_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
253 io_node->base = (ulong)io_base;
254 io_node->length = (ulong)io_length;
255 dbg("found io_node(base, length) = %x, %x\n", io_node->base, io_node->length);
257 if (!populated_slot) {
258 io_node->next = ctrl->io_head;
259 ctrl->io_head = io_node;
261 io_node->next = func->io_head;
262 func->io_head = io_node;
266 /* If we've got a valid memory base, use it */
267 temp_ulong = mem_base + mem_length;
268 if ((mem_base) && (temp_ulong <= 0x10000)) {
269 mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
273 mem_node->base = (ulong)mem_base << 16;
274 mem_node->length = (ulong)(mem_length << 16);
275 dbg("found mem_node(base, length) = %x, %x\n", mem_node->base, mem_node->length);
277 if (!populated_slot) {
278 mem_node->next = ctrl->mem_head;
279 ctrl->mem_head = mem_node;
281 mem_node->next = func->mem_head;
282 func->mem_head = mem_node;
287 * If we've got a valid prefetchable memory base, and
288 * the base + length isn't greater than 0xFFFF
290 temp_ulong = pre_mem_base + pre_mem_length;
291 if ((pre_mem_base) && (temp_ulong <= 0x10000)) {
292 p_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
296 p_mem_node->base = (ulong)pre_mem_base << 16;
297 p_mem_node->length = (ulong)pre_mem_length << 16;
298 dbg("found p_mem_node(base, length) = %x, %x\n", p_mem_node->base, p_mem_node->length);
300 if (!populated_slot) {
301 p_mem_node->next = ctrl->p_mem_head;
302 ctrl->p_mem_head = p_mem_node;
304 p_mem_node->next = func->p_mem_head;
305 func->p_mem_head = p_mem_node;
310 * If we've got a valid bus number, use it
311 * The second condition is to ignore bus numbers on
312 * populated slots that don't have PCI-PCI bridges
314 if (secondary_bus && (secondary_bus != primary_bus)) {
315 bus_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
319 bus_node->base = (ulong)secondary_bus;
320 bus_node->length = (ulong)(max_bus - secondary_bus + 1);
321 dbg("found bus_node(base, length) = %x, %x\n", bus_node->base, bus_node->length);
323 if (!populated_slot) {
324 bus_node->next = ctrl->bus_head;
325 ctrl->bus_head = bus_node;
327 bus_node->next = func->bus_head;
328 func->bus_head = bus_node;
333 one_slot += sizeof(struct slot_rt);
336 /* If all of the following fail, we don't have any resources for hot plug add */
338 rc &= shpchp_resource_sort_and_combine(&(ctrl->mem_head));
339 rc &= shpchp_resource_sort_and_combine(&(ctrl->p_mem_head));
340 rc &= shpchp_resource_sort_and_combine(&(ctrl->io_head));
341 rc &= shpchp_resource_sort_and_combine(&(ctrl->bus_head));
346 int shpchprm_set_hpp(
347 struct controller *ctrl,
348 struct pci_func *func,
353 struct pci_bus lpci_bus, *pci_bus;
355 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
357 pci_bus->number = func->bus;
358 devfn = PCI_DEVFN(func->device, func->function);
360 temp_byte = 0x40; /* Hard coded value for LT */
361 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
362 /* Set subordinate Latency Timer */
363 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
365 dbg("%s: set secondary LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
370 /* Set base Latency Timer */
371 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
373 dbg("%s: set LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
377 /* Set Cache Line size */
378 temp_byte = 0x08; /* hard coded value for CLS */
379 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
381 dbg("%s: set CLS error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
384 /* Set enable_perr */
385 /* Set enable_serr */
390 void shpchprm_enable_card(
391 struct controller *ctrl,
392 struct pci_func *func,
395 u16 command, bcommand;
396 struct pci_bus lpci_bus, *pci_bus;
400 memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
402 pci_bus->number = func->bus;
403 devfn = PCI_DEVFN(func->device, func->function);
405 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
406 command |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR
407 | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
408 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
409 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
411 if (card_type == PCI_HEADER_TYPE_BRIDGE) {
412 rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
413 bcommand |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR
414 | PCI_BRIDGE_CTL_NO_ISA;
415 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
419 static int legacy_shpchprm_init_pci(void)
421 shpchp_rom_start = (u8 *) ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
422 if (!shpchp_rom_start) {
423 err("Could not ioremap memory region for ROM\n");
430 int shpchprm_init(enum php_ctlr_type ctrl_type)
436 retval = legacy_shpchprm_init_pci();