drivers/i2c/i2c-algo-ite.c

   1 /*
   2    -------------------------------------------------------------------------
   3    i2c-algo-ite.c i2c driver algorithms for ITE adapters
   4
   5    Hai-Pao Fan, MontaVista Software, Inc.
   6    hpfan@mvista.com or source@mvista.com
   7
   8    Copyright 2000 MontaVista Software Inc.
   9
  10    ---------------------------------------------------------------------------
  11    This file was highly leveraged from i2c-algo-pcf.c, which was created
  12    by Simon G. Vogl and Hans Berglund:
  13
  14
  15      Copyright (C) 1995-1997 Simon G. Vogl
  16                    1998-2000 Hans Berglund
  17
  18     This program is free software; you can redistribute it and/or modify
  19     it under the terms of the GNU General Public License as published by
  20     the Free Software Foundation; either version 2 of the License, or
  21     (at your option) any later version.
  22
  23     This program is distributed in the hope that it will be useful,
  24     but WITHOUT ANY WARRANTY; without even the implied warranty of
  25     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26     GNU General Public License for more details.
  27
  28     You should have received a copy of the GNU General Public License
  29     along with this program; if not, write to the Free Software
  30     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.                */
  31 /* ------------------------------------------------------------------------- */
  32
  33 /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
  34    Frodo Looijaard <frodol@dds.nl> ,and also from Martin Bailey
  35    <mbailey@littlefeet-inc.com> */
  36
  37 #include <linux/kernel.h>
  38 #include <linux/module.h>
  39 #include <linux/delay.h>
  40 #include <linux/slab.h>
  41 #include <linux/init.h>
  42 #include <asm/uaccess.h>
  43 #include <linux/ioport.h>
  44 #include <linux/errno.h>
  45 #include <linux/sched.h>
  46
  47 #include <linux/i2c.h>
  48 #include <linux/i2c-algo-ite.h>
  49 #include "i2c-ite.h"
  50
  51 #define PM_DSR          IT8172_PCI_IO_BASE + IT_PM_DSR
  52 #define PM_IBSR         IT8172_PCI_IO_BASE + IT_PM_DSR + 0x04
  53 #define GPIO_CCR        IT8172_PCI_IO_BASE + IT_GPCCR
  54
  55 /* ----- global defines ----------------------------------------------- */
  56 #define DEB(x) if (i2c_debug>=1) x
  57 #define DEB2(x) if (i2c_debug>=2) x
  58 #define DEB3(x) if (i2c_debug>=3) x /* print several statistical values*/
  59 #define DEBPROTO(x) if (i2c_debug>=9) x;
  60         /* debug the protocol by showing transferred bits */
  61 #define DEF_TIMEOUT 16
  62
  63 /* debugging - slow down transfer to have a look at the data ..         */
  64 /* I use this with two leds&resistors, each one connected to sda,scl    */
  65 /* respectively. This makes sure that the algorithm works. Some chips   */
  66 /* might not like this, as they have an internal timeout of some mils   */
  67 /*
  68 #define SLO_IO      jif=jiffies;while(jiffies<=jif+i2c_table[minor].veryslow)\
  69                         if (need_resched) schedule();
  70 */
  71
  72
  73 /* ----- global variables --------------------------------------------- */
  74
  75 #ifdef SLO_IO
  76         int jif;
  77 #endif
  78
  79 /* module parameters:
  80  */
  81 static int i2c_debug=1;
  82 static int iic_test=0;  /* see if the line-setting functions work       */
  83 static int iic_scan=0;  /* have a look at what's hanging 'round         */
  84
  85 /* --- setting states on the bus with the right timing: --------------- */
  86
  87 #define get_clock(adap) adap->getclock(adap->data)
  88 #define iic_outw(adap, reg, val) adap->setiic(adap->data, reg, val)
  89 #define iic_inw(adap, reg) adap->getiic(adap->data, reg)
  90
  91
  92 /* --- other auxiliary functions -------------------------------------- */
  93
  94 static void iic_start(struct i2c_algo_iic_data *adap)
  95 {
  96         iic_outw(adap,ITE_I2CHCR,ITE_CMD);
  97 }
  98
  99 static void iic_stop(struct i2c_algo_iic_data *adap)
 100 {
 101         iic_outw(adap,ITE_I2CHCR,0);
 102         iic_outw(adap,ITE_I2CHSR,ITE_I2CHSR_TDI);
 103 }
 104
 105 static void iic_reset(struct i2c_algo_iic_data *adap)
 106 {
 107         iic_outw(adap, PM_IBSR, iic_inw(adap, PM_IBSR) | 0x80);
 108 }
 109
 110
 111 static int wait_for_bb(struct i2c_algo_iic_data *adap)
 112 {
 113         int timeout = DEF_TIMEOUT;
 114         short status;
 115
 116         status = iic_inw(adap, ITE_I2CHSR);
 117 #ifndef STUB_I2C
 118         while (timeout-- && (status & ITE_I2CHSR_HB)) {
 119                 udelay(1000); /* How much is this? */
 120                 status = iic_inw(adap, ITE_I2CHSR);
 121         }
 122 #endif
 123         if (timeout<=0) {
 124                 printk(KERN_ERR "Timeout, host is busy\n");
 125                 iic_reset(adap);
 126         }
 127         return(timeout<=0);
 128 }
 129
 130 /*
 131  * Puts this process to sleep for a period equal to timeout
 132  */
 133 static inline void iic_sleep(unsigned long timeout)
 134 {
 135         schedule_timeout( timeout * HZ);
 136 }
 137
 138 /* After we issue a transaction on the IIC bus, this function
 139  * is called.  It puts this process to sleep until we get an interrupt from
 140  * from the controller telling us that the transaction we requested in complete.
 141  */
 142 static int wait_for_pin(struct i2c_algo_iic_data *adap, short *status) {
 143
 144         int timeout = DEF_TIMEOUT;
 145
 146         timeout = wait_for_bb(adap);
 147         if (timeout) {
 148                 DEB2(printk("Timeout waiting for host not busy\n");)
 149                 return -EIO;
 150         }
 151         timeout = DEF_TIMEOUT;
 152
 153         *status = iic_inw(adap, ITE_I2CHSR);
 154 #ifndef STUB_I2C
 155         while (timeout-- && !(*status & ITE_I2CHSR_TDI)) {
 156            adap->waitforpin();
 157            *status = iic_inw(adap, ITE_I2CHSR);
 158         }
 159 #endif
 160         if (timeout <= 0)
 161                 return(-1);
 162         else
 163                 return(0);
 164 }
 165
 166 static int wait_for_fe(struct i2c_algo_iic_data *adap, short *status)
 167 {
 168         int timeout = DEF_TIMEOUT;
 169
 170         *status = iic_inw(adap, ITE_I2CFSR);
 171 #ifndef STUB_I2C
 172         while (timeout-- && (*status & ITE_I2CFSR_FE)) {
 173                 udelay(1000);
 174                 iic_inw(adap, ITE_I2CFSR);
 175         }
 176 #endif
 177         if (timeout <= 0)
 178                 return(-1);
 179         else
 180                 return(0);
 181 }
 182
 183 static int iic_init (struct i2c_algo_iic_data *adap)
 184 {
 185         short i;
 186
 187         /* Clear bit 7 to set I2C to normal operation mode */
 188         i=iic_inw(adap, PM_DSR)& 0xff7f;
 189         iic_outw(adap, PM_DSR, i);
 190
 191         /* set IT_GPCCR port C bit 2&3 as function 2 */
 192         i = iic_inw(adap, GPIO_CCR) & 0xfc0f;
 193         iic_outw(adap,GPIO_CCR,i);
 194
 195         /* Clear slave address/sub-address */
 196         iic_outw(adap,ITE_I2CSAR, 0);
 197         iic_outw(adap,ITE_I2CSSAR, 0);
 198
 199         /* Set clock counter register */
 200         iic_outw(adap,ITE_I2CCKCNT, get_clock(adap));
 201
 202         /* Set START/reSTART/STOP time registers */
 203         iic_outw(adap,ITE_I2CSHDR, 0x0a);
 204         iic_outw(adap,ITE_I2CRSUR, 0x0a);
 205         iic_outw(adap,ITE_I2CPSUR, 0x0a);
 206
 207         /* Enable interrupts on completing the current transaction */
 208         iic_outw(adap,ITE_I2CHCR, ITE_I2CHCR_IE | ITE_I2CHCR_HCE);
 209
 210         /* Clear transfer count */
 211         iic_outw(adap,ITE_I2CFBCR, 0x0);
 212
 213         DEB2(printk("iic_init: Initialized IIC on ITE 0x%x\n",
 214                 iic_inw(adap, ITE_I2CHSR)));
 215         return 0;
 216 }
 217
 218
 219 /*
 220  * Sanity check for the adapter hardware - check the reaction of
 221  * the bus lines only if it seems to be idle.
 222  */
 223 static int test_bus(struct i2c_algo_iic_data *adap, char *name) {
 224 #if 0
 225         int scl,sda;
 226         sda=getsda(adap);
 227         if (adap->getscl==NULL) {
 228                 printk("test_bus: Warning: Adapter can't read from clock line - skipping test.\n");
 229                 return 0;
 230         }
 231         scl=getscl(adap);
 232         printk("test_bus: Adapter: %s scl: %d  sda: %d -- testing...\n",
 233         name,getscl(adap),getsda(adap));
 234         if (!scl || !sda ) {
 235                 printk("test_bus: %s seems to be busy.\n",adap->name);
 236                 goto bailout;
 237         }
 238         sdalo(adap);
 239         printk("test_bus:1 scl: %d  sda: %d \n",getscl(adap),
 240                getsda(adap));
 241         if ( 0 != getsda(adap) ) {
 242                 printk("test_bus: %s SDA stuck high!\n",name);
 243                 sdahi(adap);
 244                 goto bailout;
 245         }
 246         if ( 0 == getscl(adap) ) {
 247                 printk("test_bus: %s SCL unexpected low while pulling SDA low!\n",
 248                         name);
 249                 goto bailout;
 250         }
 251         sdahi(adap);
 252         printk("test_bus:2 scl: %d  sda: %d \n",getscl(adap),
 253                getsda(adap));
 254         if ( 0 == getsda(adap) ) {
 255                 printk("test_bus: %s SDA stuck low!\n",name);
 256                 sdahi(adap);
 257                 goto bailout;
 258         }
 259         if ( 0 == getscl(adap) ) {
 260                 printk("test_bus: %s SCL unexpected low while SDA high!\n",
 261                        adap->name);
 262         goto bailout;
 263         }
 264         scllo(adap);
 265         printk("test_bus:3 scl: %d  sda: %d \n",getscl(adap),
 266                getsda(adap));
 267         if ( 0 != getscl(adap) ) {
 268
 269                 sclhi(adap);
 270                 goto bailout;
 271         }
 272         if ( 0 == getsda(adap) ) {
 273                 printk("test_bus: %s SDA unexpected low while pulling SCL low!\n",
 274                         name);
 275                 goto bailout;
 276         }
 277         sclhi(adap);
 278         printk("test_bus:4 scl: %d  sda: %d \n",getscl(adap),
 279                getsda(adap));
 280         if ( 0 == getscl(adap) ) {
 281                 printk("test_bus: %s SCL stuck low!\n",name);
 282                 sclhi(adap);
 283                 goto bailout;
 284         }
 285         if ( 0 == getsda(adap) ) {
 286                 printk("test_bus: %s SDA unexpected low while SCL high!\n",
 287                         name);
 288                 goto bailout;
 289         }
 290         printk("test_bus: %s passed test.\n",name);
 291         return 0;
 292 bailout:
 293         sdahi(adap);
 294         sclhi(adap);
 295         return -ENODEV;
 296 #endif
 297         return (0);
 298 }
 299
 300 /* ----- Utility functions
 301  */
 302
 303
 304 /* Verify the device we want to talk to on the IIC bus really exists. */
 305 static inline int try_address(struct i2c_algo_iic_data *adap,
 306                        unsigned int addr, int retries)
 307 {
 308         int i, ret = -1;
 309         short status;
 310
 311         for (i=0;i<retries;i++) {
 312                 iic_outw(adap, ITE_I2CSAR, addr);
 313                 iic_start(adap);
 314                 if (wait_for_pin(adap, &status) == 0) {
 315                         if ((status & ITE_I2CHSR_DNE) == 0) {
 316                                 iic_stop(adap);
 317                                 iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
 318                                 ret=1;
 319                                 break;  /* success! */
 320                         }
 321                 }
 322                 iic_stop(adap);
 323                 udelay(adap->udelay);
 324         }
 325         DEB2(if (i) printk("try_address: needed %d retries for 0x%x\n",i,
 326                            addr));
 327         return ret;
 328 }
 329
 330
 331 static int iic_sendbytes(struct i2c_adapter *i2c_adap,const char *buf,
 332                          int count)
 333 {
 334         struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
 335         int wrcount=0, timeout;
 336         short status;
 337         int loops, remainder, i, j;
 338         union {
 339                 char byte[2];
 340                 unsigned short word;
 341         } tmp;
 342
 343         iic_outw(adap, ITE_I2CSSAR, (unsigned short)buf[wrcount++]);
 344         count--;
 345         if (count == 0)
 346                 return -EIO;
 347
 348         loops =  count / 32;            /* 32-byte FIFO */
 349         remainder = count % 32;
 350
 351         if(loops) {
 352                 for(i=0; i<loops; i++) {
 353
 354                         iic_outw(adap, ITE_I2CFBCR, 32);
 355                         for(j=0; j<32/2; j++) {
 356                                 tmp.byte[1] = buf[wrcount++];
 357                                 tmp.byte[0] = buf[wrcount++];
 358                                 iic_outw(adap, ITE_I2CFDR, tmp.word);
 359                         }
 360
 361                         /* status FIFO overrun */
 362                         iic_inw(adap, ITE_I2CFSR);
 363                         iic_inw(adap, ITE_I2CFBCR);
 364
 365                         iic_outw(adap, ITE_I2CHCR, ITE_WRITE);  /* Issue WRITE command */
 366
 367                         /* Wait for transmission to complete */
 368                         timeout = wait_for_pin(adap, &status);
 369                         if(timeout) {
 370                                 iic_stop(adap);
 371                                 printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);
 372                                 return -EREMOTEIO; /* got a better one ?? */
 373         }
 374                         if (status & ITE_I2CHSR_DB) {
 375                                 iic_stop(adap);
 376                                 printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);
 377                                 return -EREMOTEIO; /* got a better one ?? */
 378                         }
 379                 }
 380         }
 381         if(remainder) {
 382                 iic_outw(adap, ITE_I2CFBCR, remainder);
 383                 for(i=0; i<remainder/2; i++) {
 384                         tmp.byte[1] = buf[wrcount++];
 385                         tmp.byte[0] = buf[wrcount++];
 386                         iic_outw(adap, ITE_I2CFDR, tmp.word);
 387                 }
 388
 389                 /* status FIFO overrun */
 390                 iic_inw(adap, ITE_I2CFSR);
 391                 iic_inw(adap, ITE_I2CFBCR);
 392
 393                 iic_outw(adap, ITE_I2CHCR, ITE_WRITE);  /* Issue WRITE command */
 394
 395                 timeout = wait_for_pin(adap, &status);
 396                 if(timeout) {
 397                         iic_stop(adap);
 398                         printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);
 399                         return -EREMOTEIO; /* got a better one ?? */
 400                 }
 401 #ifndef STUB_I2C
 402                 if (status & ITE_I2CHSR_DB) {
 403                         iic_stop(adap);
 404                         printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);
 405                         return -EREMOTEIO; /* got a better one ?? */
 406                 }
 407 #endif
 408         }
 409         iic_stop(adap);
 410         return wrcount;
 411 }
 412
 413
 414 static int iic_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count,
 415         int sread)
 416 {
 417         int rdcount=0, i, timeout;
 418         short status;
 419         struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
 420         int loops, remainder, j;
 421         union {
 422                 char byte[2];
 423                 unsigned short word;
 424         } tmp;
 425
 426         loops = count / 32;                             /* 32-byte FIFO */
 427         remainder = count % 32;
 428
 429         if(loops) {
 430                 for(i=0; i<loops; i++) {
 431                         iic_outw(adap, ITE_I2CFBCR, 32);
 432                         if (sread)
 433                                 iic_outw(adap, ITE_I2CHCR, ITE_SREAD);
 434                         else
 435                                 iic_outw(adap, ITE_I2CHCR, ITE_READ);           /* Issue READ command */
 436
 437                         timeout = wait_for_pin(adap, &status);
 438                         if(timeout) {
 439                                 iic_stop(adap);
 440                                 printk("iic_readbytes:  %s read timeout.\n", i2c_adap->name);
 441                                 return (-1);
 442                         }
 443 #ifndef STUB_I2C
 444                         if (status & ITE_I2CHSR_DB) {
 445                                 iic_stop(adap);
 446                                 printk("iic_readbytes: %s read error - no ack.\n", i2c_adap->name);
 447                                 return (-1);
 448                         }
 449 #endif
 450
 451                         timeout = wait_for_fe(adap, &status);
 452                         if(timeout) {
 453                                 iic_stop(adap);
 454                                 printk("iic_readbytes:  %s FIFO is empty\n", i2c_adap->name);
 455                                 return (-1);
 456                         }
 457
 458                         for(j=0; j<32/2; j++) {
 459                                 tmp.word = iic_inw(adap, ITE_I2CFDR);
 460                                 buf[rdcount++] = tmp.byte[1];
 461                                 buf[rdcount++] = tmp.byte[0];
 462                         }
 463
 464                         /* status FIFO underrun */
 465                         iic_inw(adap, ITE_I2CFSR);
 466
 467                 }
 468         }
 469
 470
 471         if(remainder) {
 472                 remainder=(remainder+1)/2 * 2;
 473                 iic_outw(adap, ITE_I2CFBCR, remainder);
 474                 if (sread)
 475                         iic_outw(adap, ITE_I2CHCR, ITE_SREAD);
 476                 else
 477                 iic_outw(adap, ITE_I2CHCR, ITE_READ);           /* Issue READ command */
 478
 479                 timeout = wait_for_pin(adap, &status);
 480                 if(timeout) {
 481                         iic_stop(adap);
 482                         printk("iic_readbytes:  %s read timeout.\n", i2c_adap->name);
 483                         return (-1);
 484                 }
 485 #ifndef STUB_I2C
 486                 if (status & ITE_I2CHSR_DB) {
 487                         iic_stop(adap);
 488                         printk("iic_readbytes: %s read error - no ack.\n", i2c_adap->name);
 489                         return (-1);
 490                 }
 491 #endif
 492                 timeout = wait_for_fe(adap, &status);
 493                 if(timeout) {
 494                         iic_stop(adap);
 495                         printk("iic_readbytes:  %s FIFO is empty\n", i2c_adap->name);
 496                         return (-1);
 497                 }
 498
 499                 for(i=0; i<(remainder+1)/2; i++) {
 500                         tmp.word = iic_inw(adap, ITE_I2CFDR);
 501                         buf[rdcount++] = tmp.byte[1];
 502                         buf[rdcount++] = tmp.byte[0];
 503                 }
 504
 505                 /* status FIFO underrun */
 506                 iic_inw(adap, ITE_I2CFSR);
 507
 508         }
 509
 510         iic_stop(adap);
 511         return rdcount;
 512 }
 513
 514
 515 /* This function implements combined transactions.  Combined
 516  * transactions consist of combinations of reading and writing blocks of data.
 517  * Each transfer (i.e. a read or a write) is separated by a repeated start
 518  * condition.
 519  */
 520 #if 0
 521 static int iic_combined_transaction(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num)
 522 {
 523    int i;
 524    struct i2c_msg *pmsg;
 525    int ret;
 526
 527    DEB2(printk("Beginning combined transaction\n"));
 528
 529    for(i=0; i<(num-1); i++) {
 530       pmsg = &msgs[i];
 531       if(pmsg->flags & I2C_M_RD) {
 532          DEB2(printk("  This one is a read\n"));
 533          ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_COMBINED_XFER);
 534       }
 535       else if(!(pmsg->flags & I2C_M_RD)) {
 536          DEB2(printk("This one is a write\n"));
 537          ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_COMBINED_XFER);
 538       }
 539    }
 540    /* Last read or write segment needs to be terminated with a stop */
 541    pmsg = &msgs[i];
 542
 543    if(pmsg->flags & I2C_M_RD) {
 544       DEB2(printk("Doing the last read\n"));
 545       ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_SINGLE_XFER);
 546    }
 547    else if(!(pmsg->flags & I2C_M_RD)) {
 548       DEB2(printk("Doing the last write\n"));
 549       ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_SINGLE_XFER);
 550    }
 551
 552    return ret;
 553 }
 554 #endif
 555
 556
 557 /* Whenever we initiate a transaction, the first byte clocked
 558  * onto the bus after the start condition is the address (7 bit) of the
 559  * device we want to talk to.  This function manipulates the address specified
 560  * so that it makes sense to the hardware when written to the IIC peripheral.
 561  *
 562  * Note: 10 bit addresses are not supported in this driver, although they are
 563  * supported by the hardware.  This functionality needs to be implemented.
 564  */
 565 static inline int iic_doAddress(struct i2c_algo_iic_data *adap,
 566                                 struct i2c_msg *msg, int retries)
 567 {
 568         unsigned short flags = msg->flags;
 569         unsigned int addr;
 570         int ret;
 571
 572 /* Ten bit addresses not supported right now */
 573         if ( (flags & I2C_M_TEN)  ) {
 574 #if 0
 575                 addr = 0xf0 | (( msg->addr >> 7) & 0x03);
 576                 DEB2(printk("addr0: %d\n",addr));
 577                 ret = try_address(adap, addr, retries);
 578                 if (ret!=1) {
 579                         printk("iic_doAddress: died at extended address code.\n");
 580                         return -EREMOTEIO;
 581                 }
 582                 iic_outw(adap,msg->addr & 0x7f);
 583                 if (ret != 1) {
 584                         printk("iic_doAddress: died at 2nd address code.\n");
 585                         return -EREMOTEIO;
 586                 }
 587                 if ( flags & I2C_M_RD ) {
 588                         i2c_repstart(adap);
 589                         addr |= 0x01;
 590                         ret = try_address(adap, addr, retries);
 591                         if (ret!=1) {
 592                                 printk("iic_doAddress: died at extended address code.\n");
 593                                 return -EREMOTEIO;
 594                         }
 595                 }
 596 #endif
 597         } else {
 598
 599                 addr = ( msg->addr << 1 );
 600
 601 #if 0
 602                 if (flags & I2C_M_RD )
 603                         addr |= 1;
 604                 if (flags & I2C_M_REV_DIR_ADDR )
 605                         addr ^= 1;
 606 #endif
 607
 608                 if (iic_inw(adap, ITE_I2CSAR) != addr) {
 609                         iic_outw(adap, ITE_I2CSAR, addr);
 610                         ret = try_address(adap, addr, retries);
 611                         if (ret!=1) {
 612                                 printk("iic_doAddress: died at address code.\n");
 613                                 return -EREMOTEIO;
 614                         }
 615                 }
 616
 617   }
 618
 619         return 0;
 620 }
 621
 622
 623 /* Description: Prepares the controller for a transaction (clearing status
 624  * registers, data buffers, etc), and then calls either iic_readbytes or
 625  * iic_sendbytes to do the actual transaction.
 626  *
 627  * still to be done: Before we issue a transaction, we should
 628  * verify that the bus is not busy or in some unknown state.
 629  */
 630 static int iic_xfer(struct i2c_adapter *i2c_adap,
 631                     struct i2c_msg msgs[],
 632                     int num)
 633 {
 634         struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
 635         struct i2c_msg *pmsg;
 636         int i = 0;
 637         int ret, timeout;
 638
 639         pmsg = &msgs[i];
 640
 641         if(!pmsg->len) {
 642                 DEB2(printk("iic_xfer: read/write length is 0\n");)
 643                 return -EIO;
 644         }
 645         if(!(pmsg->flags & I2C_M_RD) && (!(pmsg->len)%2) ) {
 646                 DEB2(printk("iic_xfer: write buffer length is not odd\n");)
 647                 return -EIO;
 648         }
 649
 650         /* Wait for any pending transfers to complete */
 651         timeout = wait_for_bb(adap);
 652         if (timeout) {
 653                 DEB2(printk("iic_xfer: Timeout waiting for host not busy\n");)
 654                 return -EIO;
 655         }
 656
 657         /* Flush FIFO */
 658         iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
 659
 660         /* Load address */
 661         ret = iic_doAddress(adap, pmsg, i2c_adap->retries);
 662         if (ret)
 663                 return -EIO;
 664
 665 #if 0
 666         /* Combined transaction (read and write) */
 667         if(num > 1) {
 668            DEB2(printk("iic_xfer: Call combined transaction\n"));
 669            ret = iic_combined_transaction(i2c_adap, msgs, num);
 670   }
 671 #endif
 672
 673         DEB3(printk("iic_xfer: Msg %d, addr=0x%x, flags=0x%x, len=%d\n",
 674                 i, msgs[i].addr, msgs[i].flags, msgs[i].len);)
 675
 676         if(pmsg->flags & I2C_M_RD)              /* Read */
 677                 ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, 0);
 678         else {                                                                                                  /* Write */
 679                 udelay(1000);
 680                 ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len);
 681         }
 682
 683         if (ret != pmsg->len)
 684                 DEB3(printk("iic_xfer: error or fail on read/write %d bytes.\n",ret));
 685         else
 686                 DEB3(printk("iic_xfer: read/write %d bytes.\n",ret));
 687
 688         return ret;
 689 }
 690
 691
 692 /* Implements device specific ioctls.  Higher level ioctls can
 693  * be found in i2c-core.c and are typical of any i2c controller (specifying
 694  * slave address, timeouts, etc).  These ioctls take advantage of any hardware
 695  * features built into the controller for which this algorithm-adapter set
 696  * was written.  These ioctls allow you to take control of the data and clock
 697  * lines and set the either high or low,
 698  * similar to a GPIO pin.
 699  */
 700 static int algo_control(struct i2c_adapter *adapter,
 701         unsigned int cmd, unsigned long arg)
 702 {
 703
 704   struct i2c_algo_iic_data *adap = adapter->algo_data;
 705   struct i2c_iic_msg s_msg;
 706   char *buf;
 707         int ret;
 708
 709   if (cmd == I2C_SREAD) {
 710                 if(copy_from_user(&s_msg, (struct i2c_iic_msg *)arg,
 711                                 sizeof(struct i2c_iic_msg)))
 712                         return -EFAULT;
 713                 buf = kmalloc(s_msg.len, GFP_KERNEL);
 714                 if (buf== NULL)
 715                         return -ENOMEM;
 716
 717                 /* Flush FIFO */
 718                 iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
 719
 720                 /* Load address */
 721                 iic_outw(adap, ITE_I2CSAR,s_msg.addr<<1);
 722                 iic_outw(adap, ITE_I2CSSAR,s_msg.waddr & 0xff);
 723
 724                 ret = iic_readbytes(adapter, buf, s_msg.len, 1);
 725                 if (ret>=0) {
 726                         if(copy_to_user( s_msg.buf, buf, s_msg.len) )
 727                                 ret = -EFAULT;
 728                 }
 729                 kfree(buf);
 730         }
 731         return 0;
 732 }
 733
 734
 735 static u32 iic_func(struct i2c_adapter *adap)
 736 {
 737         return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR |
 738                I2C_FUNC_PROTOCOL_MANGLING;
 739 }
 740
 741 /* -----exported algorithm data: -------------------------------------  */
 742
 743 static struct i2c_algorithm iic_algo = {
 744         "ITE IIC algorithm",
 745         I2C_ALGO_IIC,
 746         iic_xfer,               /* master_xfer  */
 747         NULL,                           /* smbus_xfer   */
 748         NULL,                           /* slave_xmit           */
 749         NULL,                           /* slave_recv           */
 750         algo_control,                   /* ioctl                */
 751         iic_func,                       /* functionality        */
 752 };
 753
 754
 755 /*
 756  * registering functions to load algorithms at runtime
 757  */
 758 int i2c_iic_add_bus(struct i2c_adapter *adap)
 759 {
 760         int i;
 761         short status;
 762         struct i2c_algo_iic_data *iic_adap = adap->algo_data;
 763
 764         if (iic_test) {
 765                 int ret = test_bus(iic_adap, adap->name);
 766                 if (ret<0)
 767                         return -ENODEV;
 768         }
 769
 770         DEB2(printk("i2c-algo-ite: hw routines for %s registered.\n",
 771                     adap->name));
 772
 773         /* register new adapter to i2c module... */
 774
 775         adap->id |= iic_algo.id;
 776         adap->algo = &iic_algo;
 777
 778         adap->timeout = 100;    /* default values, should       */
 779         adap->retries = 3;              /* be replaced by defines       */
 780         adap->flags = 0;
 781
 782 #ifdef MODULE
 783         MOD_INC_USE_COUNT;
 784 #endif
 785
 786         iic_init(iic_adap);
 787
 788         /* scan bus */
 789         /* By default scanning the bus is turned off. */
 790         if (iic_scan) {
 791                 printk(KERN_INFO " i2c-algo-ite: scanning bus %s.\n",
 792                        adap->name);
 793                 for (i = 0x00; i < 0xff; i+=2) {
 794                         iic_outw(iic_adap, ITE_I2CSAR, i);
 795                         iic_start(iic_adap);
 796                         if ( (wait_for_pin(iic_adap, &status) == 0) &&
 797                             ((status & ITE_I2CHSR_DNE) == 0) ) {
 798                                 printk(KERN_INFO "\n(%02x)\n",i>>1);
 799                         } else {
 800                                 printk(KERN_INFO ".");
 801                                 iic_reset(iic_adap);
 802                         }
 803                         udelay(iic_adap->udelay);
 804                 }
 805         }
 806
 807         return i2c_add_adapter(adap);
 808 }
 809
 810
 811 int i2c_iic_del_bus(struct i2c_adapter *adap)
 812 {
 813         int res;
 814         if ((res = i2c_del_adapter(adap)) < 0)
 815                 return res;
 816         DEB2(printk("i2c-algo-ite: adapter unregistered: %s\n",adap->name));
 817
 818 #ifdef MODULE
 819         MOD_DEC_USE_COUNT;
 820 #endif
 821         return 0;
 822 }
 823
 824
 825 int __init i2c_algo_iic_init (void)
 826 {
 827         printk(KERN_INFO "ITE iic (i2c) algorithm module\n");
 828         return 0;
 829 }
 830
 831
 832 void i2c_algo_iic_exit(void)
 833 {
 834         return;
 835 }
 836
 837
 838 EXPORT_SYMBOL(i2c_iic_add_bus);
 839 EXPORT_SYMBOL(i2c_iic_del_bus);
 840
 841 /* The MODULE_* macros resolve to nothing if MODULES is not defined
 842  * when this file is compiled.
 843  */
 844 MODULE_AUTHOR("MontaVista Software <www.mvista.com>");
 845 MODULE_DESCRIPTION("ITE iic algorithm");
 846 MODULE_LICENSE("GPL");
 847
 848 MODULE_PARM(iic_test, "i");
 849 MODULE_PARM(iic_scan, "i");
 850 MODULE_PARM(i2c_debug,"i");
 851
 852 MODULE_PARM_DESC(iic_test, "Test if the I2C bus is available");
 853 MODULE_PARM_DESC(iic_scan, "Scan for active chips on the bus");
 854 MODULE_PARM_DESC(i2c_debug,
 855         "debug level - 0 off; 1 normal; 2,3 more verbose; 9 iic-protocol");
 856
 857
 858 /* This function resolves to init_module (the function invoked when a module
 859  * is loaded via insmod) when this file is compiled with MODULES defined.
 860  * Otherwise (i.e. if you want this driver statically linked to the kernel),
 861  * a pointer to this function is stored in a table and called
 862  * during the intialization of the kernel (in do_basic_setup in /init/main.c)
 863  *
 864  * All this functionality is complements of the macros defined in linux/init.h
 865  */
 866 module_init(i2c_algo_iic_init);
 867
 868
 869 /* If MODULES is defined when this file is compiled, then this function will
 870  * resolved to cleanup_module.
 871  */
 872 module_exit(i2c_algo_iic_exit);