update atp870u driver to 0.78 from D-Link source
[linux-2.4.git] / drivers / ide / arm / icside.c
1 /*
2  * linux/drivers/ide/arm/icside.c
3  *
4  * Copyright (c) 1996,1997 Russell King.
5  *
6  * Changelog:
7  *  08-Jun-1996 RMK     Created
8  *  12-Sep-1997 RMK     Added interrupt enable/disable
9  *  17-Apr-1999 RMK     Added support for V6 EASI
10  *  22-May-1999 RMK     Added support for V6 DMA
11  */
12
13 #include <linux/config.h>
14 #include <linux/string.h>
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/slab.h>
18 #include <linux/blkdev.h>
19 #include <linux/errno.h>
20 #include <linux/hdreg.h>
21 #include <linux/ide.h>
22 #include <linux/pci.h>
23 #include <linux/init.h>
24
25 #include <asm/dma.h>
26 #include <asm/ecard.h>
27 #include <asm/io.h>
28
29 #include "ide-noise.h"
30
31 /*
32  * FIXME: We want to drop the the MACRO CRAP!
33  *
34  * ec->iops->in{b/w/l}
35  * ec->iops->in{b/w/l}_p
36  * ec->iops->out{b/w/l}
37  * ec->iops->out{b/w/l}_p
38  *
39  * the new core supports clean MMIO calls and other goodies
40  */
41
42 /*
43  * Maximum number of interfaces per card
44  */
45 #define MAX_IFS 2
46
47 #define ICS_IDENT_OFFSET                0x8a0
48
49 #define ICS_ARCIN_V5_INTRSTAT           0x000
50 #define ICS_ARCIN_V5_INTROFFSET         0x001
51 #define ICS_ARCIN_V5_IDEOFFSET          0xa00
52 #define ICS_ARCIN_V5_IDEALTOFFSET       0xae0
53 #define ICS_ARCIN_V5_IDESTEPPING        4
54
55 #define ICS_ARCIN_V6_IDEOFFSET_1        0x800
56 #define ICS_ARCIN_V6_INTROFFSET_1       0x880
57 #define ICS_ARCIN_V6_INTRSTAT_1         0x8a4
58 #define ICS_ARCIN_V6_IDEALTOFFSET_1     0x8e0
59 #define ICS_ARCIN_V6_IDEOFFSET_2        0xc00
60 #define ICS_ARCIN_V6_INTROFFSET_2       0xc80
61 #define ICS_ARCIN_V6_INTRSTAT_2         0xca4
62 #define ICS_ARCIN_V6_IDEALTOFFSET_2     0xce0
63 #define ICS_ARCIN_V6_IDESTEPPING        4
64
65 struct cardinfo {
66         unsigned int dataoffset;
67         unsigned int ctrloffset;
68         unsigned int stepping;
69 };
70
71 static struct cardinfo icside_cardinfo_v5 = {
72         ICS_ARCIN_V5_IDEOFFSET,
73         ICS_ARCIN_V5_IDEALTOFFSET,
74         ICS_ARCIN_V5_IDESTEPPING
75 };
76
77 static struct cardinfo icside_cardinfo_v6_1 = {
78         ICS_ARCIN_V6_IDEOFFSET_1,
79         ICS_ARCIN_V6_IDEALTOFFSET_1,
80         ICS_ARCIN_V6_IDESTEPPING
81 };
82
83 static struct cardinfo icside_cardinfo_v6_2 = {
84         ICS_ARCIN_V6_IDEOFFSET_2,
85         ICS_ARCIN_V6_IDEALTOFFSET_2,
86         ICS_ARCIN_V6_IDESTEPPING
87 };
88
89 static const card_ids icside_cids[] = {
90         { MANU_ICS,  PROD_ICS_IDE  },
91         { MANU_ICS2, PROD_ICS2_IDE },
92         { 0xffff, 0xffff }
93 };
94
95 typedef enum {
96         ics_if_unknown,
97         ics_if_arcin_v5,
98         ics_if_arcin_v6
99 } iftype_t;
100
101 /* ---------------- Version 5 PCB Support Functions --------------------- */
102 /* Prototype: icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
103  * Purpose  : enable interrupts from card
104  */
105 static void icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
106 {
107         unsigned int memc_port = (unsigned int)ec->irq_data;
108         outb(0, memc_port + ICS_ARCIN_V5_INTROFFSET);
109 }
110
111 /* Prototype: icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
112  * Purpose  : disable interrupts from card
113  */
114 static void icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
115 {
116         unsigned int memc_port = (unsigned int)ec->irq_data;
117         inb(memc_port + ICS_ARCIN_V5_INTROFFSET);
118 }
119
120 static const expansioncard_ops_t icside_ops_arcin_v5 = {
121         icside_irqenable_arcin_v5,
122         icside_irqdisable_arcin_v5,
123         NULL,
124         NULL,
125         NULL,
126         NULL
127 };
128
129
130 /* ---------------- Version 6 PCB Support Functions --------------------- */
131 /* Prototype: icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
132  * Purpose  : enable interrupts from card
133  */
134 static void icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
135 {
136         unsigned int ide_base_port = (unsigned int)ec->irq_data;
137
138         outb(0, ide_base_port + ICS_ARCIN_V6_INTROFFSET_1);
139         outb(0, ide_base_port + ICS_ARCIN_V6_INTROFFSET_2);
140 }
141
142 /* Prototype: icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
143  * Purpose  : disable interrupts from card
144  */
145 static void icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
146 {
147         unsigned int ide_base_port = (unsigned int)ec->irq_data;
148
149         inb(ide_base_port + ICS_ARCIN_V6_INTROFFSET_1);
150         inb(ide_base_port + ICS_ARCIN_V6_INTROFFSET_2);
151 }
152
153 /* Prototype: icside_irqprobe(struct expansion_card *ec)
154  * Purpose  : detect an active interrupt from card
155  */
156 static int icside_irqpending_arcin_v6(struct expansion_card *ec)
157 {
158         unsigned int ide_base_port = (unsigned int)ec->irq_data;
159
160         return inb(ide_base_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
161                inb(ide_base_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
162 }
163
164 static const expansioncard_ops_t icside_ops_arcin_v6 = {
165         icside_irqenable_arcin_v6,
166         icside_irqdisable_arcin_v6,
167         icside_irqpending_arcin_v6,
168         NULL,
169         NULL,
170         NULL
171 };
172
173 /* Prototype: icside_identifyif (struct expansion_card *ec)
174  * Purpose  : identify IDE interface type
175  * Notes    : checks the description string
176  */
177 static iftype_t __init icside_identifyif (struct expansion_card *ec)
178 {
179         unsigned int addr;
180         iftype_t iftype;
181         int id = 0;
182
183         iftype = ics_if_unknown;
184
185         addr = ecard_address (ec, ECARD_IOC, ECARD_FAST) + ICS_IDENT_OFFSET;
186
187         id = inb(addr) & 1;
188         id |= (inb(addr + 1) & 1) << 1;
189         id |= (inb(addr + 2) & 1) << 2;
190         id |= (inb(addr + 3) & 1) << 3;
191
192         switch (id) {
193         case 0: /* A3IN */
194                 printk("icside: A3IN unsupported\n");
195                 break;
196
197         case 1: /* A3USER */
198                 printk("icside: A3USER unsupported\n");
199                 break;
200
201         case 3: /* ARCIN V6 */
202                 printk(KERN_DEBUG "icside: detected ARCIN V6 in slot %d\n", ec->slot_no);
203                 iftype = ics_if_arcin_v6;
204                 break;
205
206         case 15:/* ARCIN V5 (no id) */
207                 printk(KERN_DEBUG "icside: detected ARCIN V5 in slot %d\n", ec->slot_no);
208                 iftype = ics_if_arcin_v5;
209                 break;
210
211         default:/* we don't know - complain very loudly */
212                 printk("icside: ***********************************\n");
213                 printk("icside: *** UNKNOWN ICS INTERFACE id=%d ***\n", id);
214                 printk("icside: ***********************************\n");
215                 printk("icside: please report this to linux@arm.linux.org.uk\n");
216                 printk("icside: defaulting to ARCIN V5\n");
217                 iftype = ics_if_arcin_v5;
218                 break;
219         }
220
221         return iftype;
222 }
223
224 #ifdef CONFIG_BLK_DEV_IDEDMA_ICS
225 /*
226  * SG-DMA support.
227  *
228  * Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
229  * There is only one DMA controller per card, which means that only
230  * one drive can be accessed at one time.  NOTE! We do not enforce that
231  * here, but we rely on the main IDE driver spotting that both
232  * interfaces use the same IRQ, which should guarantee this.
233  */
234 #define NR_ENTRIES 256
235 #define TABLE_SIZE (NR_ENTRIES * 8)
236
237 static int ide_build_sglist(ide_hwif_t *hwif, struct request *rq)
238 {
239         struct buffer_head *bh;
240         struct scatterlist *sg = hwif->sg_table;
241         int nents = 0;
242
243         if (rq->cmd == READ)
244                 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
245         else
246                 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
247         bh = rq->bh;
248         do {
249                 unsigned char *virt_addr = bh->b_data;
250                 unsigned int size = bh->b_size;
251
252                 while ((bh = bh->b_reqnext) != NULL) {
253                         if ((virt_addr + size) != (unsigned char *)bh->b_data)
254                                 break;
255                         size += bh->b_size;
256                 }
257                 memset(&sg[nents], 0, sizeof(*sg));
258                 sg[nents].address = virt_addr;
259                 sg[nents].length = size;
260                 nents++;
261         } while (bh != NULL);
262
263         return pci_map_sg(NULL, sg, nents, hwif->sg_dma_direction);
264 }
265
266 static int
267 icside_build_dmatable(ide_drive_t *drive, int ddir)
268 {
269         return HWIF(drive)->sg_nents = ide_build_sglist(HWIF(drive), HWGROUP(drive)->rq, ddir);
270 }
271
272 /* Teardown mappings after DMA has completed.  */
273 static void icside_destroy_dmatable(ide_drive_t *drive)
274 {
275         struct scatterlist *sg = HWIF(drive)->sg_table;
276         int nents = HWIF(drive)->sg_nents;
277
278         pci_unmap_sg(NULL, sg, nents, HWIF(drive)->sg_dma_direction);
279 }
280
281 static int
282 icside_config_if(ide_drive_t *drive, int xfer_mode)
283 {
284         int func = ide_dma_off;
285
286         switch (xfer_mode) {
287         case XFER_MW_DMA_2:
288                 /*
289                  * The cycle time is limited to 250ns by the r/w
290                  * pulse width (90ns), however we should still
291                  * have a maximum burst transfer rate of 8MB/s.
292                  */
293                 drive->drive_data = 250;
294                 break;
295
296         case XFER_MW_DMA_1:
297                 drive->drive_data = 250;
298                 break;
299
300         case XFER_MW_DMA_0:
301                 drive->drive_data = 480;
302                 break;
303
304         default:
305                 drive->drive_data = 0;
306                 break;
307         }
308
309         if (!drive->init_speed)
310                 drive->init_speed = (u8) xfer_mode;
311
312         if (drive->drive_data &&
313             ide_config_drive_speed(drive, (u8) xfer_mode) == 0)
314                 func = ide_dma_on;
315         else
316                 drive->drive_data = 480;
317
318         printk("%s: %s selected (peak %dMB/s)\n", drive->name,
319                 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data);
320
321         drive->current_speed = (u8) xfer_mode;
322
323         return func;
324 }
325
326 static int
327 icside_set_speed(ide_drive_t *drive, u8 speed)
328 {
329         return icside_config_if(drive, speed);
330 }
331
332 /*
333  * dma_intr() is the handler for disk read/write DMA interrupts
334  */
335 static ide_startstop_t icside_dmaintr(ide_drive_t *drive)
336 {
337         u8 dma_stat     = HWIF(drive)->ide_dma_end(drive);
338         /* get drive status */
339         u8 stat         = HWIF(drive)->INB(IDE_STATUS_REG);
340         int i;
341
342         if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
343                 if (!dma_stat) {
344                         struct request *rq = HWGROUP(drive)->rq;
345                         rq = HWGROUP(drive)->rq;
346                         for (i = rq->nr_sectors; i > 0;) {
347                                 i -= rq->current_nr_sectors;
348                                 DRIVER(drive)->end_request(drive, 1);
349                         }
350                         return ide_stopped;
351                 }
352                 printk("%s: dma_intr: bad DMA status (dma_stat=%x)\n", 
353                        drive->name, dma_stat);
354         }
355         return DRIVER(drive)->error(drive, "dma_intr", stat);
356 }
357
358 /*
359  * The following is a sick duplication from ide-dma.c ;(
360  *
361  * This should be defined in one place only.
362  */
363 struct drive_list_entry {
364         char * id_model;
365         char * id_firmware;
366 };
367
368 static struct drive_list_entry drive_whitelist [] = {
369         { "Micropolis 2112A",                   "ALL"           },
370         { "CONNER CTMA 4000",                   "ALL"           },
371         { "CONNER CTT8000-A",                   "ALL"           },
372         { "ST34342A",                           "ALL"           },
373         { NULL,                                 0               }
374 };
375
376 static struct drive_list_entry drive_blacklist [] = {
377         { "WDC AC11000H",                       "ALL"           },
378         { "WDC AC22100H",                       "ALL"           },
379         { "WDC AC32500H",                       "ALL"           },
380         { "WDC AC33100H",                       "ALL"           },
381         { "WDC AC31600H",                       "ALL"           },
382         { "WDC AC32100H",                       "24.09P07"      },
383         { "WDC AC23200L",                       "21.10N21"      },
384         { "Compaq CRD-8241B",                   "ALL"           },
385         { "CRD-8400B",                          "ALL"           },
386         { "CRD-8480B",                          "ALL"           },
387         { "CRD-8480C",                          "ALL"           },
388         { "CRD-8482B",                          "ALL"           },
389         { "CRD-84",                             "ALL"           },
390         { "SanDisk SDP3B",                      "ALL"           },
391         { "SanDisk SDP3B-64",                   "ALL"           },
392         { "SANYO CD-ROM CRD",                   "ALL"           },
393         { "HITACHI CDR-8",                      "ALL"           },
394         { "HITACHI CDR-8335",                   "ALL"           },
395         { "HITACHI CDR-8435",                   "ALL"           },
396         { "Toshiba CD-ROM XM-6202B",            "ALL"           },
397         { "CD-532E-A",                          "ALL"           },
398         { "E-IDE CD-ROM CR-840",                "ALL"           },
399         { "CD-ROM Drive/F5A",                   "ALL"           },
400         { "RICOH CD-R/RW MP7083A",              "ALL"           },
401         { "WPI CDD-820",                        "ALL"           },
402         { "SAMSUNG CD-ROM SC-148C",             "ALL"           },
403         { "SAMSUNG CD-ROM SC-148F",             "ALL"           },
404         { "SAMSUNG CD-ROM SC",                  "ALL"           },
405         { "SanDisk SDP3B-64",                   "ALL"           },
406         { "SAMSUNG CD-ROM SN-124",              "ALL"           },
407         { "PLEXTOR CD-R PX-W8432T",             "ALL"           },
408         { "ATAPI CD-ROM DRIVE 40X MAXIMUM",     "ALL"           },
409         { "_NEC DV5800A",                       "ALL"           },
410         { NULL,                                 0               }
411 };
412
413 static int in_drive_list(struct hd_driveid *id, struct drive_list_entry * drive_table)
414 {
415         for ( ; drive_table->id_model ; drive_table++)
416                 if ((!strcmp(drive_table->id_model, id->model)) &&
417                     ((!strstr(drive_table->id_firmware, id->fw_rev)) ||
418                      (!strcmp(drive_table->id_firmware, "ALL"))))
419                         return 1;
420         return 0;
421 }
422
423 /*
424  *  For both Blacklisted and Whitelisted drives.
425  *  This is setup to be called as an extern for future support
426  *  to other special driver code.
427  */
428 int check_drive_good_lists (ide_drive_t *drive)
429 {
430         struct hd_driveid *id = drive->id;
431         return in_drive_list(id, drive_whitelist);
432 }
433
434 int check_drive_bad_lists (ide_drive_t *drive)
435 {
436         struct hd_driveid *id = drive->id;
437         int blacklist = in_drive_list(id, drive_blacklist);
438         if (blacklist)
439                 printk("%s: Disabling DMA for %s\n", drive->name, id->model);
440         return(blacklist);
441 }
442
443 int icside_dma_check(ide_drive_t *drive)
444 {
445         struct hd_driveid *id = drive->id;
446         ide_hwif_t *hwif = HWIF(drive);
447         int autodma = hwif->autodma;
448         int xfer_mode = XFER_PIO_2;
449
450         if (!id || !(id->capability & 1) || !autodma)
451                 return hwif->ide_dma_off_quietly(drive);
452
453         /*
454          * Consult the list of known "bad" drives
455          */
456         if (check_drive_bad_lists(drive))
457                 return hwif->ide_dma_off(drive);
458
459         /*
460          * Enable DMA on any drive that has multiword DMA
461          */
462         if (id->field_valid & 2) {
463                 if (id->dma_mword & 4) {
464                         xfer_mode = XFER_MW_DMA_2;
465                 } else if (id->dma_mword & 2) {
466                         xfer_mode = XFER_MW_DMA_1;
467                 } else if (id->dma_mword & 1) {
468                         xfer_mode = XFER_MW_DMA_0;
469                 }
470                 goto out;
471         }
472
473         /*
474          * Consult the list of known "good" drives
475          */
476         if (check_drive_good_lists(drive)) {
477                 if (id->eide_dma_time > 150)
478                         goto out;
479                 xfer_mode = XFER_MW_DMA_1;
480         }
481
482 out:
483         if (icside_config_if(drive, xfer_mode))
484                 return hwif->ide_dma_on(drive);
485         return hwif->ide_dma_off(drive);
486 }
487
488 int icside_dma_verbose(ide_drive_t *drive)
489 {
490         printk(", DMA");
491         return 1;
492 }
493
494 int icside_dma_test_irq(ide_drive_t *drive)
495 {
496         ide_hwif_t *hwif = HWIF(drive);
497         return inb((unsigned long)hwif->hw.priv) & 1;
498 }
499
500 int icside_dma_host_off(ide_drive_t *drive)
501 {
502         return 0;
503 }
504
505 int icside_dma_off_quietly(ide_drive_t *drive)
506 {
507         drive->using_dma = 0;
508         return icside_dma_host_off(drive);
509 }
510
511 int icside_dma_off(ide_drive_t *drive)
512 {
513         printk("%s: DMA disabled\n", drive->name);
514         return icside_dma_off_quietly(drive);
515 }
516
517 int icside_dma_host_on(ide_drive_t *drive)
518 {
519         return 0;
520 }
521
522 int icside_dma_on(ide_drive_t *drive)
523 {
524         drive->using_dma = 1;
525         return icside_dma_host_on(drive);
526 }
527
528 int icside_dma_begin(ide_drive_t *drive)
529 {
530         ide_hwif_t *hwif = HWIF(drive);
531
532         enable_dma(hwif->hw.dma);
533         return 0;
534 }
535
536 int icside_dma_end(ide_drive_t *drive)
537 {
538         ide_hwif_t *hwif = HWIF(drive);
539  
540         drive->waiting_for_dma = 0;
541         disable_dma(hwif->hw.dma);
542         icside_destroy_dmatable(drive);
543         return get_dma_residue(hwif->hw.dma) != 0;
544 }
545
546 int icside_dma_count (ide_drive_t *drive)
547 {
548         return icside_dma_begin(drive);
549 }
550
551 int icside_dma_read(ide_drive_t *drive)
552 {
553         ide_hwif_t *hwif        = HWIF(drive);
554 //      ide_task_t *args        = HWGROUP(drive)->rq->special;
555         int count               = 0;
556         u8 lba48                = (drive->addressing == 1) ? 1 : 0;
557         task_ioreg_t command    = WIN_NOP;
558
559         count = icside_build_dmatable(drive, PCI_DMA_FROMDEVICE);
560         if (!count)
561                 return 1;
562         disable_dma(hwif->hw.dma);
563
564         /* Route the DMA signals to
565          * to the correct interface.
566          */
567         HWIF(drive)->OUTB(hwif->select_data, hwif->config_data);
568
569         /* Select the correct timing
570          * for this drive
571          */
572         set_dma_speed(hwif->hw.dma, drive->drive_data);
573
574         set_dma_sg(hwif->hw.dma, HWIF(drive)->sg_table, count);
575         set_dma_mode(hwif->hw.dma, DMA_MODE_READ);
576
577         drive->waiting_for_dma = 1;
578         if (drive->media != ide_disk)
579                 return 0;
580
581         if (HWGROUP(drive)->handler != NULL)    /* paranoia check */
582                 BUG();
583         ide_set_handler(drive, &icside_dmaintr, WAIT_CMD, NULL);
584         /*
585          * FIX ME to use only ACB ide_task_t args Struct
586          */
587 #if 0
588         {
589                 ide_task_t *args = HWGROUP(drive)->rq->special;
590                 command = args->tfRegister[IDE_COMMAND_OFFSET];
591         }
592 #else
593         command = (lba48) ? WIN_READDMA_EXT : WIN_READDMA;
594                 if (HWGROUP(drive)->rq->flags & REQ_DRIVE_TASKFILE) {
595                 ide_task_t *args = HWGROUP(drive)->rq->special;
596                 command = args->tfRegister[IDE_COMMAND_OFFSET];
597         }
598 #endif
599         /* issue cmd to drive */
600         HWIF(drive)->OUTB(command, IDE_COMMAND_REG);
601
602         return icside_dma_count(drive);
603 }
604
605 int icside_dma_write(ide_drive_t *drive)
606 {
607         ide_hwif_t *hwif        = HWIF(drive);
608 //      ide_task_t *args        = HWGROUP(drive)->rq->special;
609         int count               = 0;
610         u8 lba48                = (drive->addressing == 1) ? 1 : 0;
611         task_ioreg_t command    = WIN_NOP;
612
613         count = icside_build_dmatable(drive, PCI_DMA_TODEVICE);
614         if (!count)
615                 return 1;
616         disable_dma(hwif->hw.dma);
617
618         /* Route the DMA signals to
619          * to the correct interface.
620          */
621         HWIF(drive)->OUTB(hwif->select_data, hwif->config_data);
622
623         /* Select the correct timing
624          * for this drive
625          */
626         set_dma_speed(hwif->hw.dma, drive->drive_data);
627
628         set_dma_sg(hwif->hw.dma, HWIF(drive)->sg_table, count);
629         set_dma_mode(hwif->hw.dma, DMA_MODE_WRITE);
630
631         drive->waiting_for_dma = 1;
632         if (drive->media != ide_disk)
633                 return 0;
634
635         if (HWGROUP(drive)->handler != NULL)
636                 BUG();
637         ide_set_handler(drive, &icside_dmaintr, WAIT_CMD, NULL);
638         /*
639          * FIX ME to use only ACB ide_task_t args Struct
640          */
641 #if 0
642         {
643                 ide_task_t *args = HWGROUP(drive)->rq->special;
644                 command = args->tfRegister[IDE_COMMAND_OFFSET];
645         }
646 #else
647         command = (lba48) ? WIN_WRITEDMA_EXT : WIN_WRITEDMA;
648         if (HWGROUP(drive)->rq->flags & REQ_DRIVE_TASKFILE) {
649                 ide_task_t *args = HWGROUP(drive)->rq->special;
650                 command = args->tfRegister[IDE_COMMAND_OFFSET];
651         }
652 #endif
653         /* issue cmd to drive */
654         HWIF(drive)->OUTB(command, IDE_COMMAND_REG);
655
656         return icside_dma_count(drive);
657 }
658
659 static int
660 icside_setup_dma(ide_hwif_t *hwif, int autodma)
661 {
662         printk("    %s: SG-DMA", hwif->name);
663
664         hwif->sg_table = kmalloc(sizeof(struct scatterlist) * NR_ENTRIES,
665                                  GFP_KERNEL);
666         if (!hwif->sg_table)
667                 goto failed;
668
669         hwif->dmatable_cpu = NULL;
670         hwif->dmatable_dma = 0;
671         hwif->speedproc = icside_set_speed;
672         hwif->autodma = autodma;
673
674         hwif->ide_dma_check = icside_dma_check;
675         hwif->ide_dma_host_off = icside_dma_host_off;
676         hwif->ide_dma_off_quietly = icside_dma_off_quietly;
677         hwif->ide_dma_off = icside_dma_off;
678         hwif->ide_dma_host_on = icside_dma_host_on;
679         hwif->ide_dma_on = icside_dma_on;
680         hwif->ide_dma_read = icside_dma_read;
681         hwif->ide_dma_write = icside_dma_write;
682         hwif->ide_dma_count = icside_dma_count;
683         hwif->ide_dma_begin = icside_dma_begin;
684         hwif->ide_dma_end = icside_dma_end;
685         hwif->ide_dma_verbose = icside_dma_verbose;
686         hwif->ide_dma_bad_drive = check_drive_bad_lists;
687         hwif->ide_dma_good_drive = check_drive_good_lists;
688         hwif->ide_dma_test_irq = icside_dma_test_irq;
689
690         printk(" capable%s\n", autodma ?
691                 ", auto-enable" : "");
692
693         return 1;
694
695 failed:
696         printk(" -- ERROR, unable to allocate DMA table\n");
697         return 0;
698 }
699 #endif
700
701 static ide_hwif_t *
702 icside_find_hwif(unsigned long dataport)
703 {
704         ide_hwif_t *hwif;
705         int index;
706
707         for (index = 0; index < MAX_HWIFS; ++index) {
708                 hwif = &ide_hwifs[index];
709                 if (hwif->io_ports[IDE_DATA_OFFSET] == (ide_ioreg_t)dataport)
710                         goto found;
711         }
712
713         for (index = 0; index < MAX_HWIFS; ++index) {
714                 hwif = &ide_hwifs[index];
715                 if (!hwif->io_ports[IDE_DATA_OFFSET])
716                         goto found;
717         }
718
719         return NULL;
720 found:
721         return hwif;
722 }
723
724 static ide_hwif_t *
725 icside_setup(unsigned long base, struct cardinfo *info, int irq)
726 {
727         unsigned long port = base + info->dataoffset;
728         ide_hwif_t *hwif;
729
730         hwif = icside_find_hwif(base);
731         if (hwif) {
732                 int i;
733
734                 memset(&hwif->hw, 0, sizeof(hw_regs_t));
735
736                 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
737                         hwif->hw.io_ports[i] = (ide_ioreg_t)port;
738                         hwif->io_ports[i] = (ide_ioreg_t)port;
739                         port += 1 << info->stepping;
740                 }
741                 hwif->hw.io_ports[IDE_CONTROL_OFFSET] = base + info->ctrloffset;
742                 hwif->io_ports[IDE_CONTROL_OFFSET] = base + info->ctrloffset;
743                 hwif->hw.irq  = irq;
744                 hwif->irq     = irq;
745                 hwif->hw.dma  = NO_DMA;
746                 hwif->noprobe = 0;
747                 hwif->chipset = ide_acorn;
748         }
749
750         return hwif;
751 }
752
753 static int __init icside_register_v5(struct expansion_card *ec, int autodma)
754 {
755         unsigned long slot_port;
756         ide_hwif_t *hwif;
757
758         slot_port = ecard_address(ec, ECARD_MEMC, 0);
759
760         ec->irqaddr  = (unsigned char *)ioaddr(slot_port + ICS_ARCIN_V5_INTRSTAT);
761         ec->irqmask  = 1;
762         ec->irq_data = (void *)slot_port;
763         ec->ops      = (expansioncard_ops_t *)&icside_ops_arcin_v5;
764
765         /*
766          * Be on the safe side - disable interrupts
767          */
768         inb(slot_port + ICS_ARCIN_V5_INTROFFSET);
769
770         hwif = icside_setup(slot_port, &icside_cardinfo_v5, ec->irq);
771
772         return hwif ? 0 : -1;
773 }
774
775 static int __init icside_register_v6(struct expansion_card *ec, int autodma)
776 {
777         unsigned long slot_port, port;
778         ide_hwif_t *hwif, *mate;
779         int sel = 0;
780
781         slot_port = ecard_address(ec, ECARD_IOC, ECARD_FAST);
782         port      = ecard_address(ec, ECARD_EASI, ECARD_FAST);
783
784         if (port == 0)
785                 port = slot_port;
786         else
787                 sel = 1 << 5;
788
789         outb(sel, slot_port);
790
791         ec->irq_data = (void *)port;
792         ec->ops      = (expansioncard_ops_t *)&icside_ops_arcin_v6;
793
794         /*
795          * Be on the safe side - disable interrupts
796          */
797         inb(port + ICS_ARCIN_V6_INTROFFSET_1);
798         inb(port + ICS_ARCIN_V6_INTROFFSET_2);
799
800         hwif = icside_setup(port, &icside_cardinfo_v6_1, ec->irq);
801         mate = icside_setup(port, &icside_cardinfo_v6_2, ec->irq);
802
803 #ifdef CONFIG_BLK_DEV_IDEDMA_ICS
804         if (ec->dma != NO_DMA) {
805                 if (request_dma(ec->dma, hwif->name))
806                         goto no_dma;
807
808                 if (hwif) {
809                         hwif->config_data = slot_port;
810                         hwif->select_data = sel;
811                         hwif->hw.dma  = ec->dma;
812                         hwif->hw.priv = (void *)
813                                         (port + ICS_ARCIN_V6_INTRSTAT_1);
814                         hwif->channel = 0;
815                         icside_setup_dma(hwif, autodma);
816                         hwif->drives[0].autodma = autodma;
817                         hwif->drives[1].autodma = autodma;
818                 }
819                 if (mate) {
820                         mate->config_data = slot_port;
821                         mate->select_data = sel | 1;
822                         mate->hw.dma  = ec->dma;
823                         mate->hw.priv = (void *)
824                                         (port + ICS_ARCIN_V6_INTRSTAT_2);
825                         mate->channel = 1;
826                         icside_setup_dma(mate, autodma);
827                         mate->drives[0].autodma = autodma;
828                         mate->drives[1].autodma = autodma;
829                 }
830         }
831 no_dma:
832 #endif
833         return hwif || mate ? 0 : -1;
834 }
835
836 int __init icside_init(void)
837 {
838         int autodma = 0;
839
840 #ifdef CONFIG_IDEDMA_ICS_AUTO
841         autodma = 1;
842 #endif
843
844         ecard_startfind ();
845
846         do {
847                 struct expansion_card *ec;
848                 int result;
849
850                 ec = ecard_find(0, icside_cids);
851                 if (ec == NULL)
852                         break;
853
854                 ecard_claim(ec);
855
856                 switch (icside_identifyif(ec)) {
857                 case ics_if_arcin_v5:
858                         result = icside_register_v5(ec, autodma);
859                         break;
860
861                 case ics_if_arcin_v6:
862                         result = icside_register_v6(ec, autodma);
863                         break;
864
865                 default:
866                         result = -1;
867                         break;
868                 }
869
870                 if (result)
871                         ecard_release(ec);
872         } while (1);
873
874         return 0;
875 }